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From: Dave Jiang <dave.jiang@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-acpi@vger.kernel.org, dan.j.williams@intel.com,
	ira.weiny@intel.com, vishal.l.verma@intel.com,
	alison.schofield@intel.com, rafael@kernel.org,
	bhelgaas@google.com, robert.moore@intel.com
Subject: Re: [PATCH 03/18] cxl: Add checksum verification to CDAT from CXL
Date: Thu, 9 Feb 2023 10:31:24 -0700	[thread overview]
Message-ID: <e5b3f9ca-3a1e-bc6f-1847-489de3bf00f0@intel.com> (raw)
In-Reply-To: <20230209113422.00007017@Huawei.com>



On 2/9/23 4:34 AM, Jonathan Cameron wrote:
> On Mon, 06 Feb 2023 13:49:48 -0700
> Dave Jiang <dave.jiang@intel.com> wrote:
> 
>> A CDAT table is available from a CXL device. The table is read by the
>> driver and cached in software. With the CXL subsystem needing to parse the
>> CDAT table, the checksum should be verified. Add checksum verification
>> after the CDAT table is read from device.
>>
>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> Hi Dave,
> 
> Some comments on this follow on from previous patch so may not
> be relevant once you've updated how that is done.

Dan advised to just drop the ACPICA changes and just do it locally since 
the verification code is tiny and simple.

> 
> Jonathan
> 
>> ---
>>   drivers/cxl/core/pci.c |   11 +++++++++++
>>   1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
>> index 57764e9cd19d..a24dac36bedd 100644
>> --- a/drivers/cxl/core/pci.c
>> +++ b/drivers/cxl/core/pci.c
>> @@ -3,6 +3,7 @@
>>   #include <linux/io-64-nonatomic-lo-hi.h>
>>   #include <linux/device.h>
>>   #include <linux/delay.h>
>> +#include <linux/acpi.h>
>>   #include <linux/pci.h>
>>   #include <linux/pci-doe.h>
>>   #include <cxlpci.h>
>> @@ -592,6 +593,7 @@ void read_cdat_data(struct cxl_port *port)
>>   	struct device *dev = &port->dev;
>>   	struct device *uport = port->uport;
>>   	size_t cdat_length;
>> +	acpi_status status;
>>   	int rc;
>>   
>>   	cdat_doe = find_cdat_doe(uport);
>> @@ -620,5 +622,14 @@ void read_cdat_data(struct cxl_port *port)
>>   		port->cdat.length = 0;
>>   		dev_err(dev, "CDAT data read error\n");
>>   	}
>> +
>> +	status = acpi_ut_verify_cdat_checksum(port->cdat.table, port->cdat.length);
>> +	if (status != AE_OK) {
> 
> if (ACPI_FAILURE(acpi_ut...))  or better still put that in the wrapper I suggeste
> in previous patch so that we have normal kernel return code handling out here.
> 
> 
>> +		/* Don't leave table data allocated on error */
>> +		devm_kfree(dev, port->cdat.table);
>> +		port->cdat.table = NULL;
>> +		port->cdat.length = 0;
> 
> I'd rather see us manipulate a local copy of cdat_length, and cdat_table
> then only assign them to the port->cdat fields the success path rather
> than setting them then unsetting the on error.
> 
> Diff will be bigger, but nicer resulting code (and hopefully diff
> won't be too big!)

Ok, I'll create a prep patch to change this as you suggested.

> 
> 
>> +		dev_err(dev, "CDAT data checksum error\n");
>> +	}
>>   }
>>   EXPORT_SYMBOL_NS_GPL(read_cdat_data, CXL);
>>
>>
> 

  reply	other threads:[~2023-02-09 17:31 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-06 20:49 [PATCH 00/18] cxl: Add support for QTG ID retrieval for CXL subsystem Dave Jiang
2023-02-06 20:49 ` [PATCH 01/18] cxl: Export QTG ids from CFMWS to sysfs Dave Jiang
2023-02-09 11:15   ` Jonathan Cameron
2023-02-09 17:28     ` Dave Jiang
2023-02-06 20:49 ` [PATCH 02/18] ACPICA: Export acpi_ut_verify_cdat_checksum() Dave Jiang
2023-02-07 14:19   ` Rafael J. Wysocki
2023-02-07 15:47     ` Dave Jiang
2023-02-09 11:30       ` Jonathan Cameron
2023-02-06 20:49 ` [PATCH 03/18] cxl: Add checksum verification to CDAT from CXL Dave Jiang
2023-02-09 11:34   ` Jonathan Cameron
2023-02-09 17:31     ` Dave Jiang [this message]
2023-02-06 20:49 ` [PATCH 04/18] cxl: Add common helpers for cdat parsing Dave Jiang
2023-02-09 11:58   ` Jonathan Cameron
2023-02-09 22:57     ` Dave Jiang
2023-02-11 10:18       ` Lukas Wunner
2023-02-14 13:17         ` Jonathan Cameron
2023-02-14 20:36         ` Dave Jiang
2023-02-06 20:50 ` [PATCH 05/18] ACPICA: Fix 'struct acpi_cdat_dsmas' spelling mistake Dave Jiang
2023-02-06 22:00   ` Lukas Wunner
2023-02-06 20:50 ` [PATCH 06/18] cxl: Add callback to parse the DSMAS subtables from CDAT Dave Jiang
2023-02-09 13:29   ` Jonathan Cameron
2023-02-13 22:55     ` Dave Jiang
2023-02-06 20:50 ` [PATCH 07/18] cxl: Add callback to parse the DSLBIS subtable " Dave Jiang
2023-02-09 13:50   ` Jonathan Cameron
2023-02-14  0:24     ` Dave Jiang
2023-02-06 20:50 ` [PATCH 08/18] cxl: Add support for _DSM Function for retrieving QTG ID Dave Jiang
2023-02-09 14:02   ` Jonathan Cameron
2023-02-14 21:07     ` Dave Jiang
2023-02-06 20:50 ` [PATCH 09/18] cxl: Add helper function to retrieve ACPI handle of CXL root device Dave Jiang
2023-02-09 14:10   ` Jonathan Cameron
2023-02-14 21:29     ` Dave Jiang
2023-02-06 20:50 ` [PATCH 10/18] PCI: Export pcie_get_speed() using the code from sysfs PCI link speed show function Dave Jiang
2023-02-06 22:27   ` Lukas Wunner
2023-02-07 20:29     ` Dave Jiang
2023-02-06 20:51 ` [PATCH 11/18] PCI: Export pcie_get_width() using the code from sysfs PCI link width " Dave Jiang
2023-02-06 22:43   ` Bjorn Helgaas
2023-02-07 20:35     ` Dave Jiang
2023-02-06 20:51 ` [PATCH 12/18] cxl: Add helpers to calculate pci latency for the CXL device Dave Jiang
2023-02-06 22:39   ` Bjorn Helgaas
2023-02-07 20:51     ` Dave Jiang
2023-02-08 22:15       ` Bjorn Helgaas
2023-02-08 23:56         ` Dave Jiang
2023-02-09 15:10           ` Jonathan Cameron
2023-02-14 22:22             ` Dave Jiang
2023-02-15 12:13               ` Jonathan Cameron
2023-02-22 17:54                 ` Dave Jiang
2023-02-09 15:16   ` Jonathan Cameron
2023-02-06 20:51 ` [PATCH 13/18] cxl: Add latency and bandwidth calculations for the CXL path Dave Jiang
2023-02-09 15:24   ` Jonathan Cameron
2023-02-14 23:03     ` Dave Jiang
2023-02-15 13:17       ` Jonathan Cameron
2023-02-15 16:38         ` Dave Jiang
2023-02-06 20:51 ` [PATCH 14/18] cxl: Wait Memory_Info_Valid before access memory related info Dave Jiang
2023-02-09 15:29   ` Jonathan Cameron
2023-02-06 20:51 ` [PATCH 15/18] cxl: Move identify and partition query from pci probe to port probe Dave Jiang
2023-02-09 15:29   ` Jonathan Cameron
2023-02-06 20:51 ` [PATCH 16/18] cxl: Move reading of CDAT data from device to after media is ready Dave Jiang
2023-02-06 22:17   ` Lukas Wunner
2023-02-07 20:55     ` Dave Jiang
2023-02-09 15:31   ` Jonathan Cameron
2023-02-06 20:51 ` [PATCH 17/18] cxl: Attach QTG IDs to the DPA ranges for the device Dave Jiang
2023-02-09 15:34   ` Jonathan Cameron
2023-02-06 20:52 ` [PATCH 18/18] cxl: Export sysfs attributes for device QTG IDs Dave Jiang
2023-02-09 15:41   ` Jonathan Cameron
2023-03-23 23:20     ` Dan Williams

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