[PATCH 00/11] Add more support to the RZ/G1C (r8a77470) SoC

[PATCH 00/11] Add more support to the RZ/G1C (r8a77470) SoC

[Cao Van Dong]

This series adds HSCIF,MSIOF,PWM,CAN,VIN,Audio,Audio-DMAC,Ether,VSP,FDP1,LVDS support 
for the RZ/G1C (r8a77470) SoC. It is based on the renesas-drivers-2019-04-02-v5.1-rc3 tag 
of renesas-drivers tree.

Cao Van Dong (11):
  ARM: dts: r8a77470: Add HSCIF support
  ARM: dts: r8a77470: Add MSIOF support
  ARM: dts: r8a77470: Add PWM support
  ARM: dts: r8a77470: Add CAN support
  ARM: dts: r8a77470: Add VIN support
  ARM: dts: r8a77470: Add Audio support
  ARM: dts: r8a77470: Add Audio-DMAC support
  ARM: dts: r8a77470: Add Ether support
  ARM: dts: r8a77470: Add VSP support
  ARM: dts: r8a77470: Add FDP1 support
  ARM: dts: r8a77470: Add LVDS support

 arch/arm/boot/dts/r8a77470.dtsi | 493 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 493 insertions(+)

-- 
2.7.4

[PATCH 01/11] ARM: dts: r8a77470: Add HSCIF support

[Cao Van Dong]

Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 48 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 493cf2b..85f7a6f 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -588,6 +588,54 @@
 			status = "disabled";
 		};
 
+		hscif0: serial@e62c0000 {
+			compatible = "renesas,hscif-r8a77470",
+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
+			reg = <0 0xe62c0000 0 0x60>;
+			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 717>,
+				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
+			       <&dmac1 0x39>, <&dmac1 0x3a>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 717>;
+			status = "disabled";
+		};
+
+		hscif1: serial@e62c8000 {
+			compatible = "renesas,hscif-r8a77470",
+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
+			reg = <0 0xe62c8000 0 0x60>;
+			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 716>,
+				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
+			       <&dmac1 0x4d>, <&dmac1 0x4e>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 716>;
+			status = "disabled";
+		};
+
+		hscif2: serial@e62d0000 {
+			compatible = "renesas,hscif-r8a77470",
+				     "renesas,rcar-gen2-hscif", "renesas,hscif";
+			reg = <0 0xe62d0000 0 0x60>;
+			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 713>,
+				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
+			       <&dmac1 0x3b>, <&dmac1 0x3c>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 713>;
+			status = "disabled";
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 02/11] ARM: dts: r8a77470: Add MSIOF support

[Cao Van Dong]

Add msiof{0|1|2} nodes to dtsi for MSIOF support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 48 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 85f7a6f..a7d3f88 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -636,6 +636,54 @@
 			status = "disabled";
 		};
 
+		msiof0: spi@e6e20000 {
+			compatible = "renesas,msiof-r8a77470",
+				     "renesas,rcar-gen2-msiof";
+			reg = <0 0xe6e20000 0 0x0064>;
+			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 000>;
+			dmas = <&dmac0 0x51>, <&dmac0 0x52>,
+			       <&dmac1 0x51>, <&dmac1 0x52>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			resets = <&cpg 000>;
+			status = "disabled";
+		};
+
+		msiof1: spi@e6e10000 {
+			compatible = "renesas,msiof-r8a77470",
+				     "renesas,rcar-gen2-msiof";
+			reg = <0 0xe6e10000 0 0x0064>;
+			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 208>;
+			dmas = <&dmac0 0x55>, <&dmac0 0x56>,
+			       <&dmac1 0x55>, <&dmac1 0x56>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			resets = <&cpg 208>;
+			status = "disabled";
+		};
+
+		msiof2: spi@e6e00000 {
+			compatible = "renesas,msiof-r8a77470",
+				     "renesas,rcar-gen2-msiof";
+			reg = <0 0xe6e00000 0 0x0064>;
+			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 205>;
+			dmas = <&dmac0 0x41>, <&dmac0 0x42>,
+			       <&dmac1 0x41>, <&dmac1 0x42>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			resets = <&cpg 205>;
+			status = "disabled";
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 03/11] ARM: dts: r8a77470: Add PWM support

[Cao Van Dong]

Add pwm{0|1|2|3|4|5|6} nodes to dtsi for PWM support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 70 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index a7d3f88..848280f 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -684,6 +684,76 @@
 			status = "disabled";
 		};
 
+		pwm0: pwm@e6e30000 {
+			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
+			reg = <0 0xe6e30000 0 0x8>;
+			clocks = <&cpg CPG_MOD 523>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 523>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm1: pwm@e6e31000 {
+			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
+			reg = <0 0xe6e31000 0 0x8>;
+			clocks = <&cpg CPG_MOD 523>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 523>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm2: pwm@e6e32000 {
+			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
+			reg = <0 0xe6e32000 0 0x8>;
+			clocks = <&cpg CPG_MOD 523>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 523>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm3: pwm@e6e33000 {
+			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
+			reg = <0 0xe6e33000 0 0x8>;
+			clocks = <&cpg CPG_MOD 523>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 523>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm4: pwm@e6e34000 {
+			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
+			reg = <0 0xe6e34000 0 0x8>;
+			clocks = <&cpg CPG_MOD 523>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 523>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm5: pwm@e6e35000 {
+			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
+			reg = <0 0xe6e35000 0 0x8>;
+			clocks = <&cpg CPG_MOD 523>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 523>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
+		pwm6: pwm@e6e36000 {
+			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
+			reg = <0 0xe6e36000 0 0x8>;
+			clocks = <&cpg CPG_MOD 523>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 523>;
+			#pwm-cells = <2>;
+			status = "disabled";
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 04/11] ARM: dts: r8a77470: Add CAN support

[Cao Van Dong]

Add can{0|1} nodes to dtsi for CAN support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 848280f..3940a0d 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -754,6 +754,32 @@
 			status = "disabled";
 		};
 
+		can0: can@e6e80000 {
+			compatible = "renesas,can-r8a77470",
+				     "renesas,rcar-gen2-can";
+			reg = <0 0xe6e80000 0 0x1000>;
+			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 916>,
+				 <&cpg CPG_CORE r8a77470_CLK_RCAN>, <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 916>;
+			status = "disabled";
+		};
+
+		can1: can@e6e88000 {
+			compatible = "renesas,can-r8a77470",
+				     "renesas,rcar-gen2-can";
+			reg = <0 0xe6e88000 0 0x1000>;
+			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 915>,
+				 <&cpg CPG_CORE r8a77470_CLK_RCAN>, <&can_clk>;
+			clock-names = "clkp1", "clkp2", "can_clk";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 915>;
+			status = "disabled";
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 05/11] ARM: dts: r8a77470: Add VIN support

[Cao Van Dong]

Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 3940a0d..e89c72f 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -780,6 +780,28 @@
 			status = "disabled";
 		};
 
+		vin0: video@e6ef0000 {
+			compatible = "renesas,vin-r8a77470",
+				     "renesas,rcar-gen2-vin";
+			reg = <0 0xe6ef0000 0 0x1000>;
+			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 811>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 811>;
+			status = "disabled";
+		};
+
+		vin1: video@e6ef1000 {
+			compatible = "renesas,vin-r8a77470",
+				     "renesas,rcar-gen2-vin";
+			reg = <0 0xe6ef1000 0 0x1000>;
+			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 810>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 810>;
+			status = "disabled";
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 06/11] ARM: dts: r8a77470: Add Audio support

[Cao Van Dong]

Add rcar_sound node to dtsi for Audio support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 180 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 180 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index e89c72f..2cea3e8 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -802,6 +802,186 @@
 			status = "disabled";
 		};
 
+		rcar_sound: sound@ec500000 {
+			/*
+			 * #sound-dai-cells is required
+			 *
+			 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
+			 * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
+			 */
+			compatible = "renesas,rcar_sound-r8a77470",
+				     "renesas,rcar_sound-gen2";
+			reg = <0 0xec500000 0 0x1000>, /* SCU */
+			      <0 0xec5a0000 0 0x100>,  /* ADG */
+			      <0 0xec540000 0 0x1000>, /* SSIU */
+			      <0 0xec541000 0 0x280>,  /* SSI */
+			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
+			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
+
+			clocks = <&cpg CPG_MOD 1005>,
+				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+				 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
+				 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
+				 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
+				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
+				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+				 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
+				 <&cpg CPG_CORE r8a77470_CLK_M2>;
+			clock-names = "ssi-all",
+				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+				      "ssi.1", "ssi.0",
+				      "src.6", "src.5", "src.4", "src.3",
+				      "src.2", "src.1",
+				      "ctu.0", "ctu.1",
+				      "mix.0", "mix.1",
+				      "dvc.0", "dvc.1",
+				      "clk_a", "clk_b", "clk_c", "clk_i";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 1005>,
+				 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
+				 <&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
+				 <&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
+				 <&cpg 1015>;
+			reset-names = "ssi-all",
+				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
+				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
+				      "ssi.1", "ssi.0";
+
+			status = "disabled";
+
+			rcar_sound,dvc {
+				dvc0: dvc-0 {
+					dmas = <&audma0 0xbc>;
+					dma-names = "tx";
+				};
+				dvc1: dvc-1 {
+					dmas = <&audma0 0xbe>;
+					dma-names = "tx";
+				};
+			};
+
+			rcar_sound,mix {
+				mix0: mix-0 { };
+				mix1: mix-1 { };
+			};
+
+			rcar_sound,ctu {
+				ctu00: ctu-0 { };
+				ctu01: ctu-1 { };
+				ctu02: ctu-2 { };
+				ctu03: ctu-3 { };
+				ctu10: ctu-4 { };
+				ctu11: ctu-5 { };
+				ctu12: ctu-6 { };
+				ctu13: ctu-7 { };
+			};
+
+			rcar_sound,src {
+				src-0 {
+					status = "disabled";
+				};
+				src1: src-1 {
+					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x87>, <&audma0 0x9c>;
+					dma-names = "rx", "tx";
+				};
+				src2: src-2 {
+					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x89>, <&audma0 0x9e>;
+					dma-names = "rx", "tx";
+				};
+				src3: src-3 {
+					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x8b>, <&audma0 0xa0>;
+					dma-names = "rx", "tx";
+				};
+				src4: src-4 {
+					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x8d>, <&audma0 0xb0>;
+					dma-names = "rx", "tx";
+				};
+				src5: src-5 {
+					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x8f>, <&audma0 0xb2>;
+					dma-names = "rx", "tx";
+				};
+				src6: src-6 {
+					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x91>, <&audma0 0xb4>;
+					dma-names = "rx", "tx";
+				};
+			};
+
+			rcar_sound,ssi {
+				ssi0: ssi-0 {
+					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x01>, <&audma0 0x02>,
+					       <&audma0 0x15>, <&audma0 0x16>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi1: ssi-1 {
+					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x03>, <&audma0 0x04>,
+					       <&audma0 0x49>, <&audma0 0x4a>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi2: ssi-2 {
+					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x05>, <&audma0 0x06>,
+					       <&audma0 0x63>, <&audma0 0x64>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi3: ssi-3 {
+					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x07>, <&audma0 0x08>,
+					       <&audma0 0x6f>, <&audma0 0x70>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi4: ssi-4 {
+					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x09>, <&audma0 0x0a>,
+					       <&audma0 0x71>, <&audma0 0x72>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi5: ssi-5 {
+					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x0b>, <&audma0 0x0c>,
+					       <&audma0 0x73>, <&audma0 0x74>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi6: ssi-6 {
+					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x0d>, <&audma0 0x0e>,
+					       <&audma0 0x75>, <&audma0 0x76>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi7: ssi-7 {
+					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x0f>, <&audma0 0x10>,
+					       <&audma0 0x79>, <&audma0 0x7a>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi8: ssi-8 {
+					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x11>, <&audma0 0x12>,
+					       <&audma0 0x7b>, <&audma0 0x7c>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+				ssi9: ssi-9 {
+					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x13>, <&audma0 0x14>,
+					       <&audma0 0x7d>, <&audma0 0x7e>;
+					dma-names = "rx", "tx", "rxu", "txu";
+				};
+			};
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 07/11] ARM: dts: r8a77470: Add Audio-DMAC support

[Cao Van Dong]

Add audma0 node to dtsi for audio support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 2cea3e8..f2349a0 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -982,6 +982,37 @@
 			};
 		};
 
+		audma0: dma-controller@ec700000 {
+			compatible = "renesas,dmac-r8a77470",
+				     "renesas,rcar-dmac";
+			reg = <0 0xec700000 0 0x10000>;
+			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					  "ch0", "ch1", "ch2", "ch3",
+					  "ch4", "ch5", "ch6", "ch7",
+					  "ch8", "ch9", "ch10", "ch11",
+					  "ch12";
+			clocks = <&cpg CPG_MOD 502>;
+			clock-names = "fck";
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 502>;
+			#dma-cells = <1>;
+			dma-channels = <13>;
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 08/11] ARM: dts: r8a77470: Add Ether support

[Cao Van Dong]

Add ether node to dtsi for Ether support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index f2349a0..c66a3c4 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -1013,6 +1013,20 @@
 			dma-channels = <13>;
 		};
 
+		ether: ethernet@ee700000 {
+			compatible = "renesas,ether-r8a77470",
+				     "renesas,rcar-gen2-ether";
+			reg = <0 0xee700000 0 0x400>;
+			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 813>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 813>;
+			phy-mode = "rmii";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 09/11] ARM: dts: r8a77470: Add VSP support

[Cao Van Dong]

Add vsp nodes to dtsi for VSP support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index c66a3c4..13d3f07 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -1027,6 +1027,24 @@
 			status = "disabled";
 		};
 
+		vsp@fe928000 {
+			compatible = "renesas,vsp1";
+			reg = <0 0xfe928000 0 0x8000>;
+			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 131>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 131>;
+		};
+
+		vsp@fe930000 {
+			compatible = "renesas,vsp1";
+			reg = <0 0xfe930000 0 0x8000>;
+			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 128>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+			resets = <&cpg 128>;
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 10/11] ARM: dts: r8a77470: Add FDP1 support

[Cao Van Dong]

Add fdp1 node to dtsi for FDP1 support on the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 13d3f07..a63c627 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -1045,6 +1045,15 @@
 			resets = <&cpg 128>;
 		};
 
+		fdp1@fe940000 {
+			compatible = "renesas,fdp1";
+			reg = <0 0xfe940000 0 0x2400>;
+			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 119>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 119>;
+		};
+
 		sdhi0: sd@ee100000 {
 			compatible = "renesas,sdhi-r8a77470",
 				     "renesas,rcar-gen2-sdhi";
-- 
2.7.4

[PATCH 11/11] ARM: dts: r8a77470: Add LVDS support

[Cao Van Dong]

This patch is to add LVDS support for the RZ/G1C (r8a77470) SoC.

Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
---
 arch/arm/boot/dts/r8a77470.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index a63c627..48866e5 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -1136,6 +1136,33 @@
 				port@2 {
 					reg = <2>;
 					du_out_lvds0: endpoint {
+                                                remote-endpoint = <&lvds0_in>;
+					};
+				};
+			};
+		};
+
+		lvds0: lvds@feb90000 {
+			compatible = "renesas,r8a77470-lvds";
+			reg = <0 0xfeb90000 0 0x1c>;
+			clocks = <&cpg CPG_MOD 726>;
+			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			resets = <&cpg 726>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					lvds0_in: endpoint {
+						remote-endpoint = <&du_out_lvds0>;
+					};
+				};
+				port@1 {
+					reg = <1>;
+					lvds0_out: endpoint {
 					};
 				};
 			};
-- 
2.7.4

Re: [PATCH 01/11] ARM: dts: r8a77470: Add HSCIF support

[Simon Horman]

On Tue, Apr 09, 2019 at 05:51:42PM +0900, Cao Van Dong wrote:
> Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC.
> 
> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 02/11] ARM: dts: r8a77470: Add MSIOF support

[Simon Horman]

On Tue, Apr 09, 2019 at 05:51:43PM +0900, Cao Van Dong wrote:
> Add msiof{0|1|2} nodes to dtsi for MSIOF support on the RZ/G1C (r8a77470) SoC.
> 
> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 03/11] ARM: dts: r8a77470: Add PWM support

[Simon Horman]

On Tue, Apr 09, 2019 at 05:51:44PM +0900, Cao Van Dong wrote:
> Add pwm{0|1|2|3|4|5|6} nodes to dtsi for PWM support on the RZ/G1C (r8a77470) SoC.
> 
> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 04/11] ARM: dts: r8a77470: Add CAN support

[Simon Horman]

On Tue, Apr 09, 2019 at 05:51:45PM +0900, Cao Van Dong wrote:
> Add can{0|1} nodes to dtsi for CAN support on the RZ/G1C (r8a77470) SoC.
> 
> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 05/11] ARM: dts: r8a77470: Add VIN support

[Simon Horman]

On Tue, Apr 09, 2019 at 05:51:46PM +0900, Cao Van Dong wrote:
> Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC.
> 
> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH 01/11] ARM: dts: r8a77470: Add HSCIF support

[Simon Horman]

On Tue, Apr 09, 2019 at 01:51:38PM +0200, Simon Horman wrote:
> On Tue, Apr 09, 2019 at 05:51:42PM +0900, Cao Van Dong wrote:
> > Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC.
> > 
> > Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
> 
> Thanks,
> 
> This looks fine to me but I will wait to see if there are other reviews
> before applying.
> 
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Sorry, I spoke a little too soon.

The following incremental change is required in order
for this patch to compile.

Please test that each patch in this series compiles and resubmit.


diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index 85f7a6f68720..60bd79fc35f7 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -594,12 +594,12 @@
 			reg = <0 0xe62c0000 0 0x60>;
 			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 717>,
-				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
 			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 			       <&dmac1 0x39>, <&dmac1 0x3a>;
 			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
 			resets = <&cpg 717>;
 			status = "disabled";
 		};
@@ -610,12 +610,12 @@
 			reg = <0 0xe62c8000 0 0x60>;
 			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 716>,
-				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
 			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 			       <&dmac1 0x4d>, <&dmac1 0x4e>;
 			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
 			resets = <&cpg 716>;
 			status = "disabled";
 		};
@@ -626,12 +626,12 @@
 			reg = <0 0xe62d0000 0 0x60>;
 			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 713>,
-				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
+				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
 			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 			       <&dmac1 0x3b>, <&dmac1 0x3c>;
 			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
+			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
 			resets = <&cpg 713>;
 			status = "disabled";
 		};

Re: [PATCH 05/11] ARM: dts: r8a77470: Add VIN support

[Niklas Söderlund]

Hi Cao,

On 2019-04-09 17:51:46 +0900, Cao Van Dong wrote:
> Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC.
> 
> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
> ---
>  arch/arm/boot/dts/r8a77470.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 3940a0d..e89c72f 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -780,6 +780,28 @@
>  			status = "disabled";
>  		};
>  
> +		vin0: video@e6ef0000 {
> +			compatible = "renesas,vin-r8a77470",
> +				     "renesas,rcar-gen2-vin";

This patch looks good but you should also add renesas,vin-r8a77470 to 
Documentation/devicetree/bindings/media/rcar_vin.txt in a separate 
patch.

Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

> +			reg = <0 0xe6ef0000 0 0x1000>;
> +			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 811>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> +			resets = <&cpg 811>;
> +			status = "disabled";
> +		};
> +
> +		vin1: video@e6ef1000 {
> +			compatible = "renesas,vin-r8a77470",
> +				     "renesas,rcar-gen2-vin";
> +			reg = <0 0xe6ef1000 0 0x1000>;
> +			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cpg CPG_MOD 810>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> +			resets = <&cpg 810>;
> +			status = "disabled";
> +		};
> +
>  		sdhi0: sd@ee100000 {
>  			compatible = "renesas,sdhi-r8a77470",
>  				     "renesas,rcar-gen2-sdhi";
> -- 
> 2.7.4
> 

-- 
Regards,
Niklas Söderlund

Re: [PATCH 01/11] ARM: dts: r8a77470: Add HSCIF support

[Cao Van Dong]

Dear Simon-san,

On 2019/04/09 21:15, Simon Horman wrote:
> On Tue, Apr 09, 2019 at 01:51:38PM +0200, Simon Horman wrote:
>> On Tue, Apr 09, 2019 at 05:51:42PM +0900, Cao Van Dong wrote:
>>> Add hscif{0|1|2} nodes to dtsi for HSCIF support on the RZ/G1C (r8a77470) SoC.
>>>
>>> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
>> Thanks,
>>
>> This looks fine to me but I will wait to see if there are other reviews
>> before applying.
>>
>> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
> Sorry, I spoke a little too soon.
>
> The following incremental change is required in order
> for this patch to compile.
>
> Please test that each patch in this series compiles and resubmit.

Thanks for your feedback. Very sorry for the trouble!
I will correct and resubmit in version 2.

> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 85f7a6f68720..60bd79fc35f7 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -594,12 +594,12 @@
>   			reg = <0 0xe62c0000 0 0x60>;
>   			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
>   			clocks = <&cpg CPG_MOD 717>,
> -				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
> +				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
>   			clock-names = "fck", "brg_int", "scif_clk";
>   			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
>   			       <&dmac1 0x39>, <&dmac1 0x3a>;
>   			dma-names = "tx", "rx", "tx", "rx";
> -			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
>   			resets = <&cpg 717>;
>   			status = "disabled";
>   		};
> @@ -610,12 +610,12 @@
>   			reg = <0 0xe62c8000 0 0x60>;
>   			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
>   			clocks = <&cpg CPG_MOD 716>,
> -				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
> +				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
>   			clock-names = "fck", "brg_int", "scif_clk";
>   			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
>   			       <&dmac1 0x4d>, <&dmac1 0x4e>;
>   			dma-names = "tx", "rx", "tx", "rx";
> -			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
>   			resets = <&cpg 716>;
>   			status = "disabled";
>   		};
> @@ -626,12 +626,12 @@
>   			reg = <0 0xe62d0000 0 0x60>;
>   			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
>   			clocks = <&cpg CPG_MOD 713>,
> -				 <&cpg CPG_CORE r8a77470_CLK_ZS>, <&scif_clk>;
> +				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
>   			clock-names = "fck", "brg_int", "scif_clk";
>   			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
>   			       <&dmac1 0x3b>, <&dmac1 0x3c>;
>   			dma-names = "tx", "rx", "tx", "rx";
> -			power-domains = <&sysc r8a77470_PD_ALWAYS_ON>;
> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
>   			resets = <&cpg 713>;
>   			status = "disabled";
>   		};
Thank you,
Dong

Re: [PATCH 05/11] ARM: dts: r8a77470: Add VIN support

[Cao Van Dong]

Dear Niklas-san,

On 2019/04/09 22:01, Niklas Söderlund wrote:
> Hi Cao,
>
> On 2019-04-09 17:51:46 +0900, Cao Van Dong wrote:
>> Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC.
>>
>> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
>> ---
>>   arch/arm/boot/dts/r8a77470.dtsi | 22 ++++++++++++++++++++++
>>   1 file changed, 22 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
>> index 3940a0d..e89c72f 100644
>> --- a/arch/arm/boot/dts/r8a77470.dtsi
>> +++ b/arch/arm/boot/dts/r8a77470.dtsi
>> @@ -780,6 +780,28 @@
>>   			status = "disabled";
>>   		};
>>   
>> +		vin0: video@e6ef0000 {
>> +			compatible = "renesas,vin-r8a77470",
>> +				     "renesas,rcar-gen2-vin";
> This patch looks good but you should also add renesas,vin-r8a77470 to
> Documentation/devicetree/bindings/media/rcar_vin.txt in a separate
> patch.
>
> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Thanks for your feedback!
I will create a separate patch in version 2.

Thank you,
Dong
>> +			reg = <0 0xe6ef0000 0 0x1000>;
>> +			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&cpg CPG_MOD 811>;
>> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
>> +			resets = <&cpg 811>;
>> +			status = "disabled";
>> +		};
>> +
>> +		vin1: video@e6ef1000 {
>> +			compatible = "renesas,vin-r8a77470",
>> +				     "renesas,rcar-gen2-vin";
>> +			reg = <0 0xe6ef1000 0 0x1000>;
>> +			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&cpg CPG_MOD 810>;
>> +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
>> +			resets = <&cpg 810>;
>> +			status = "disabled";
>> +		};
>> +
>>   		sdhi0: sd@ee100000 {
>>   			compatible = "renesas,sdhi-r8a77470",
>>   				     "renesas,rcar-gen2-sdhi";
>> -- 
>> 2.7.4
>>

Re: [PATCH 06/11] ARM: dts: r8a77470: Add Audio support

[Kuninori Morimoto]

Hi Dong-san

Thank you for your patch

> +		rcar_sound: sound@ec500000 {
> +			/*
> +			 * #sound-dai-cells is required
> +			 *
> +			 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
> +			 * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
> +			 */
> +			compatible = "renesas,rcar_sound-r8a77470",
> +				     "renesas,rcar_sound-gen2";
> +			reg = <0 0xec500000 0 0x1000>, /* SCU */
> +			      <0 0xec5a0000 0 0x100>,  /* ADG */
> +			      <0 0xec540000 0 0x1000>, /* SSIU */
> +			      <0 0xec541000 0 0x280>,  /* SSI */
> +			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
> +			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";

I don't have r8a77470 datasheet, but does it have *extended* Audio DMAC peri peri
address (= 0xec760000) ? If it has, please use it instead of normal address (= 0xec740000).

> +			rcar_sound,ssi {
> +				ssi0: ssi-0 {
> +					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
> +					dmas = <&audma0 0x01>, <&audma0 0x02>,
> +					       <&audma0 0x15>, <&audma0 0x16>;
> +					dma-names = "rx", "tx", "rxu", "txu";
> +				};

Please add ssiu.
And then, ssi doesn't need "rxu" and "txu" anymore.
These can be good help for you.

	0ec8e0a879b8d7eacbfbed9a7face8f97f9493a8
	("arm64: dts: renesas: r8a7795: remove BUSIF0 settings from rcar_sound,ssi")

	da90dd849dc22e920388d18a0f877366bd4d2b7f
	("arm64: dts: renesas: r8a7795: add SSIU support for sound")


BTW, this patch-set is including SoC only.
Do you have plan to post board support patch after this ?
In other words, did you test these ?

Thank you for your help !!

Best regards
---
Kuninori Morimoto

Re: [PATCH 05/11] ARM: dts: r8a77470: Add VIN support

[Kuninori Morimoto]

Hi Cao,

> > diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> > index 3940a0d..e89c72f 100644
> > --- a/arch/arm/boot/dts/r8a77470.dtsi
> > +++ b/arch/arm/boot/dts/r8a77470.dtsi
> > @@ -780,6 +780,28 @@
> >  			status = "disabled";
> >  		};
> >  
> > +		vin0: video@e6ef0000 {
> > +			compatible = "renesas,vin-r8a77470",
> > +				     "renesas,rcar-gen2-vin";
> 
> This patch looks good but you should also add renesas,vin-r8a77470 to 
> Documentation/devicetree/bindings/media/rcar_vin.txt in a separate 
> patch.

Same for sound
	Documentation/devicetree/bindings/sound/renesas,rsnd.txt 

Thank you for your help !!

Best regards
---
Kuninori Morimoto

Re: [PATCH 06/11] ARM: dts: r8a77470: Add Audio support

[Cao Van Dong]

Dear Morimoto-san,

On 2019/04/10 9:37, Kuninori Morimoto wrote:
> Hi Dong-san
>
> Thank you for your patch
>
>> +		rcar_sound: sound@ec500000 {
>> +			/*
>> +			 * #sound-dai-cells is required
>> +			 *
>> +			 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
>> +			 * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
>> +			 */
>> +			compatible = "renesas,rcar_sound-r8a77470",
>> +				     "renesas,rcar_sound-gen2";
>> +			reg = <0 0xec500000 0 0x1000>, /* SCU */
>> +			      <0 0xec5a0000 0 0x100>,  /* ADG */
>> +			      <0 0xec540000 0 0x1000>, /* SSIU */
>> +			      <0 0xec541000 0 0x280>,  /* SSI */
>> +			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
>> +			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> I don't have r8a77470 datasheet, but does it have *extended* Audio DMAC peri peri
> address (= 0xec760000) ? If it has, please use it instead of normal address (= 0xec740000).
>
>> +			rcar_sound,ssi {
>> +				ssi0: ssi-0 {
>> +					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
>> +					dmas = <&audma0 0x01>, <&audma0 0x02>,
>> +					       <&audma0 0x15>, <&audma0 0x16>;
>> +					dma-names = "rx", "tx", "rxu", "txu";
>> +				};
> Please add ssiu.
> And then, ssi doesn't need "rxu" and "txu" anymore.
> These can be good help for you.
>
> 	0ec8e0a879b8d7eacbfbed9a7face8f97f9493a8
> 	("arm64: dts: renesas: r8a7795: remove BUSIF0 settings from rcar_sound,ssi")
>
> 	da90dd849dc22e920388d18a0f877366bd4d2b7f
> 	("arm64: dts: renesas: r8a7795: add SSIU support for sound")
>
>
> BTW, this patch-set is including SoC only.
> Do you have plan to post board support patch after this ?
> In other words, did you test these ?
Thanks for your feedback and help!
I will create a separate patch (add 
rcar_sound-r8a77470toDocumentation/../sound/renesas,rsnd.txt)
and update this patch in version 2.

Thank you,
Dong
> Thank you for your help !!
>
> Best regards
> ---
> Kuninori Morimoto

Re: [PATCH 06/11] ARM: dts: r8a77470: Add Audio support

[Kuninori Morimoto]

Hi Cao-san

> > BTW, this patch-set is including SoC only.
> > Do you have plan to post board support patch after this ?
> > In other words, did you test these ?
> Thanks for your feedback and help!
> I will create a separate patch (add
> rcar_sound-r8a77470toDocumentation/../sound/renesas,rsnd.txt)
> and update this patch in version 2.

Again, are these tested code ?
If not, please indicate such information at git-log.
Otherwise, people will think that these are well tested upsteam code.

Thank you for your help !!

Best regards
---
Kuninori Morimoto

Re: [PATCH 06/11] ARM: dts: r8a77470: Add Audio support

[Cao Van Dong]

Dear Morimoto-san,

On 2019/04/10 10:16, Kuninori Morimoto wrote:
> Hi Cao-san
>
>>> BTW, this patch-set is including SoC only.
>>> Do you have plan to post board support patch after this ?
>>> In other words, did you test these ?
>> Thanks for your feedback and help!
>> I will create a separate patch (add
>> rcar_sound-r8a77470toDocumentation/../sound/renesas,rsnd.txt)
>> and update this patch in version 2.
> Again, are these tested code ?
> If not, please indicate such information at git-log.
> Otherwise, people will think that these are well tested upsteam code.
Sorry for missing the question!
I will add information to the patch in version 2.

Thank you,
Dong


> Thank you for your help !!
>
> Best regards
> ---
> Kuninori Morimoto

Re: [PATCH 06/11] ARM: dts: r8a77470: Add Audio support

[Simon Horman]

On Wed, Apr 10, 2019 at 10:33:57AM +0900, Cao Van Dong wrote:
> Dear Morimoto-san,
> 
> On 2019/04/10 10:16, Kuninori Morimoto wrote:
> > Hi Cao-san
> > 
> > > > BTW, this patch-set is including SoC only.
> > > > Do you have plan to post board support patch after this ?
> > > > In other words, did you test these ?
> > > Thanks for your feedback and help!
> > > I will create a separate patch (add
> > > rcar_sound-r8a77470toDocumentation/../sound/renesas,rsnd.txt)
> > > and update this patch in version 2.
> > Again, are these tested code ?
> > If not, please indicate such information at git-log.
> > Otherwise, people will think that these are well tested upsteam code.
> Sorry for missing the question!
> I will add information to the patch in version 2.

In general I would prefer that patches that can be tested,
f.e. using accompanying board dts, are tested before including them
upstream.

Re: [PATCH 06/11] ARM: dts: r8a77470: Add Audio support

[Cao Van Dong]

Dear Morimoto-san,

On 2019/04/10 9:37, Kuninori Morimoto wrote:
> Hi Dong-san
>
> Thank you for your patch
>
>> +		rcar_sound: sound@ec500000 {
>> +			/*
>> +			 * #sound-dai-cells is required
>> +			 *
>> +			 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
>> +			 * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
>> +			 */
>> +			compatible = "renesas,rcar_sound-r8a77470",
>> +				     "renesas,rcar_sound-gen2";
>> +			reg = <0 0xec500000 0 0x1000>, /* SCU */
>> +			      <0 0xec5a0000 0 0x100>,  /* ADG */
>> +			      <0 0xec540000 0 0x1000>, /* SSIU */
>> +			      <0 0xec541000 0 0x280>,  /* SSI */
>> +			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
>> +			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
> I don't have r8a77470 datasheet, but does it have *extended* Audio DMAC peri peri
> address (= 0xec760000) ? If it has, please use it instead of normal address (= 0xec740000).

Alway thanks for your comment!

I consulted the datasheet document of RZ/G1C soc from at the link: 
"https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz/rzg/rzg1c.html#documents". 
I saw the Audio-DMAC-Peripheral-Peripheral address  support to 
"0xec740000". So I didn't update it in version 2.

Thank you,
Dong
>> +			rcar_sound,ssi {
>> +				ssi0: ssi-0 {
>> +					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
>> +					dmas = <&audma0 0x01>, <&audma0 0x02>,
>> +					       <&audma0 0x15>, <&audma0 0x16>;
>> +					dma-names = "rx", "tx", "rxu", "txu";
>> +				};
> Please add ssiu.
> And then, ssi doesn't need "rxu" and "txu" anymore.
> These can be good help for you.
>
> 	0ec8e0a879b8d7eacbfbed9a7face8f97f9493a8
> 	("arm64: dts: renesas: r8a7795: remove BUSIF0 settings from rcar_sound,ssi")
>
> 	da90dd849dc22e920388d18a0f877366bd4d2b7f
> 	("arm64: dts: renesas: r8a7795: add SSIU support for sound")
>
>
> BTW, this patch-set is including SoC only.
> Do you have plan to post board support patch after this ?
> In other words, did you test these ?
>
> Thank you for your help !!
>
> Best regards
> ---
> Kuninori Morimoto

Re: [PATCH 05/11] ARM: dts: r8a77470: Add VIN support

[Simon Horman]

On Tue, Apr 09, 2019 at 03:01:38PM +0200, Niklas Söderlund wrote:
> Hi Cao,
> 
> On 2019-04-09 17:51:46 +0900, Cao Van Dong wrote:
> > Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC.
> > 
> > Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>
> > ---
> >  arch/arm/boot/dts/r8a77470.dtsi | 22 ++++++++++++++++++++++
> >  1 file changed, 22 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> > index 3940a0d..e89c72f 100644
> > --- a/arch/arm/boot/dts/r8a77470.dtsi
> > +++ b/arch/arm/boot/dts/r8a77470.dtsi
> > @@ -780,6 +780,28 @@
> >  			status = "disabled";
> >  		};
> >  
> > +		vin0: video@e6ef0000 {
> > +			compatible = "renesas,vin-r8a77470",
> > +				     "renesas,rcar-gen2-vin";
> 
> This patch looks good but you should also add renesas,vin-r8a77470 to 
> Documentation/devicetree/bindings/media/rcar_vin.txt in a separate 
> patch.
> 
> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

Thanks,

applied for inclusion in v5.2 with the changelog wrapped to 75 columns
wide.

> 
> > +			reg = <0 0xe6ef0000 0 0x1000>;
> > +			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cpg CPG_MOD 811>;
> > +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> > +			resets = <&cpg 811>;
> > +			status = "disabled";
> > +		};
> > +
> > +		vin1: video@e6ef1000 {
> > +			compatible = "renesas,vin-r8a77470",
> > +				     "renesas,rcar-gen2-vin";
> > +			reg = <0 0xe6ef1000 0 0x1000>;
> > +			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
> > +			clocks = <&cpg CPG_MOD 810>;
> > +			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> > +			resets = <&cpg 810>;
> > +			status = "disabled";
> > +		};
> > +
> >  		sdhi0: sd@ee100000 {
> >  			compatible = "renesas,sdhi-r8a77470",
> >  				     "renesas,rcar-gen2-sdhi";
> > -- 
> > 2.7.4
> > 
> 
> -- 
> Regards,
> Niklas Söderlund
> 

Re: [PATCH 05/11] ARM: dts: r8a77470: Add VIN support

[Geert Uytterhoeven]

On Tue, Apr 9, 2019 at 10:52 AM Cao Van Dong <cv-dong@jinso.co.jp> wrote:
> Add vin{0|1} nodes to dtsi for VIN support on the RZ/G1C (r8a77470) SoC.
>
> Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds