linux-renesas-soc.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Biju Das <biju.das.jz@bp.renesas.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Biju Das <biju.das@bp.renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: RE: [PATCH v2 06/11] drivers: clk: renesas: renesas-rzg2l-cpg: Separate reset from module clocks
Date: Fri, 25 Jun 2021 14:50:34 +0000	[thread overview]
Message-ID: <OS0PR01MB59227FBD89B9F5667C05D1AE86069@OS0PR01MB5922.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <CAMuHMdWLdDoL++e7qerjEoO3NtqdoxxN4zoa4XJ9Xy1EoZKVNw@mail.gmail.com>

Hi Geert,

Thanks for the feedback.

> Subject: Re: [PATCH v2 06/11] drivers: clk: renesas: renesas-rzg2l-cpg:
> Separate reset from module clocks
> 
> Hi Biju,
> 
> On Thu, Jun 24, 2021 at 3:03 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > RZ/G2L SoC's have different definitions for clock and reset.
> > Separate reset from module clocks in order to handle it efficiently.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Thanks for your patch!
> 
> > --- a/drivers/clk/renesas/renesas-rzg2l-cpg.h
> > +++ b/drivers/clk/renesas/renesas-rzg2l-cpg.h
> > @@ -99,6 +99,26 @@ struct rzg2l_mod_clk {
> >                 .reset = (_reset) \
> >         }
> >
> > +/**
> > + * struct rzg2l_reset - Reset definitions
> > + *
> > + * @id: reset index in array containing all resets
> > + * @off: register offset
> > + * @reset: reset bits
> 
> bit

OK. Will fix it.

> > + */
> > +struct rzg2l_reset {
> > +       unsigned int id;
> 
> Do you need this field? It seems to be set only.

OK, not required.

Regards,
Biju

> 
> > +       u16 off;
> > +       u8 reset;
> > +};
> > +
> > +#define DEF_RST(_id, _off, _reset)     \
> > +       [_id] = { \
> > +               .id = _id, \
> > +               .off = (_off), \
> > +               .reset = (_reset) \
> > +       }
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
> 
> In personal conversations with technical people, I call myself a hacker.
> But when I'm talking to journalists I just say "programmer" or something
> like that.
>                                 -- Linus Torvalds

  reply	other threads:[~2021-06-25 14:50 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-24 13:02 [PATCH v2 00/11] Update clock definitions Biju Das
2021-06-24 13:02 ` [PATCH v2 01/11] drivers: clk: renesas: renesas-rzg2l-cpg: Add multi clock PM support Biju Das
2021-06-24 13:02 ` [PATCH v2 02/11] drivers: clk: renesas: r9a07g044-cpg: Rename divider table Biju Das
2021-06-25 14:27   ` Geert Uytterhoeven
2021-06-25 14:52     ` Biju Das
2021-06-24 13:02 ` [PATCH v2 03/11] drivers: clk: renesas: r9a07g044-cpg: Fix P1 Clock Biju Das
2021-06-25 14:32   ` Geert Uytterhoeven
2021-06-24 13:02 ` [PATCH v2 04/11] drivers: clk: renesas: r9a07g044-cpg: Add P2 Clock support Biju Das
2021-06-25 14:33   ` Geert Uytterhoeven
2021-06-24 13:02 ` [PATCH v2 05/11] dt-bindings: clk: r9a07g044-cpg: Update clock/reset definitions Biju Das
2021-06-25 14:33   ` Geert Uytterhoeven
2021-06-24 13:02 ` [PATCH v2 06/11] drivers: clk: renesas: renesas-rzg2l-cpg: Separate reset from module clocks Biju Das
2021-06-25 14:42   ` Geert Uytterhoeven
2021-06-25 14:50     ` Biju Das [this message]
2021-06-24 13:02 ` [PATCH v2 07/11] drivers: clk: renesas: r9a07g044-cpg: Update {GIC,IA55,SCIF} clock/reset entries Biju Das
2021-06-25 15:05   ` Geert Uytterhoeven
2021-06-25 16:08     ` Biju Das
2021-06-25 17:42       ` Geert Uytterhoeven
2021-06-25 18:32         ` Biju Das
2021-06-24 13:02 ` [PATCH v2 08/11] arm64: dts: renesas: r9a07g044: Update SCIF0 clock/reset Biju Das
2021-06-25 15:05   ` Geert Uytterhoeven
2021-06-24 13:02 ` [PATCH v2 09/11] drivers: clk: renesas: r9a07g044-cpg: Add I2C clocks/resets Biju Das
2021-06-25 15:06   ` Geert Uytterhoeven
2021-06-24 13:02 ` [PATCH v2 10/11] drivers: clk: renesas: r9a07g044-cpg: Add DMAC clocks/resets Biju Das
2021-06-25 15:12   ` Geert Uytterhoeven
2021-06-24 13:02 ` [PATCH v2 11/11] arm64: dts: renesas: r9a07g044: Add I2C nodes Biju Das
2021-06-25 15:16   ` Geert Uytterhoeven
2021-06-25 17:01     ` Biju Das

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=OS0PR01MB59227FBD89B9F5667C05D1AE86069@OS0PR01MB5922.jpnprd01.prod.outlook.com \
    --to=biju.das.jz@bp.renesas.com \
    --cc=Chris.Paterson2@renesas.com \
    --cc=biju.das@bp.renesas.com \
    --cc=geert@linux-m68k.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
    --cc=sboyd@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).