* [RFC 01/27] clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-28 12:16 ` Christoph Hellwig
2022-09-23 18:55 ` [RFC 02/27] i2c: microchip-corei2c: " Conor Dooley
` (28 subsequent siblings)
29 siblings, 1 reply; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC, we decided that for the sake of consistency the SOC_FOO symbols
in arch/riscv should be replaced with ARCH_FOO so that we could have a
consistent policy regardless of whether a vendor had ARM legacy or was
a RISC-V "incumbent".
The symbol is currently selected by the arch Kconfig, but that is going
to change, so as a precursor to that change the symbol so that it
defaults to the value of ARCH_MICROCHIP. The symbol is only defined by
RISC-V, so there is no reason to also depend on RISCV
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/clk/microchip/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig
index b46e864b3bd8..5c6d780870ab 100644
--- a/drivers/clk/microchip/Kconfig
+++ b/drivers/clk/microchip/Kconfig
@@ -5,7 +5,8 @@ config COMMON_CLK_PIC32
config MCHP_CLK_MPFS
bool "Clk driver for PolarFire SoC"
- depends on (RISCV && SOC_MICROCHIP_POLARFIRE) || COMPILE_TEST
+ depends on ARCH_MICROCHIP || COMPILE_TEST
+ default ARCH_MICROCHIP
select AUXILIARY_BUS
help
Supports Clock Configuration for PolarFire SoC
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [RFC 01/27] clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
2022-09-23 18:55 ` [RFC 01/27] clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP Conor Dooley
@ 2022-09-28 12:16 ` Christoph Hellwig
2022-09-28 12:51 ` Conor Dooley
0 siblings, 1 reply; 43+ messages in thread
From: Christoph Hellwig @ 2022-09-28 12:16 UTC (permalink / raw)
To: Conor Dooley
Cc: linux-riscv, palmer, damien.lemoal, geert, heiko, kernel, arnd,
Conor Dooley
On Fri, Sep 23, 2022 at 07:55:40PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> At LPC, we decided that for the sake of consistency the SOC_FOO symbols
> in arch/riscv should be replaced with ARCH_FOO so that we could have a
> consistent policy regardless of whether a vendor had ARM legacy or was
> a RISC-V "incumbent".
Umm, that's just stupid. The ARCH_ naming in arm is incorrect and a
bad idea. So please move in the correct direction instead even if that
is more work and more churn.
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^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 01/27] clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
2022-09-28 12:16 ` Christoph Hellwig
@ 2022-09-28 12:51 ` Conor Dooley
0 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-28 12:51 UTC (permalink / raw)
To: Christoph Hellwig
Cc: Conor Dooley, linux-riscv, palmer, damien.lemoal, geert, heiko,
kernel, arnd
On Wed, Sep 28, 2022 at 05:16:21AM -0700, Christoph Hellwig wrote:
> On Fri, Sep 23, 2022 at 07:55:40PM +0100, Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > At LPC, we decided that for the sake of consistency the SOC_FOO symbols
> > in arch/riscv should be replaced with ARCH_FOO so that we could have a
> > consistent policy regardless of whether a vendor had ARM legacy or was
> > a RISC-V "incumbent".
>
> Umm, that's just stupid. The ARCH_ naming in arm is incorrect and a
> bad idea. So please move in the correct direction instead even if that
> is more work and more churn.
It's more work for me to change them to ARCH_ than leave them as SOC_.
I don't think _consistency_ is stupid, but given my OCD I am quite
biased there. What is your suggestion for moving incoming ARM vendors
"in the correct direction"?
I would be perfectly happy to change SOC_MICROCHIP_POLARFIRE to
something like SOC_MICROCHIP or SOC_MICROCHIP_FPGA and leave it there
as far as renames go, as long as beyond that there is no ARCH_ARM_VENDOR
+ SOC_ARM_VENDOR muck in the file. Would make the series considerably
smaller as all I would be doing is unifiying how the SOC_ symbols are
being used :)
Thanks,
Conor.
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^ permalink raw reply [flat|nested] 43+ messages in thread
* [RFC 02/27] i2c: microchip-corei2c: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
2022-09-23 18:55 ` [RFC 01/27] clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 03/27] mailbox: mpfs: " Conor Dooley
` (27 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC, we decided that for the sake of consistency the SOC_FOO symbols
in arch/riscv should be replaced with ARCH_FOO so that we could have a
consistent policy regardless of whether a vendor had ARM legacy or was
a RISC-V "incumbent".
microchip-corei2c depends on the SOC version of the symbol, so convert
it.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/i2c/busses/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 0c48d8a9f44a..9915aea1ad8b 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -785,7 +785,7 @@ config I2C_MESON
config I2C_MICROCHIP_CORE
tristate "Microchip FPGA I2C controller"
- depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST
+ depends on ARCH_MICROCHIP || COMPILE_TEST
depends on OF
help
If you say yes to this option, support will be included for the
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 03/27] mailbox: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
2022-09-23 18:55 ` [RFC 01/27] clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP Conor Dooley
2022-09-23 18:55 ` [RFC 02/27] i2c: microchip-corei2c: " Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 04/27] usb: musb: " Conor Dooley
` (26 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC, we decided that for the sake of consistency the SOC_FOO symbols
in arch/riscv should be replaced with ARCH_FOO so that we could have a
consistent policy regardless of whether a vendor had ARM legacy or was
a RISC-V "incumbent".
The PolarFire SoC mailbox depends on the SOC version of the symbol, so
convert it.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/mailbox/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index 05d6fae800e3..ba4700f69a5a 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -175,7 +175,7 @@ config MAILBOX_TEST
config POLARFIRE_SOC_MAILBOX
tristate "PolarFire SoC (MPFS) Mailbox"
depends on HAS_IOMEM
- depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST
+ depends on ARCH_MICROCHIP || COMPILE_TEST
help
This driver adds support for the PolarFire SoC (MPFS) mailbox controller.
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 04/27] usb: musb: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (2 preceding siblings ...)
2022-09-23 18:55 ` [RFC 03/27] mailbox: mpfs: " Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 05/27] rtc: " Conor Dooley
` (25 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC, we decided that for the sake of consistency the SOC_FOO symbols
in arch/riscv should be replaced with ARCH_FOO so that we could have a
consistent policy regardless of whether a vendor had ARM legacy or was
a RISC-V "incumbent".
The PolarFire SoC musb driver depends on the SOC symbol, so convert it.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/usb/musb/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 6c8f7763e75e..8304709e490c 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -125,7 +125,7 @@ config USB_MUSB_MEDIATEK
config USB_MUSB_POLARFIRE_SOC
tristate "Microchip PolarFire SoC platforms"
- depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST
+ depends on ARCH_MICROCHIP || COMPILE_TEST
depends on NOP_USB_XCEIV
select USB_MUSB_DUAL_ROLE
help
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 05/27] rtc: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (3 preceding siblings ...)
2022-09-23 18:55 ` [RFC 04/27] usb: musb: " Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 06/27] riscv: stop selecting the PolarFire SoC clock driver Conor Dooley
` (24 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC, we decided that for the sake of consistency the SOC_FOO symbols
in arch/riscv should be replaced with ARCH_FOO so that we could have a
consistent policy regardless of whether a vendor had ARM legacy or was
a RISC-V "incumbent".
As the PolarFire SoC RTC depends on the SOC_ symbol convert it, and
while we are at it, add the ability to compile test it for the craic.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/rtc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index b8de25118ad0..fe0ea16aa571 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1986,7 +1986,7 @@ config RTC_DRV_MSC313
config RTC_DRV_POLARFIRE_SOC
tristate "Microchip PolarFire SoC built-in RTC"
- depends on SOC_MICROCHIP_POLARFIRE
+ depends on ARCH_MICROCHIP || COMPILE_TEST
help
If you say yes here you will get support for the
built-in RTC on Polarfire SoC.
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 06/27] riscv: stop selecting the PolarFire SoC clock driver
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (4 preceding siblings ...)
2022-09-23 18:55 ` [RFC 05/27] rtc: " Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE Conor Dooley
` (23 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
The driver is now enabled by default if ARCH_MICROCHIP so there is no
longer a need to select it in Kconfig.socs
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/Kconfig.socs | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 20b7f17614f1..c4c7add1516f 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -2,7 +2,6 @@ menu "SoC selection"
config ARCH_MICROCHIP
bool "Microchip SoC FPGAs"
- select MCHP_CLK_MPFS
select SIFIVE_PLIC
help
This enables support for Microchip SoC FPGAs.
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (5 preceding siblings ...)
2022-09-23 18:55 ` [RFC 06/27] riscv: stop selecting the PolarFire SoC clock driver Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 19:09 ` Heiko Stuebner
2022-09-23 18:55 ` [RFC 08/27] clk: starfive: " Conor Dooley
` (22 subsequent siblings)
29 siblings, 1 reply; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
As discussed at LPC, the SOC_ symbols are being converted to ARCH_
for the sake of consistency between "incumbent" vendors and those who
have a legacy from other archs.
Convert SOC_STARFIVE to ARCH_STARFIVE across arch/riscv
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/Kconfig.socs | 2 +-
arch/riscv/boot/dts/starfive/Makefile | 2 +-
arch/riscv/configs/defconfig | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index c4c7add1516f..910697baf097 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -17,7 +17,7 @@ config SOC_SIFIVE
help
This enables support for SiFive SoC platform hardware.
-config SOC_STARFIVE
+config ARCH_STARFIVE
bool "StarFive SoCs"
select PINCTRL
select RESET_CONTROLLER
diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
index 039c143cba33..7b00a48580ca 100644
--- a/arch/riscv/boot/dts/starfive/Makefile
+++ b/arch/riscv/boot/dts/starfive/Makefile
@@ -1,2 +1,2 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
+dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index dac14b95c73d..971986be875f 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -27,7 +27,7 @@ CONFIG_EXPERT=y
CONFIG_PROFILING=y
CONFIG_ARCH_MICROCHIP_POLARFIRE=y
CONFIG_SOC_SIFIVE=y
-CONFIG_SOC_STARFIVE=y
+CONFIG_ARCH_STARFIVE=y
CONFIG_SOC_VIRT=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE
2022-09-23 18:55 ` [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE Conor Dooley
@ 2022-09-23 19:09 ` Heiko Stuebner
2022-09-23 19:14 ` Conor Dooley
0 siblings, 1 reply; 43+ messages in thread
From: Heiko Stuebner @ 2022-09-23 19:09 UTC (permalink / raw)
To: linux-riscv, Conor Dooley
Cc: palmer, damien.lemoal, geert, kernel, arnd, Conor Dooley
Hi Conor,
Am Freitag, 23. September 2022, 20:55:46 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> As discussed at LPC, the SOC_ symbols are being converted to ARCH_
> for the sake of consistency between "incumbent" vendors and those who
> have a legacy from other archs.
>
> Convert SOC_STARFIVE to ARCH_STARFIVE across arch/riscv
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> arch/riscv/Kconfig.socs | 2 +-
> arch/riscv/boot/dts/starfive/Makefile | 2 +-
> arch/riscv/configs/defconfig | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index c4c7add1516f..910697baf097 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -17,7 +17,7 @@ config SOC_SIFIVE
> help
> This enables support for SiFive SoC platform hardware.
>
> -config SOC_STARFIVE
> +config ARCH_STARFIVE
doesn't this create a bisection issue?
I.e. the clk-Makefile in the following patch will still do
obj-$(CONFIG_SOC_STARFIVE) += starfive/
at this point, so if a git bisect lands here, you stop building
the clock-driver (and maybe more).
I guess some intermediate solution might be helpful, like
introduce the ARCH_STARFIVE and make SOC_STARFIVE select it.
Then do the conversions and after that drop SOC_STARFIVE?
Heiko
> bool "StarFive SoCs"
> select PINCTRL
> select RESET_CONTROLLER
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 039c143cba33..7b00a48580ca 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -1,2 +1,2 @@
> # SPDX-License-Identifier: GPL-2.0
> -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index dac14b95c73d..971986be875f 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -27,7 +27,7 @@ CONFIG_EXPERT=y
> CONFIG_PROFILING=y
> CONFIG_ARCH_MICROCHIP_POLARFIRE=y
> CONFIG_SOC_SIFIVE=y
> -CONFIG_SOC_STARFIVE=y
> +CONFIG_ARCH_STARFIVE=y
> CONFIG_SOC_VIRT=y
> CONFIG_SMP=y
> CONFIG_HOTPLUG_CPU=y
>
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^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE
2022-09-23 19:09 ` Heiko Stuebner
@ 2022-09-23 19:14 ` Conor Dooley
2022-09-23 19:20 ` Heiko Stuebner
0 siblings, 1 reply; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 19:14 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-riscv, palmer, damien.lemoal, geert, kernel, arnd, Conor Dooley
On Fri, Sep 23, 2022 at 09:09:03PM +0200, Heiko Stuebner wrote:
> Hi Conor,
>
> Am Freitag, 23. September 2022, 20:55:46 CEST schrieb Conor Dooley:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > As discussed at LPC, the SOC_ symbols are being converted to ARCH_
> > for the sake of consistency between "incumbent" vendors and those who
> > have a legacy from other archs.
> >
> > Convert SOC_STARFIVE to ARCH_STARFIVE across arch/riscv
> >
> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > ---
> > arch/riscv/Kconfig.socs | 2 +-
> > arch/riscv/boot/dts/starfive/Makefile | 2 +-
> > arch/riscv/configs/defconfig | 2 +-
> > 3 files changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> > index c4c7add1516f..910697baf097 100644
> > --- a/arch/riscv/Kconfig.socs
> > +++ b/arch/riscv/Kconfig.socs
> > @@ -17,7 +17,7 @@ config SOC_SIFIVE
> > help
> > This enables support for SiFive SoC platform hardware.
> >
> > -config SOC_STARFIVE
> > +config ARCH_STARFIVE
>
> doesn't this create a bisection issue?
Yeah, I thought of that midway through and then promptly forgot about
it... I'll sort it out for v1.
Thanks.
> I.e. the clk-Makefile in the following patch will still do
>
> obj-$(CONFIG_SOC_STARFIVE) += starfive/
>
> at this point, so if a git bisect lands here, you stop building
> the clock-driver (and maybe more).
>
> I guess some intermediate solution might be helpful, like
> introduce the ARCH_STARFIVE and make SOC_STARFIVE select it.
> Then do the conversions and after that drop SOC_STARFIVE?
>
>
> Heiko
>
>
> > bool "StarFive SoCs"
> > select PINCTRL
> > select RESET_CONTROLLER
> > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> > index 039c143cba33..7b00a48580ca 100644
> > --- a/arch/riscv/boot/dts/starfive/Makefile
> > +++ b/arch/riscv/boot/dts/starfive/Makefile
> > @@ -1,2 +1,2 @@
> > # SPDX-License-Identifier: GPL-2.0
> > -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> > +dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > index dac14b95c73d..971986be875f 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -27,7 +27,7 @@ CONFIG_EXPERT=y
> > CONFIG_PROFILING=y
> > CONFIG_ARCH_MICROCHIP_POLARFIRE=y
> > CONFIG_SOC_SIFIVE=y
> > -CONFIG_SOC_STARFIVE=y
> > +CONFIG_ARCH_STARFIVE=y
> > CONFIG_SOC_VIRT=y
> > CONFIG_SMP=y
> > CONFIG_HOTPLUG_CPU=y
> >
>
>
>
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
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^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE
2022-09-23 19:14 ` Conor Dooley
@ 2022-09-23 19:20 ` Heiko Stuebner
2022-09-23 19:22 ` Conor Dooley
0 siblings, 1 reply; 43+ messages in thread
From: Heiko Stuebner @ 2022-09-23 19:20 UTC (permalink / raw)
To: Conor Dooley
Cc: linux-riscv, palmer, damien.lemoal, geert, kernel, arnd, Conor Dooley
Am Freitag, 23. September 2022, 21:14:58 CEST schrieb Conor Dooley:
> On Fri, Sep 23, 2022 at 09:09:03PM +0200, Heiko Stuebner wrote:
> > Hi Conor,
> >
> > Am Freitag, 23. September 2022, 20:55:46 CEST schrieb Conor Dooley:
> > > From: Conor Dooley <conor.dooley@microchip.com>
> > >
> > > As discussed at LPC, the SOC_ symbols are being converted to ARCH_
> > > for the sake of consistency between "incumbent" vendors and those who
> > > have a legacy from other archs.
> > >
> > > Convert SOC_STARFIVE to ARCH_STARFIVE across arch/riscv
> > >
> > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> > > ---
> > > arch/riscv/Kconfig.socs | 2 +-
> > > arch/riscv/boot/dts/starfive/Makefile | 2 +-
> > > arch/riscv/configs/defconfig | 2 +-
> > > 3 files changed, 3 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> > > index c4c7add1516f..910697baf097 100644
> > > --- a/arch/riscv/Kconfig.socs
> > > +++ b/arch/riscv/Kconfig.socs
> > > @@ -17,7 +17,7 @@ config SOC_SIFIVE
> > > help
> > > This enables support for SiFive SoC platform hardware.
> > >
> > > -config SOC_STARFIVE
> > > +config ARCH_STARFIVE
> >
> > doesn't this create a bisection issue?
>
> Yeah, I thought of that midway through and then promptly forgot about
> it... I'll sort it out for v1.
It's of course the same for sifive and probably more.
ARCH_MICROCHIP was pre-existing in your series, so that transistion
goes way smoother - though I haven't been able to find where that
symbol actually got added :-) .
I.e. in Palmers next branchs the symbol is still SOC_MICROCHIP_POLARFIRE
Heiko
> > I.e. the clk-Makefile in the following patch will still do
> >
> > obj-$(CONFIG_SOC_STARFIVE) += starfive/
> >
> > at this point, so if a git bisect lands here, you stop building
> > the clock-driver (and maybe more).
> >
> > I guess some intermediate solution might be helpful, like
> > introduce the ARCH_STARFIVE and make SOC_STARFIVE select it.
> > Then do the conversions and after that drop SOC_STARFIVE?
> >
> >
> > Heiko
> >
> >
> > > bool "StarFive SoCs"
> > > select PINCTRL
> > > select RESET_CONTROLLER
> > > diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> > > index 039c143cba33..7b00a48580ca 100644
> > > --- a/arch/riscv/boot/dts/starfive/Makefile
> > > +++ b/arch/riscv/boot/dts/starfive/Makefile
> > > @@ -1,2 +1,2 @@
> > > # SPDX-License-Identifier: GPL-2.0
> > > -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> > > +dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb
> > > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > > index dac14b95c73d..971986be875f 100644
> > > --- a/arch/riscv/configs/defconfig
> > > +++ b/arch/riscv/configs/defconfig
> > > @@ -27,7 +27,7 @@ CONFIG_EXPERT=y
> > > CONFIG_PROFILING=y
> > > CONFIG_ARCH_MICROCHIP_POLARFIRE=y
> > > CONFIG_SOC_SIFIVE=y
> > > -CONFIG_SOC_STARFIVE=y
> > > +CONFIG_ARCH_STARFIVE=y
> > > CONFIG_SOC_VIRT=y
> > > CONFIG_SMP=y
> > > CONFIG_HOTPLUG_CPU=y
> > >
> >
> >
> >
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>
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^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE
2022-09-23 19:20 ` Heiko Stuebner
@ 2022-09-23 19:22 ` Conor Dooley
0 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 19:22 UTC (permalink / raw)
To: Heiko Stuebner
Cc: linux-riscv, palmer, damien.lemoal, geert, kernel, arnd, Conor Dooley
On 23/09/2022 20:20, Heiko Stuebner wrote:
> Am Freitag, 23. September 2022, 21:14:58 CEST schrieb Conor Dooley:
>> On Fri, Sep 23, 2022 at 09:09:03PM +0200, Heiko Stuebner wrote:
>>> Hi Conor,
>>>
>>> Am Freitag, 23. September 2022, 20:55:46 CEST schrieb Conor Dooley:
>>>> From: Conor Dooley <conor.dooley@microchip.com>
>>>>
>>>> As discussed at LPC, the SOC_ symbols are being converted to ARCH_
>>>> for the sake of consistency between "incumbent" vendors and those who
>>>> have a legacy from other archs.
>>>>
>>>> Convert SOC_STARFIVE to ARCH_STARFIVE across arch/riscv
>>>>
>>>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
>>>> ---
>>>> arch/riscv/Kconfig.socs | 2 +-
>>>> arch/riscv/boot/dts/starfive/Makefile | 2 +-
>>>> arch/riscv/configs/defconfig | 2 +-
>>>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
>>>> index c4c7add1516f..910697baf097 100644
>>>> --- a/arch/riscv/Kconfig.socs
>>>> +++ b/arch/riscv/Kconfig.socs
>>>> @@ -17,7 +17,7 @@ config SOC_SIFIVE
>>>> help
>>>> This enables support for SiFive SoC platform hardware.
>>>>
>>>> -config SOC_STARFIVE
>>>> +config ARCH_STARFIVE
>>>
>>> doesn't this create a bisection issue?
>>
>> Yeah, I thought of that midway through and then promptly forgot about
>> it... I'll sort it out for v1.
>
> It's of course the same for sifive and probably more.
>
> ARCH_MICROCHIP was pre-existing in your series, so that transistion
> goes way smoother - though I haven't been able to find where that
> symbol actually got added :-) .
>
> I.e. in Palmers next branchs the symbol is still SOC_MICROCHIP_POLARFIRE
Ah for god's sake, I gave the wrong hash to format-patch lol.
I didn't check carefully to be honest as I wasn't too concerned about
the content and more about how I would break the series up!
I am glad I said RFC...
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^ permalink raw reply [flat|nested] 43+ messages in thread
* [RFC 08/27] clk: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (6 preceding siblings ...)
2022-09-23 18:55 ` [RFC 07/27] riscv: replace SOC_STARFIVE with ARCH_STARFIVE Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 09/27] pinctrl: " Conor Dooley
` (21 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC we decided to replace the SOC_ symbols in arch/riscv with ARCH_
variants, for the sake of consistency between "incumbent" vendors and
those with legacy in other architectures. To that end, replace the
SOC_STARFIVE symbol with ARCH_STARFIVE.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/clk/Makefile | 2 +-
drivers/clk/starfive/Kconfig | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d5db170d38d2..c04628f8bb7d 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -116,7 +116,7 @@ obj-$(CONFIG_PLAT_SPEAR) += spear/
obj-y += sprd/
obj-$(CONFIG_ARCH_STI) += st/
obj-$(CONFIG_ARCH_STM32) += stm32/
-obj-$(CONFIG_SOC_STARFIVE) += starfive/
+obj-$(CONFIG_ARCH_STARFIVE) += starfive/
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
obj-y += sunxi-ng/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
diff --git a/drivers/clk/starfive/Kconfig b/drivers/clk/starfive/Kconfig
index 003bd2d56ce7..ef3517f4a276 100644
--- a/drivers/clk/starfive/Kconfig
+++ b/drivers/clk/starfive/Kconfig
@@ -2,8 +2,8 @@
config CLK_STARFIVE_JH7100
bool "StarFive JH7100 clock support"
- depends on SOC_STARFIVE || COMPILE_TEST
- default SOC_STARFIVE
+ depends on ARCH_STARFIVE || COMPILE_TEST
+ default ARCH_STARFIVE
help
Say yes here to support the clock controller on the StarFive JH7100
SoC.
@@ -11,7 +11,7 @@ config CLK_STARFIVE_JH7100
config CLK_STARFIVE_JH7100_AUDIO
tristate "StarFive JH7100 audio clock support"
depends on CLK_STARFIVE_JH7100
- default m if SOC_STARFIVE
+ default m if ARCH_STARFIVE
help
Say Y or M here to support the audio clocks on the StarFive JH7100
SoC.
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 09/27] pinctrl: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (7 preceding siblings ...)
2022-09-23 18:55 ` [RFC 08/27] clk: starfive: " Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 10/27] reset: " Conor Dooley
` (20 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC we decided to replace the SOC_ symbols in arch/riscv with ARCH_
variants, for the sake of consistency between "incumbent" vendors and
those with legacy in other architectures. To that end, replace the
SOC_STARFIVE symbol with ARCH_STARFIVE.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/pinctrl/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index da87f2dc358b..8862a71de8af 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -433,9 +433,9 @@ config PINCTRL_ST
config PINCTRL_STARFIVE
tristate "Pinctrl and GPIO driver for the StarFive JH7100 SoC"
- depends on SOC_STARFIVE || COMPILE_TEST
+ depends on ARCH_STARFIVE || COMPILE_TEST
depends on OF
- default SOC_STARFIVE
+ default ARCH_STARFIVE
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GENERIC_PINCONF
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 10/27] reset: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (8 preceding siblings ...)
2022-09-23 18:55 ` [RFC 09/27] pinctrl: " Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 11/27] riscv: replace SOC_SIFIVE with ARCH_SIFIVE Conor Dooley
` (19 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC we decided to replace the SOC_ symbols in arch/riscv with ARCH_
variants, for the sake of consistency between "incumbent" vendors and
those with legacy in other architectures. To that end, replace the
SOC_STARFIVE symbol with ARCH_STARFIVE.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/reset/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index de176c2fbad9..a69bd6ef3110 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -234,8 +234,8 @@ config RESET_SOCFPGA
config RESET_STARFIVE_JH7100
bool "StarFive JH7100 Reset Driver"
- depends on SOC_STARFIVE || COMPILE_TEST
- default SOC_STARFIVE
+ depends on ARCH_STARFIVE || COMPILE_TEST
+ default ARCH_STARFIVE
help
This enables the reset controller driver for the StarFive JH7100 SoC.
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 11/27] riscv: replace SOC_SIFIVE with ARCH_SIFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (9 preceding siblings ...)
2022-09-23 18:55 ` [RFC 10/27] reset: " Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 12/27] soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
` (18 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
Per discussion at LPC, the SoC/platform Kconfig symbols in RISC-V land
are to be converted to ARCH_FOO from SOC_FOO so that the symbols are
consistent between the "incumbents" & those coming from ARM64 etc.
Predictably, SOC_SIFIVE becomes ARCH_SIFIVE.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/Kconfig.socs | 2 +-
arch/riscv/boot/dts/sifive/Makefile | 2 +-
arch/riscv/configs/defconfig | 2 +-
arch/riscv/configs/rv32_defconfig | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 910697baf097..3604b90251b4 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -6,7 +6,7 @@ config ARCH_MICROCHIP
help
This enables support for Microchip SoC FPGAs.
-config SOC_SIFIVE
+config ARCH_SIFIVE
bool "SiFive SoCs"
select SERIAL_SIFIVE if TTY
select SERIAL_SIFIVE_CONSOLE if TTY
diff --git a/arch/riscv/boot/dts/sifive/Makefile b/arch/riscv/boot/dts/sifive/Makefile
index d90e4eb0ade8..b1c2d563a0e6 100644
--- a/arch/riscv/boot/dts/sifive/Makefile
+++ b/arch/riscv/boot/dts/sifive/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb \
+dtb-$(CONFIG_ARCH_SIFIVE) += hifive-unleashed-a00.dtb \
hifive-unmatched-a00.dtb
obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 971986be875f..bfb6f6f57ae2 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -26,7 +26,7 @@ CONFIG_EXPERT=y
# CONFIG_SYSFS_SYSCALL is not set
CONFIG_PROFILING=y
CONFIG_ARCH_MICROCHIP_POLARFIRE=y
-CONFIG_SOC_SIFIVE=y
+CONFIG_ARCH_SIFIVE=y
CONFIG_ARCH_STARFIVE=y
CONFIG_SOC_VIRT=y
CONFIG_SMP=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 38760e4296cf..4badab395546 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -16,7 +16,7 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_SYSFS_SYSCALL is not set
CONFIG_PROFILING=y
-CONFIG_SOC_SIFIVE=y
+CONFIG_ARCH_SIFIVE=y
CONFIG_SOC_VIRT=y
CONFIG_NONPORTABLE=y
CONFIG_ARCH_RV32I=y
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 12/27] soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (10 preceding siblings ...)
2022-09-23 18:55 ` [RFC 11/27] riscv: replace SOC_SIFIVE with ARCH_SIFIVE Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 13/27] clk: " Conor Dooley
` (17 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
As discussed at LPC, the SOC_ symbols in arch/riscv are being converted
to ARCH_, so SOC_SIFIVE becomes ARCH_SIFIVE. As the entirety of the
SiFive subdirectory is gated by "if ARCH_SIFIVE" in its Kconfig, the
sub-Makefile can always be included.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/soc/Makefile | 2 +-
drivers/soc/sifive/Kconfig | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 69ba6508cf2c..534669840858 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -26,7 +26,7 @@ obj-y += qcom/
obj-y += renesas/
obj-y += rockchip/
obj-$(CONFIG_SOC_SAMSUNG) += samsung/
-obj-$(CONFIG_SOC_SIFIVE) += sifive/
+obj-y += sifive/
obj-y += sunxi/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-y += ti/
diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig
index 58cf8c40d08d..9f52227c3cce 100644
--- a/drivers/soc/sifive/Kconfig
+++ b/drivers/soc/sifive/Kconfig
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
-if SOC_SIFIVE
+if ARCH_SIFIVE
config SIFIVE_L2
bool "Sifive L2 Cache controller"
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 13/27] clk: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (11 preceding siblings ...)
2022-09-23 18:55 ` [RFC 12/27] soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 14/27] clk: sifive: select by default if ARCH_SIFIVE Conor Dooley
` (16 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC we decided to convert all of the SOC_ symbols in arch/riscv to
ARCH_ for consistency between "incumbent" vendors and those with a
legacy from other architectures. To that end, swap SOC_SIFIVE for
ARCH_SIFIVE & depend on it rather than RISCV.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/clk/sifive/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sifive/Kconfig b/drivers/clk/sifive/Kconfig
index 9132c3c4aa86..b21f4cbc3583 100644
--- a/drivers/clk/sifive/Kconfig
+++ b/drivers/clk/sifive/Kconfig
@@ -2,7 +2,7 @@
menuconfig CLK_SIFIVE
bool "SiFive SoC driver support"
- depends on RISCV || COMPILE_TEST
+ depends on ARCH_SIFIVE || COMPILE_TEST
help
SoC drivers for SiFive Linux-capable SoCs.
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 14/27] clk: sifive: select by default if ARCH_SIFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (12 preceding siblings ...)
2022-09-23 18:55 ` [RFC 13/27] clk: " Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 15/27] serial: " Conor Dooley
` (15 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
With the aim of dropping direct selects of drivers from Kconfig.socs,
default the SiFive clock drivers to the value of ARCH_SIFIVE.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/clk/sifive/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/sifive/Kconfig b/drivers/clk/sifive/Kconfig
index b21f4cbc3583..2322f634a910 100644
--- a/drivers/clk/sifive/Kconfig
+++ b/drivers/clk/sifive/Kconfig
@@ -3,6 +3,7 @@
menuconfig CLK_SIFIVE
bool "SiFive SoC driver support"
depends on ARCH_SIFIVE || COMPILE_TEST
+ default ARCH_SIFIVE
help
SoC drivers for SiFive Linux-capable SoCs.
@@ -10,6 +11,7 @@ if CLK_SIFIVE
config CLK_SIFIVE_PRCI
bool "PRCI driver for SiFive SoCs"
+ default ARCH_SIFIVE
select RESET_CONTROLLER
select RESET_SIMPLE
select CLK_ANALOGBITS_WRPLL_CLN28HPC
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 15/27] serial: sifive: select by default if ARCH_SIFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (13 preceding siblings ...)
2022-09-23 18:55 ` [RFC 14/27] clk: sifive: select by default if ARCH_SIFIVE Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 16/27] PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
` (14 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
With the aim of dropping direct selects of drivers from Kconfig.socs,
default the SiFive serial drivers to the value of ARCH_SIFIVE.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/tty/serial/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 2a18a42a5004..daadcfe2703c 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -972,6 +972,7 @@ config SERIAL_OMAP_CONSOLE
config SERIAL_SIFIVE
tristate "SiFive UART support"
depends on OF
+ default ARCH_SIFIVE
select SERIAL_CORE
help
Select this option if you are building a kernel for a device that
@@ -981,6 +982,7 @@ config SERIAL_SIFIVE
config SERIAL_SIFIVE_CONSOLE
bool "Console on SiFive UART"
depends on SERIAL_SIFIVE=y
+ default ARCH_SIFIVE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
help
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 16/27] PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (14 preceding siblings ...)
2022-09-23 18:55 ` [RFC 15/27] serial: " Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 17/27] riscv: stop selecting SiFive clock and serial drivers directly Conor Dooley
` (13 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC we decided to convert all of the SOC_ symbols in arch/riscv to
ARCH_ for consistency between "incumbent" vendors and those with a
legacy from other architectures. To that end, swap SOC_SIFIVE for
ARCH_SIFIVE & depend on it rather than RISCV.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/pci/controller/dwc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
index 62ce3abf0f19..b42a246a68cd 100644
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -378,7 +378,7 @@ config PCIE_AL
config PCIE_FU740
bool "SiFive FU740 PCIe host controller"
depends on PCI_MSI_IRQ_DOMAIN
- depends on SOC_SIFIVE || COMPILE_TEST
+ depends on ARCH_SIFIVE || COMPILE_TEST
select PCIE_DW_HOST
help
Say Y here if you want PCIe controller support for the SiFive
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 17/27] riscv: stop selecting SiFive clock and serial drivers directly
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (15 preceding siblings ...)
2022-09-23 18:55 ` [RFC 16/27] PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 18/27] riscv: convert SOC_VIRT to ARCH_VIRT Conor Dooley
` (12 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
The SiFive clock and serial drivers will now default to the value of
ARCH_SIFIVE so there is no need to directly select their symbols
anymore.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/Kconfig.socs | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 3604b90251b4..811338720cbd 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -8,10 +8,6 @@ config ARCH_MICROCHIP
config ARCH_SIFIVE
bool "SiFive SoCs"
- select SERIAL_SIFIVE if TTY
- select SERIAL_SIFIVE_CONSOLE if TTY
- select CLK_SIFIVE
- select CLK_SIFIVE_PRCI
select SIFIVE_PLIC
select ERRATA_SIFIVE if !XIP_KERNEL
help
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 18/27] riscv: convert SOC_VIRT to ARCH_VIRT
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (16 preceding siblings ...)
2022-09-23 18:55 ` [RFC 17/27] riscv: stop selecting SiFive clock and serial drivers directly Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 19/27] kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config Conor Dooley
` (11 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
As per discussion at LPC, the SOC_ prefaced symbols are to be converted
to an ARCH_ prefix for consistency between "incumbent" vendors and
those with a legacy in other architectures. Rename SOC_VIRT to ARCH_VIRT.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/Kconfig.socs | 2 +-
arch/riscv/configs/defconfig | 2 +-
arch/riscv/configs/nommu_virt_defconfig | 2 +-
arch/riscv/configs/rv32_defconfig | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 811338720cbd..9a216deb5c9c 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -21,7 +21,7 @@ config ARCH_STARFIVE
help
This enables support for StarFive SoC platform hardware.
-config SOC_VIRT
+config ARCH_VIRT
bool "QEMU Virt Machine"
select CLINT_TIMER if RISCV_M_MODE
select POWER_RESET
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index bfb6f6f57ae2..341202b90c7f 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -28,7 +28,7 @@ CONFIG_PROFILING=y
CONFIG_ARCH_MICROCHIP_POLARFIRE=y
CONFIG_ARCH_SIFIVE=y
CONFIG_ARCH_STARFIVE=y
-CONFIG_SOC_VIRT=y
+CONFIG_ARCH_VIRT=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_PM=y
diff --git a/arch/riscv/configs/nommu_virt_defconfig b/arch/riscv/configs/nommu_virt_defconfig
index 1a56eda5ce46..9ad6a182d932 100644
--- a/arch/riscv/configs/nommu_virt_defconfig
+++ b/arch/riscv/configs/nommu_virt_defconfig
@@ -24,7 +24,7 @@ CONFIG_EXPERT=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLOB=y
# CONFIG_MMU is not set
-CONFIG_SOC_VIRT=y
+CONFIG_ARCH_VIRT=y
CONFIG_NONPORTABLE=y
CONFIG_SMP=y
CONFIG_CMDLINE="root=/dev/vda rw earlycon=uart8250,mmio,0x10000000,115200n8 console=ttyS0"
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 4badab395546..ffa5e8f05ae6 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -17,7 +17,7 @@ CONFIG_EXPERT=y
# CONFIG_SYSFS_SYSCALL is not set
CONFIG_PROFILING=y
CONFIG_ARCH_SIFIVE=y
-CONFIG_SOC_VIRT=y
+CONFIG_ARCH_VIRT=y
CONFIG_NONPORTABLE=y
CONFIG_ARCH_RV32I=y
CONFIG_SMP=y
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 19/27] kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (17 preceding siblings ...)
2022-09-23 18:55 ` [RFC 18/27] riscv: convert SOC_VIRT to ARCH_VIRT Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-23 18:55 ` [RFC 20/27] wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv Conor Dooley
` (10 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC we decided to convert all of the SOC_ symbols in arch/riscv to
ARCH_ for consistency between "incumbent" vendors and those with a
legacy from other architectures. To that end, swap SOC_VIRT for
ARCH_VIRT.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
tools/testing/kunit/qemu_configs/riscv.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/testing/kunit/qemu_configs/riscv.py b/tools/testing/kunit/qemu_configs/riscv.py
index 6207be146d26..ab24b5b1be38 100644
--- a/tools/testing/kunit/qemu_configs/riscv.py
+++ b/tools/testing/kunit/qemu_configs/riscv.py
@@ -17,7 +17,7 @@ if not os.path.isfile(OPENSBI_FILE):
QEMU_ARCH = QemuArchParams(linux_arch='riscv',
kconfig='''
-CONFIG_SOC_VIRT=y
+CONFIG_ARCH_VIRT=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 20/27] wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (18 preceding siblings ...)
2022-09-23 18:55 ` [RFC 19/27] kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config Conor Dooley
@ 2022-09-23 18:55 ` Conor Dooley
2022-09-24 10:03 ` Jason A. Donenfeld
2022-09-23 18:56 ` [RFC 21/27] riscv: convert SOC_CANAAN to ARCH_CANAAN Conor Dooley
` (9 subsequent siblings)
29 siblings, 1 reply; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:55 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
At LPC we decided to convert all of the SOC_ symbols in arch/riscv to
ARCH_ for consistency between "incumbent" vendors and those with a
legacy from other architectures. To that end, swap SOC_VIRT for
ARCH_VIRT.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
tools/testing/selftests/wireguard/qemu/arch/riscv32.config | 2 +-
tools/testing/selftests/wireguard/qemu/arch/riscv64.config | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/testing/selftests/wireguard/qemu/arch/riscv32.config b/tools/testing/selftests/wireguard/qemu/arch/riscv32.config
index 2fc36efb166d..2500eaa9b469 100644
--- a/tools/testing/selftests/wireguard/qemu/arch/riscv32.config
+++ b/tools/testing/selftests/wireguard/qemu/arch/riscv32.config
@@ -2,7 +2,7 @@ CONFIG_NONPORTABLE=y
CONFIG_ARCH_RV32I=y
CONFIG_MMU=y
CONFIG_FPU=y
-CONFIG_SOC_VIRT=y
+CONFIG_ARCH_VIRT=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
diff --git a/tools/testing/selftests/wireguard/qemu/arch/riscv64.config b/tools/testing/selftests/wireguard/qemu/arch/riscv64.config
index dc266f3b1915..29a67ac67766 100644
--- a/tools/testing/selftests/wireguard/qemu/arch/riscv64.config
+++ b/tools/testing/selftests/wireguard/qemu/arch/riscv64.config
@@ -1,7 +1,7 @@
CONFIG_ARCH_RV64I=y
CONFIG_MMU=y
CONFIG_FPU=y
-CONFIG_SOC_VIRT=y
+CONFIG_ARCH_VIRT=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
--
2.37.3
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [RFC 20/27] wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv
2022-09-23 18:55 ` [RFC 20/27] wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv Conor Dooley
@ 2022-09-24 10:03 ` Jason A. Donenfeld
0 siblings, 0 replies; 43+ messages in thread
From: Jason A. Donenfeld @ 2022-09-24 10:03 UTC (permalink / raw)
To: Conor Dooley
Cc: linux-riscv, palmer, damien.lemoal, geert, heiko, kernel, arnd,
Conor Dooley
On Fri, Sep 23, 2022 at 07:55:59PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> At LPC we decided to convert all of the SOC_ symbols in arch/riscv to
> ARCH_ for consistency between "incumbent" vendors and those with a
> legacy from other architectures. To that end, swap SOC_VIRT for
> ARCH_VIRT.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Jason A. Donenfeld <Jason@zx2c4.com>
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^ permalink raw reply [flat|nested] 43+ messages in thread
* [RFC 21/27] riscv: convert SOC_CANAAN to ARCH_CANAAN
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (19 preceding siblings ...)
2022-09-23 18:55 ` [RFC 20/27] wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv Conor Dooley
@ 2022-09-23 18:56 ` Conor Dooley
2022-09-23 18:56 ` [RFC 22/27] clk: k210: " Conor Dooley
` (8 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:56 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
As per the discussions at LPC, the SOC_ symbols in Kconfig.socs are to
be converted to ARCH_ for consistency between "incumbent" and incoming
vendors who have a legacy in other architectures. SOC_CANAAN therefore
becomes ARCH_CANAAN.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/Kconfig.socs | 16 ++++++++--------
arch/riscv/Makefile | 2 +-
arch/riscv/boot/dts/Makefile | 2 +-
arch/riscv/boot/dts/canaan/Makefile | 14 +++++++-------
arch/riscv/configs/nommu_k210_defconfig | 2 +-
arch/riscv/configs/nommu_k210_sdcard_defconfig | 2 +-
6 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 9a216deb5c9c..f195cae638c0 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -36,7 +36,7 @@ config ARCH_VIRT
help
This enables support for QEMU Virt Machine.
-config SOC_CANAAN
+config ARCH_CANAAN
bool "Canaan Kendryte K210 SoC"
depends on !MMU
select CLINT_TIMER if RISCV_M_MODE
@@ -50,11 +50,11 @@ config SOC_CANAAN
help
This enables support for Canaan Kendryte K210 SoC platform hardware.
-if SOC_CANAAN
+if ARCH_CANAAN
-config SOC_CANAAN_K210_DTB_BUILTIN
+config ARCH_CANAAN_K210_DTB_BUILTIN
bool "Builtin device tree for the Canaan Kendryte K210"
- depends on SOC_CANAAN
+ depends on ARCH_CANAAN
default y
select OF
select BUILTIN_DTB
@@ -63,16 +63,16 @@ config SOC_CANAAN_K210_DTB_BUILTIN
This option should be selected if no bootloader is being used.
If unsure, say Y.
-config SOC_CANAAN_K210_DTB_SOURCE
+config ARCH_CANAAN_K210_DTB_SOURCE
string "Source file for the Canaan Kendryte K210 builtin DTB"
- depends on SOC_CANAAN
- depends on SOC_CANAAN_K210_DTB_BUILTIN
+ depends on ARCH_CANAAN
+ depends on ARCH_CANAAN_K210_DTB_BUILTIN
default "k210_generic"
help
Base name (without suffix, relative to arch/riscv/boot/dts/canaan)
for the DTS file that will be used to produce the DTB linked into the
kernel.
-endif # SOC_CANAAN
+endif # ARCH_CANAAN
endmenu # "SoC selection"
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
index e013df8e7b8b..e4d448da2a18 100644
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -131,7 +131,7 @@ endif
endif
ifneq ($(CONFIG_XIP_KERNEL),y)
-ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN),yy)
+ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)
KBUILD_IMAGE := $(boot)/loader.bin
else
KBUILD_IMAGE := $(boot)/Image.gz
diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile
index ff174996cdfd..fc791600e347 100644
--- a/arch/riscv/boot/dts/Makefile
+++ b/arch/riscv/boot/dts/Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
subdir-y += sifive
subdir-y += starfive
-subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan
+subdir-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += canaan
subdir-y += microchip
obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix /, $(subdir-y))
diff --git a/arch/riscv/boot/dts/canaan/Makefile b/arch/riscv/boot/dts/canaan/Makefile
index befe4eb7527b..520623264c87 100644
--- a/arch/riscv/boot/dts/canaan/Makefile
+++ b/arch/riscv/boot/dts/canaan/Makefile
@@ -1,9 +1,9 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_SOC_CANAAN) += canaan_kd233.dtb
-dtb-$(CONFIG_SOC_CANAAN) += k210_generic.dtb
-dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_bit.dtb
-dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_dock.dtb
-dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_go.dtb
-dtb-$(CONFIG_SOC_CANAAN) += sipeed_maixduino.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += canaan_kd233.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += k210_generic.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_bit.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_dock.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_go.dtb
+dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maixduino.dtb
-obj-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_SOC_CANAAN_K210_DTB_SOURCE))
+obj-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_ARCH_CANAAN_K210_DTB_SOURCE))
diff --git a/arch/riscv/configs/nommu_k210_defconfig b/arch/riscv/configs/nommu_k210_defconfig
index 96fe8def644c..f14fe314e2d2 100644
--- a/arch/riscv/configs/nommu_k210_defconfig
+++ b/arch/riscv/configs/nommu_k210_defconfig
@@ -27,7 +27,7 @@ CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLOB=y
# CONFIG_MMU is not set
-CONFIG_SOC_CANAAN=y
+CONFIG_ARCH_CANAAN=y
CONFIG_NONPORTABLE=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
diff --git a/arch/riscv/configs/nommu_k210_sdcard_defconfig b/arch/riscv/configs/nommu_k210_sdcard_defconfig
index 379740654373..15ec3bac4745 100644
--- a/arch/riscv/configs/nommu_k210_sdcard_defconfig
+++ b/arch/riscv/configs/nommu_k210_sdcard_defconfig
@@ -19,7 +19,7 @@ CONFIG_EMBEDDED=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLOB=y
# CONFIG_MMU is not set
-CONFIG_SOC_CANAAN=y
+CONFIG_ARCH_CANAAN=y
CONFIG_NONPORTABLE=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
--
2.37.3
_______________________________________________
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^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 22/27] clk: k210: convert SOC_CANAAN to ARCH_CANAAN
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (20 preceding siblings ...)
2022-09-23 18:56 ` [RFC 21/27] riscv: convert SOC_CANAAN to ARCH_CANAAN Conor Dooley
@ 2022-09-23 18:56 ` Conor Dooley
2022-09-23 18:56 ` [RFC 23/27] pinctrl: " Conor Dooley
` (7 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:56 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
As per the discussions at LPC, the SOC_ symbols in Kconfig.socs are to
be converted to ARCH_ for consistency between "incumbent" and incoming
vendors who have a legacy in other architectures.
Convert the SOC_CANAAN dependancy to ARCH_CANAAN. Since ARCH_CANAAN is
only defined on RISC-V, the Kconfig dependancy on RISCV can be dropped.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/clk/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 48f8f4221e21..68477aa6fcbe 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -423,8 +423,8 @@ config COMMON_CLK_FIXED_MMIO
config COMMON_CLK_K210
bool "Clock driver for the Canaan Kendryte K210 SoC"
- depends on OF && RISCV && SOC_CANAAN
- default SOC_CANAAN
+ depends on OF && ARCH_CANAAN
+ default ARCH_CANAAN
help
Support for the Canaan Kendryte K210 RISC-V SoC clocks.
--
2.37.3
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 23/27] pinctrl: k210: convert SOC_CANAAN to ARCH_CANAAN
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (21 preceding siblings ...)
2022-09-23 18:56 ` [RFC 22/27] clk: k210: " Conor Dooley
@ 2022-09-23 18:56 ` Conor Dooley
2022-09-23 18:56 ` [RFC 24/27] soc: " Conor Dooley
` (6 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:56 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
As per the discussions at LPC, the SOC_ symbols in Kconfig.socs are to
be converted to ARCH_ for consistency between "incumbent" and incoming
vendors who have a legacy in other architectures.
Convert the SOC_CANAAN dependancy to ARCH_CANAAN. Since ARCH_CANAAN is
only defined on RISC-V, the Kconfig dependancy on RISCV can be dropped.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/pinctrl/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 8862a71de8af..82dfc8c208e1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -217,13 +217,13 @@ config PINCTRL_INGENIC
config PINCTRL_K210
bool "Pinctrl driver for the Canaan Kendryte K210 SoC"
- depends on RISCV && SOC_CANAAN && OF
+ depends on ARCH_CANAAN && OF
select GENERIC_PINMUX_FUNCTIONS
select GENERIC_PINCONF
select GPIOLIB
select OF_GPIO
select REGMAP_MMIO
- default SOC_CANAAN
+ default ARCH_CANAAN
help
Add support for the Canaan Kendryte K210 RISC-V SOC Field
Programmable IO Array (FPIOA) controller.
--
2.37.3
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 24/27] soc: k210: convert SOC_CANAAN to ARCH_CANAAN
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (22 preceding siblings ...)
2022-09-23 18:56 ` [RFC 23/27] pinctrl: " Conor Dooley
@ 2022-09-23 18:56 ` Conor Dooley
2022-09-23 18:56 ` [RFC 25/27] reset: " Conor Dooley
` (5 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:56 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
As per the discussions at LPC, the SOC_ symbols in Kconfig.socs are to
be converted to ARCH_ for consistency between "incumbent" and incoming
vendors who have a legacy in other architectures.
Convert the SOC_CANAAN dependancy to ARCH_CANAAN. Since ARCH_CANAAN is
only defined on RISC-V, the Kconfig dependancy on RISCV can be dropped.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/soc/Makefile | 2 +-
drivers/soc/canaan/Kconfig | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 534669840858..2a3504c9d21f 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -8,7 +8,7 @@ obj-y += apple/
obj-y += aspeed/
obj-$(CONFIG_ARCH_AT91) += atmel/
obj-y += bcm/
-obj-$(CONFIG_SOC_CANAAN) += canaan/
+obj-$(CONFIG_ARCH_CANAAN) += canaan/
obj-$(CONFIG_ARCH_DOVE) += dove/
obj-$(CONFIG_MACH_DOVE) += dove/
obj-y += fsl/
diff --git a/drivers/soc/canaan/Kconfig b/drivers/soc/canaan/Kconfig
index 2527cf5757ec..cdeade6040b4 100644
--- a/drivers/soc/canaan/Kconfig
+++ b/drivers/soc/canaan/Kconfig
@@ -2,8 +2,8 @@
config SOC_K210_SYSCTL
bool "Canaan Kendryte K210 SoC system controller"
- depends on RISCV && SOC_CANAAN && OF
- default SOC_CANAAN
+ depends on ARCH_CANAAN && OF
+ default ARCH_CANAAN
select PM
select MFD_SYSCON
help
--
2.37.3
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 25/27] reset: k210: convert SOC_CANAAN to ARCH_CANAAN
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (23 preceding siblings ...)
2022-09-23 18:56 ` [RFC 24/27] soc: " Conor Dooley
@ 2022-09-23 18:56 ` Conor Dooley
2022-09-23 18:56 ` [RFC 26/27] serial: sifive: select by default if ARCH_CANAAN Conor Dooley
` (4 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:56 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
As per the discussions at LPC, the SOC_ symbols in Kconfig.socs are to
be converted to ARCH_ for consistency between "incumbent" and incoming
vendors who have a legacy in other architectures.
Convert the SOC_CANAAN dependancy to ARCH_CANAAN. Since ARCH_CANAAN is
only defined on RISC-V, the Kconfig dependancy on RISCV can be dropped.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/reset/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index a69bd6ef3110..576190fbe544 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -94,9 +94,9 @@ config RESET_INTEL_GW
config RESET_K210
bool "Reset controller driver for Canaan Kendryte K210 SoC"
- depends on (SOC_CANAAN || COMPILE_TEST) && OF
+ depends on (ARCH_CANAAN || COMPILE_TEST) && OF
select MFD_SYSCON
- default SOC_CANAAN
+ default ARCH_CANAAN
help
Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
Say Y if you want to control reset signals provided by this
--
2.37.3
_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 26/27] serial: sifive: select by default if ARCH_CANAAN
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (24 preceding siblings ...)
2022-09-23 18:56 ` [RFC 25/27] reset: " Conor Dooley
@ 2022-09-23 18:56 ` Conor Dooley
2022-09-23 18:56 ` [RFC 27/27] riscv: stop directly selecting drivers for ARCH_CANAAN Conor Dooley
` (3 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:56 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
With the aim of dropping direct selects of drivers from Kconfig.socs,
default the SiFive serial drivers to enabled if ARCH_CANAAN.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
drivers/tty/serial/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index daadcfe2703c..dd5a1d6f8bb0 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -972,7 +972,7 @@ config SERIAL_OMAP_CONSOLE
config SERIAL_SIFIVE
tristate "SiFive UART support"
depends on OF
- default ARCH_SIFIVE
+ default ARCH_SIFIVE || ARCH_CANAAN
select SERIAL_CORE
help
Select this option if you are building a kernel for a device that
@@ -982,7 +982,7 @@ config SERIAL_SIFIVE
config SERIAL_SIFIVE_CONSOLE
bool "Console on SiFive UART"
depends on SERIAL_SIFIVE=y
- default ARCH_SIFIVE
+ default ARCH_SIFIVE || ARCH_CANAAN
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
help
--
2.37.3
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [RFC 27/27] riscv: stop directly selecting drivers for ARCH_CANAAN
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (25 preceding siblings ...)
2022-09-23 18:56 ` [RFC 26/27] serial: sifive: select by default if ARCH_CANAAN Conor Dooley
@ 2022-09-23 18:56 ` Conor Dooley
2022-09-23 18:59 ` [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (2 subsequent siblings)
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:56 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley
From: Conor Dooley <conor.dooley@microchip.com>
The serial and clock drivers will be enabled by default if the symbol
itself is enabled, so stop directly selecting the drivers in
Kconfigs.socs.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
arch/riscv/Kconfig.socs | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index f195cae638c0..377f484cee09 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -40,13 +40,10 @@ config ARCH_CANAAN
bool "Canaan Kendryte K210 SoC"
depends on !MMU
select CLINT_TIMER if RISCV_M_MODE
- select SERIAL_SIFIVE if TTY
- select SERIAL_SIFIVE_CONSOLE if TTY
select SIFIVE_PLIC
select ARCH_HAS_RESET_CONTROLLER
select PINCTRL
select COMMON_CLK
- select COMMON_CLK_K210
help
This enables support for Canaan Kendryte K210 SoC platform hardware.
--
2.37.3
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (26 preceding siblings ...)
2022-09-23 18:56 ` [RFC 27/27] riscv: stop directly selecting drivers for ARCH_CANAAN Conor Dooley
@ 2022-09-23 18:59 ` Conor Dooley
2022-09-26 1:50 ` Damien Le Moal
2022-09-26 9:04 ` Geert Uytterhoeven
29 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-23 18:59 UTC (permalink / raw)
To: linux-riscv
Cc: palmer, damien.lemoal, geert, heiko, kernel, arnd, Conor Dooley, geert
+CC Geert whose email I typo'd...
On Fri, Sep 23, 2022 at 07:55:39PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Following on from LPC, here's the start of my efforts to clean up
> Kconfig.socs.
>
> My preference would be to take the whole thing through the RISC-V tree
> for v6.2 to make things a bit less fiddly, but I am sending this as an
> RFC in the hopes of getting some opinions on how the series should be
> split up & merged. I guess it would always be possible to create a few
> immutable branches for the individual subsystems that are being modified
> & take the series through the riscv tree unless we hit a conflict in
> -next. Obiviously for that route, maintainer acks will be needed.
>
> The only SoCs I have, at the moment ;), are the jh7100, mpfs, fu540 and
> the k210 so I've given those a whirl to make sure I didn't break
> something.
>
> I have also yet to deal with ARCH_VIRT, but just throwing this out for
> some opinions on how to apply/split up the set before finalising a v1.
>
> I've CCed a few people that may have an opinion here, but anyone that
> has an opinion here - please shout!
>
> One other point, is it worth adding something to the patch acceptance
> policy to say "do your kconfig xyz way" or is that not something that's
> worth doing since it is easy to push people in the right direction
> during review?
>
> The series is currently on top of:
> https://lore.kernel.org/all/20220908142914.359777-1-cristian.ciocaltea@collabora.com/
>
> Thanks,
> Conor.
>
> Conor Dooley (27):
> clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> i2c: microchip-corei2c: replace SOC_MICROCHIP_POLARFIRE with
> ARCH_MICROCHIP
> mailbox: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> usb: musb: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> rtc: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> riscv: stop selecting the PolarFire SoC clock driver
> riscv: replace SOC_STARFIVE with ARCH_STARFIVE
> clk: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
> pinctrl: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
> reset: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
> riscv: replace SOC_SIFIVE with ARCH_SIFIVE
> soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
> clk: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
> clk: sifive: select by default if ARCH_SIFIVE
> serial: sifive: select by default if ARCH_SIFIVE
> PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE
> riscv: stop selecting SiFive clock and serial drivers directly
> riscv: convert SOC_VIRT to ARCH_VIRT
> kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config
> wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv
> riscv: convert SOC_CANAAN to ARCH_CANAAN
> clk: k210: convert SOC_CANAAN to ARCH_CANAAN
> pinctrl: k210: convert SOC_CANAAN to ARCH_CANAAN
> soc: k210: convert SOC_CANAAN to ARCH_CANAAN
> reset: k210: convert SOC_CANAAN to ARCH_CANAAN
> serial: sifive: select by default if ARCH_CANAAN
> riscv: stop directly selecting drivers for ARCH_CANAAN
>
> arch/riscv/Kconfig.socs | 30 +++++++------------
> arch/riscv/Makefile | 2 +-
> arch/riscv/boot/dts/Makefile | 2 +-
> arch/riscv/boot/dts/canaan/Makefile | 14 ++++-----
> arch/riscv/boot/dts/sifive/Makefile | 2 +-
> arch/riscv/boot/dts/starfive/Makefile | 2 +-
> arch/riscv/configs/defconfig | 6 ++--
> arch/riscv/configs/nommu_k210_defconfig | 2 +-
> .../riscv/configs/nommu_k210_sdcard_defconfig | 2 +-
> arch/riscv/configs/nommu_virt_defconfig | 2 +-
> arch/riscv/configs/rv32_defconfig | 4 +--
> drivers/clk/Kconfig | 4 +--
> drivers/clk/Makefile | 2 +-
> drivers/clk/microchip/Kconfig | 3 +-
> drivers/clk/sifive/Kconfig | 4 ++-
> drivers/clk/starfive/Kconfig | 6 ++--
> drivers/i2c/busses/Kconfig | 2 +-
> drivers/mailbox/Kconfig | 2 +-
> drivers/pci/controller/dwc/Kconfig | 2 +-
> drivers/pinctrl/Kconfig | 8 ++---
> drivers/reset/Kconfig | 8 ++---
> drivers/rtc/Kconfig | 2 +-
> drivers/soc/Makefile | 4 +--
> drivers/soc/canaan/Kconfig | 4 +--
> drivers/soc/sifive/Kconfig | 2 +-
> drivers/tty/serial/Kconfig | 2 ++
> drivers/usb/musb/Kconfig | 2 +-
> tools/testing/kunit/qemu_configs/riscv.py | 2 +-
> .../wireguard/qemu/arch/riscv32.config | 2 +-
> .../wireguard/qemu/arch/riscv64.config | 2 +-
> 30 files changed, 64 insertions(+), 67 deletions(-)
>
> --
> 2.37.3
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (27 preceding siblings ...)
2022-09-23 18:59 ` [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
@ 2022-09-26 1:50 ` Damien Le Moal
2022-09-26 8:02 ` Conor Dooley
2022-09-26 9:04 ` Geert Uytterhoeven
29 siblings, 1 reply; 43+ messages in thread
From: Damien Le Moal @ 2022-09-26 1:50 UTC (permalink / raw)
To: Conor Dooley, linux-riscv
Cc: palmer, geert, heiko, kernel, arnd, Conor Dooley
On 9/24/22 03:55, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Following on from LPC, here's the start of my efforts to clean up
> Kconfig.socs.
>
> My preference would be to take the whole thing through the RISC-V tree
> for v6.2 to make things a bit less fiddly, but I am sending this as an
> RFC in the hopes of getting some opinions on how the series should be
> split up & merged. I guess it would always be possible to create a few
> immutable branches for the individual subsystems that are being modified
> & take the series through the riscv tree unless we hit a conflict in
> -next. Obiviously for that route, maintainer acks will be needed.
>
> The only SoCs I have, at the moment ;), are the jh7100, mpfs, fu540 and
> the k210 so I've given those a whirl to make sure I didn't break
> something.
>
> I have also yet to deal with ARCH_VIRT, but just throwing this out for
> some opinions on how to apply/split up the set before finalising a v1.
>
> I've CCed a few people that may have an opinion here, but anyone that
> has an opinion here - please shout!
>
> One other point, is it worth adding something to the patch acceptance
> policy to say "do your kconfig xyz way" or is that not something that's
> worth doing since it is easy to push people in the right direction
> during review?
>
> The series is currently on top of:
> https://lore.kernel.org/all/20220908142914.359777-1-cristian.ciocaltea@collabora.com/
It is not very nice to change the config option names as that can break
user build environments, e.g. buildroot setups that have tweaked kernel
configs.
What's wrong with the SOC_XXX names ? Changing these to ARCH_XXX is
weird since the ARCH prefix is generally used for ISA differentiation
rather than boards/SoCs.
>
> Thanks,
> Conor.
>
> Conor Dooley (27):
> clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> i2c: microchip-corei2c: replace SOC_MICROCHIP_POLARFIRE with
> ARCH_MICROCHIP
> mailbox: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> usb: musb: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> rtc: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> riscv: stop selecting the PolarFire SoC clock driver
> riscv: replace SOC_STARFIVE with ARCH_STARFIVE
> clk: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
> pinctrl: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
> reset: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
> riscv: replace SOC_SIFIVE with ARCH_SIFIVE
> soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
> clk: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
> clk: sifive: select by default if ARCH_SIFIVE
> serial: sifive: select by default if ARCH_SIFIVE
> PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE
> riscv: stop selecting SiFive clock and serial drivers directly
> riscv: convert SOC_VIRT to ARCH_VIRT
> kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config
> wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv
> riscv: convert SOC_CANAAN to ARCH_CANAAN
> clk: k210: convert SOC_CANAAN to ARCH_CANAAN
> pinctrl: k210: convert SOC_CANAAN to ARCH_CANAAN
> soc: k210: convert SOC_CANAAN to ARCH_CANAAN
> reset: k210: convert SOC_CANAAN to ARCH_CANAAN
> serial: sifive: select by default if ARCH_CANAAN
> riscv: stop directly selecting drivers for ARCH_CANAAN
>
> arch/riscv/Kconfig.socs | 30 +++++++------------
> arch/riscv/Makefile | 2 +-
> arch/riscv/boot/dts/Makefile | 2 +-
> arch/riscv/boot/dts/canaan/Makefile | 14 ++++-----
> arch/riscv/boot/dts/sifive/Makefile | 2 +-
> arch/riscv/boot/dts/starfive/Makefile | 2 +-
> arch/riscv/configs/defconfig | 6 ++--
> arch/riscv/configs/nommu_k210_defconfig | 2 +-
> .../riscv/configs/nommu_k210_sdcard_defconfig | 2 +-
> arch/riscv/configs/nommu_virt_defconfig | 2 +-
> arch/riscv/configs/rv32_defconfig | 4 +--
> drivers/clk/Kconfig | 4 +--
> drivers/clk/Makefile | 2 +-
> drivers/clk/microchip/Kconfig | 3 +-
> drivers/clk/sifive/Kconfig | 4 ++-
> drivers/clk/starfive/Kconfig | 6 ++--
> drivers/i2c/busses/Kconfig | 2 +-
> drivers/mailbox/Kconfig | 2 +-
> drivers/pci/controller/dwc/Kconfig | 2 +-
> drivers/pinctrl/Kconfig | 8 ++---
> drivers/reset/Kconfig | 8 ++---
> drivers/rtc/Kconfig | 2 +-
> drivers/soc/Makefile | 4 +--
> drivers/soc/canaan/Kconfig | 4 +--
> drivers/soc/sifive/Kconfig | 2 +-
> drivers/tty/serial/Kconfig | 2 ++
> drivers/usb/musb/Kconfig | 2 +-
> tools/testing/kunit/qemu_configs/riscv.py | 2 +-
> .../wireguard/qemu/arch/riscv32.config | 2 +-
> .../wireguard/qemu/arch/riscv64.config | 2 +-
> 30 files changed, 64 insertions(+), 67 deletions(-)
>
--
Damien Le Moal
Western Digital Research
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO
2022-09-26 1:50 ` Damien Le Moal
@ 2022-09-26 8:02 ` Conor Dooley
0 siblings, 0 replies; 43+ messages in thread
From: Conor Dooley @ 2022-09-26 8:02 UTC (permalink / raw)
To: Damien Le Moal
Cc: Conor Dooley, linux-riscv, palmer, geert, heiko, kernel, arnd
On Mon, Sep 26, 2022 at 10:50:42AM +0900, Damien Le Moal wrote:
> On 9/24/22 03:55, Conor Dooley wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > Following on from LPC, here's the start of my efforts to clean up
> > Kconfig.socs.
> >
> > My preference would be to take the whole thing through the RISC-V tree
> > for v6.2 to make things a bit less fiddly, but I am sending this as an
> > RFC in the hopes of getting some opinions on how the series should be
> > split up & merged. I guess it would always be possible to create a few
> > immutable branches for the individual subsystems that are being modified
> > & take the series through the riscv tree unless we hit a conflict in
> > -next. Obiviously for that route, maintainer acks will be needed.
> >
> > The only SoCs I have, at the moment ;), are the jh7100, mpfs, fu540 and
> > the k210 so I've given those a whirl to make sure I didn't break
> > something.
> >
> > I have also yet to deal with ARCH_VIRT, but just throwing this out for
> > some opinions on how to apply/split up the set before finalising a v1.
> >
> > I've CCed a few people that may have an opinion here, but anyone that
> > has an opinion here - please shout!
> >
> > One other point, is it worth adding something to the patch acceptance
> > policy to say "do your kconfig xyz way" or is that not something that's
> > worth doing since it is easy to push people in the right direction
> > during review?
> >
> > The series is currently on top of:
> > https://lore.kernel.org/all/20220908142914.359777-1-cristian.ciocaltea@collabora.com/
>
> It is not very nice to change the config option names as that can break
> user build environments, e.g. buildroot setups that have tweaked kernel
> configs.
Yeah & I am not sure what could be done there other than define both
symbols in the defconfig externally. I am loathe to break someone's
setup, but defconfig is not in the "thou shalt not break" category is
it?
> What's wrong with the SOC_XXX names? Changing these to ARCH_XXX is
> weird since the ARCH prefix is generally used for ISA differentiation
> rather than boards/SoCs.
The ARM{,64} vendors coming to RISC-V already have an ARCH_FOO symbol
defined. For the sake of consistency (and to avoid having two symbols
for one SoC since they already have ARCH_FOO scattered around the
kernel) I renamed the "incumbent" symbols to match. FWIW ARCH_FOO for
uarchs is more common than SOC_FOO..
My heart is not dead-set on the rename, only my OCD!
Thanks,
Conor.
> >
> > Conor Dooley (27):
> > clk: microchip: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> > i2c: microchip-corei2c: replace SOC_MICROCHIP_POLARFIRE with
> > ARCH_MICROCHIP
> > mailbox: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> > usb: musb: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> > rtc: mpfs: replace SOC_MICROCHIP_POLARFIRE with ARCH_MICROCHIP
> > riscv: stop selecting the PolarFire SoC clock driver
> > riscv: replace SOC_STARFIVE with ARCH_STARFIVE
> > clk: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
> > pinctrl: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
> > reset: starfive: replace SOC_STARFIVE with ARCH_STARFIVE
> > riscv: replace SOC_SIFIVE with ARCH_SIFIVE
> > soc: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
> > clk: sifive: convert SOC_SIFIVE to ARCH_SIFIVE
> > clk: sifive: select by default if ARCH_SIFIVE
> > serial: sifive: select by default if ARCH_SIFIVE
> > PCI: dwc: fu740: convert SOC_SIFIVE to ARCH_SIFIVE
> > riscv: stop selecting SiFive clock and serial drivers directly
> > riscv: convert SOC_VIRT to ARCH_VIRT
> > kunit: tool: rename SOC_VIRT to ARCH_VIRT in riscv's QEMU config
> > wireguard: selftests: swap SOC_VIRT for ARCH_VIRT on riscv
> > riscv: convert SOC_CANAAN to ARCH_CANAAN
> > clk: k210: convert SOC_CANAAN to ARCH_CANAAN
> > pinctrl: k210: convert SOC_CANAAN to ARCH_CANAAN
> > soc: k210: convert SOC_CANAAN to ARCH_CANAAN
> > reset: k210: convert SOC_CANAAN to ARCH_CANAAN
> > serial: sifive: select by default if ARCH_CANAAN
> > riscv: stop directly selecting drivers for ARCH_CANAAN
> >
> > arch/riscv/Kconfig.socs | 30 +++++++------------
> > arch/riscv/Makefile | 2 +-
> > arch/riscv/boot/dts/Makefile | 2 +-
> > arch/riscv/boot/dts/canaan/Makefile | 14 ++++-----
> > arch/riscv/boot/dts/sifive/Makefile | 2 +-
> > arch/riscv/boot/dts/starfive/Makefile | 2 +-
> > arch/riscv/configs/defconfig | 6 ++--
> > arch/riscv/configs/nommu_k210_defconfig | 2 +-
> > .../riscv/configs/nommu_k210_sdcard_defconfig | 2 +-
> > arch/riscv/configs/nommu_virt_defconfig | 2 +-
> > arch/riscv/configs/rv32_defconfig | 4 +--
> > drivers/clk/Kconfig | 4 +--
> > drivers/clk/Makefile | 2 +-
> > drivers/clk/microchip/Kconfig | 3 +-
> > drivers/clk/sifive/Kconfig | 4 ++-
> > drivers/clk/starfive/Kconfig | 6 ++--
> > drivers/i2c/busses/Kconfig | 2 +-
> > drivers/mailbox/Kconfig | 2 +-
> > drivers/pci/controller/dwc/Kconfig | 2 +-
> > drivers/pinctrl/Kconfig | 8 ++---
> > drivers/reset/Kconfig | 8 ++---
> > drivers/rtc/Kconfig | 2 +-
> > drivers/soc/Makefile | 4 +--
> > drivers/soc/canaan/Kconfig | 4 +--
> > drivers/soc/sifive/Kconfig | 2 +-
> > drivers/tty/serial/Kconfig | 2 ++
> > drivers/usb/musb/Kconfig | 2 +-
> > tools/testing/kunit/qemu_configs/riscv.py | 2 +-
> > .../wireguard/qemu/arch/riscv32.config | 2 +-
> > .../wireguard/qemu/arch/riscv64.config | 2 +-
> > 30 files changed, 64 insertions(+), 67 deletions(-)
> >
>
> --
> Damien Le Moal
> Western Digital Research
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
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^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO
2022-09-23 18:55 [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO Conor Dooley
` (28 preceding siblings ...)
2022-09-26 1:50 ` Damien Le Moal
@ 2022-09-26 9:04 ` Geert Uytterhoeven
2022-09-27 6:34 ` Conor Dooley
29 siblings, 1 reply; 43+ messages in thread
From: Geert Uytterhoeven @ 2022-09-26 9:04 UTC (permalink / raw)
To: Conor Dooley
Cc: linux-riscv, palmer, damien.lemoal, heiko, kernel, arnd, Conor Dooley
Hi Conor,
On Fri, Sep 23, 2022 at 8:59 PM Conor Dooley <conor@kernel.org> wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Following on from LPC, here's the start of my efforts to clean up
> Kconfig.socs.
>
> My preference would be to take the whole thing through the RISC-V tree
> for v6.2 to make things a bit less fiddly, but I am sending this as an
> RFC in the hopes of getting some opinions on how the series should be
> split up & merged. I guess it would always be possible to create a few
> immutable branches for the individual subsystems that are being modified
> & take the series through the riscv tree unless we hit a conflict in
> -next. Obiviously for that route, maintainer acks will be needed.
Iff it is decided to make this change, I suggest to do it at the end
of the v6.1-rc1 merge window, or even better, between rc1 and rc2.
That way the affected subsystems can just base their for-v6.2 branches
on v6.1-rc2, and have all renames.
If (a) you postpone this to v6.2, there will be more users to handle,
and (b) you take this through the RISC-V tree, you will miss all newly
introduced users in other subsystem trees.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO
2022-09-26 9:04 ` Geert Uytterhoeven
@ 2022-09-27 6:34 ` Conor Dooley
2022-09-27 6:48 ` Arnd Bergmann
0 siblings, 1 reply; 43+ messages in thread
From: Conor Dooley @ 2022-09-27 6:34 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Conor Dooley, linux-riscv, palmer, damien.lemoal, heiko, kernel, arnd
On Mon, Sep 26, 2022 at 11:04:58AM +0200, Geert Uytterhoeven wrote:
> Hi Conor,
>
> On Fri, Sep 23, 2022 at 8:59 PM Conor Dooley <conor@kernel.org> wrote:
> > From: Conor Dooley <conor.dooley@microchip.com>
> >
> > Following on from LPC, here's the start of my efforts to clean up
> > Kconfig.socs.
> >
> > My preference would be to take the whole thing through the RISC-V tree
> > for v6.2 to make things a bit less fiddly, but I am sending this as an
> > RFC in the hopes of getting some opinions on how the series should be
> > split up & merged. I guess it would always be possible to create a few
> > immutable branches for the individual subsystems that are being modified
> > & take the series through the riscv tree unless we hit a conflict in
> > -next. Obiviously for that route, maintainer acks will be needed.
>
> Iff it is decided to make this change, I suggest to do it at the end
> of the v6.1-rc1 merge window, or even better, between rc1 and rc2.
> That way the affected subsystems can just base their for-v6.2 branches
> on v6.1-rc2, and have all renames.
>
> If (a) you postpone this to v6.2, there will be more users to handle,
Unfortunately even if this is decided upon, I am not sure I am going to
have the time to get this sorted out prior to rc1. I'd rather wait until
v6.2-rc1/2 & not rush it - especially given the number of Acks it likely
requires.
> and (b) you take this through the RISC-V tree, you will miss all newly
> introduced users in other subsystem trees.
Aye, your suggested timing makes sense, but there are quite a few
subsystems involved here, so maybe doing it at the very end of the
window rather than asking everyone to stall until rc2 may be more
feasible?
Thanks,
Conor.
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
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^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO
2022-09-27 6:34 ` Conor Dooley
@ 2022-09-27 6:48 ` Arnd Bergmann
2022-09-27 6:57 ` Conor Dooley
0 siblings, 1 reply; 43+ messages in thread
From: Arnd Bergmann @ 2022-09-27 6:48 UTC (permalink / raw)
To: Conor.Dooley, Geert Uytterhoeven
Cc: Conor Dooley, linux-riscv, Palmer Dabbelt, Damien Le Moal,
Heiko Stübner, kernel
On Tue, Sep 27, 2022, at 8:34 AM, Conor Dooley wrote:
> On Mon, Sep 26, 2022 at 11:04:58AM +0200, Geert Uytterhoeven wrote:
>
>> and (b) you take this through the RISC-V tree, you will miss all newly
>> introduced users in other subsystem trees.
>
> Aye, your suggested timing makes sense, but there are quite a few
> subsystems involved here, so maybe doing it at the very end of the
> window rather than asking everyone to stall until rc2 may be more
> feasible?
Since there is no rush here, maybe stage this out over two releases?
At first, just introduce the new symbols as aliases like
config ARCH_FOO
def_bool SOC_FOO
then change all the drivers in the following cycle after the syumbol
exists, and finally rename the user-visible symbols and remove the
old version.
Arnd
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^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO
2022-09-27 6:48 ` Arnd Bergmann
@ 2022-09-27 6:57 ` Conor Dooley
2022-09-27 7:03 ` Geert Uytterhoeven
0 siblings, 1 reply; 43+ messages in thread
From: Conor Dooley @ 2022-09-27 6:57 UTC (permalink / raw)
To: Arnd Bergmann
Cc: Geert Uytterhoeven, Conor Dooley, linux-riscv, Palmer Dabbelt,
Damien Le Moal, Heiko Stübner, kernel
On Tue, Sep 27, 2022 at 08:48:00AM +0200, Arnd Bergmann wrote:
> On Tue, Sep 27, 2022, at 8:34 AM, Conor Dooley wrote:
> > On Mon, Sep 26, 2022 at 11:04:58AM +0200, Geert Uytterhoeven wrote:
> >
> >> and (b) you take this through the RISC-V tree, you will miss all newly
> >> introduced users in other subsystem trees.
> >
> > Aye, your suggested timing makes sense, but there are quite a few
> > subsystems involved here, so maybe doing it at the very end of the
> > window rather than asking everyone to stall until rc2 may be more
> > feasible?
>
> Since there is no rush here, maybe stage this out over two releases?
> At first, just introduce the new symbols as aliases like
>
> config ARCH_FOO
> def_bool SOC_FOO
>
> then change all the drivers in the following cycle after the syumbol
> exists, and finally rename the user-visible symbols and remove the
> old version.
>
I think I suggested that at LPC but was told not to bother, which is why
I did a direct conversion. I'd prefer to do it your suggested way
though & I think I will do it that way for a v1.
Thanks,
Conor.
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^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [RFC 00/27] RISC-V: Convert SOC_FOO symbols to ARCH_FOO
2022-09-27 6:57 ` Conor Dooley
@ 2022-09-27 7:03 ` Geert Uytterhoeven
0 siblings, 0 replies; 43+ messages in thread
From: Geert Uytterhoeven @ 2022-09-27 7:03 UTC (permalink / raw)
To: Conor Dooley
Cc: Arnd Bergmann, Conor Dooley, linux-riscv, Palmer Dabbelt,
Damien Le Moal, Heiko Stübner, kernel
Hi Conor,
On Tue, Sep 27, 2022 at 8:58 AM Conor Dooley <conor.dooley@microchip.com> wrote:
> On Tue, Sep 27, 2022 at 08:48:00AM +0200, Arnd Bergmann wrote:
> > On Tue, Sep 27, 2022, at 8:34 AM, Conor Dooley wrote:
> > > On Mon, Sep 26, 2022 at 11:04:58AM +0200, Geert Uytterhoeven wrote:
> > >
> > >> and (b) you take this through the RISC-V tree, you will miss all newly
> > >> introduced users in other subsystem trees.
> > >
> > > Aye, your suggested timing makes sense, but there are quite a few
> > > subsystems involved here, so maybe doing it at the very end of the
> > > window rather than asking everyone to stall until rc2 may be more
> > > feasible?
> >
> > Since there is no rush here, maybe stage this out over two releases?
> > At first, just introduce the new symbols as aliases like
> >
> > config ARCH_FOO
> > def_bool SOC_FOO
> >
> > then change all the drivers in the following cycle after the syumbol
> > exists, and finally rename the user-visible symbols and remove the
> > old version.
> >
>
> I think I suggested that at LPC but was told not to bother, which is why
> I did a direct conversion. I'd prefer to do it your suggested way
> though & I think I will do it that way for a v1.
This way has the added advantage that "make oldconfig" keeps on working
(assumed no one skips one release ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
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^ permalink raw reply [flat|nested] 43+ messages in thread