* [PATCH v4 0/4] Add support for SBI v0.2
@ 2019-11-26 3:20 Atish Patra
2019-11-26 3:20 ` [PATCH v4 1/4] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
` (3 more replies)
0 siblings, 4 replies; 12+ messages in thread
From: Atish Patra @ 2019-11-26 3:20 UTC (permalink / raw)
To: linux-kernel
Cc: Albert Ou, Anup Patel, Mike Rapoport, Atish Patra,
Palmer Dabbelt, Paul Walmsley, linux-riscv, Thomas Gleixner,
Mao Han
The Supervisor Binary Interface(SBI) specification[1] now defines a
base extension that provides extendability to add future extensions
while maintaining backward compatibility with previous versions.
The new version is defined as 0.2 and older version is marked as 0.1.
This series adds support v0.2 and a unified calling convention
implementation between 0.1 and 0.2. It also adds minimal SBI functions
from 0.2 as well to keep the series lean.
[1] https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
The base support for SBI v0.2 is already available in OpenSBI v0.5.
This series needs following additional patches in OpenSBI.
http://lists.infradead.org/pipermail/opensbi/2019-November/000704.html
Tested on both BBL, OpenSBI with/without the above patch series.
Changes from v3->v4.
1. Rebased on top of for-next.
2. Fixed issuses with checkpatch --strict.
3. Unfied all IPI/fence related functions.
4. Added Hfence related SBI calls.
5. Moved to function pointer based boot time switch between v01 and v02 calls.
Changes from v2->v3.
1. Moved v0.1 extensions to a new config.
2. Added support for relacement extensions of v0.1 extensions.
Changes from v1->v2
1. Removed the legacy calling convention.
2. Moved all SBI related calls to sbi.c.
3. Moved all SBI related macros to uapi.
Atish Patra (4):
RISC-V: Mark existing SBI as 0.1 SBI.
RISC-V: Add basic support for SBI v0.2
RISC-V: Introduce a new config for SBI v0.1
RISC-V: Implement new SBI v0.2 extensions
arch/riscv/Kconfig | 6 +
arch/riscv/include/asm/sbi.h | 177 +++++++-----
arch/riscv/kernel/Makefile | 1 +
arch/riscv/kernel/sbi.c | 545 ++++++++++++++++++++++++++++++++++-
arch/riscv/kernel/setup.c | 2 +
5 files changed, 658 insertions(+), 73 deletions(-)
--
2.23.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v4 1/4] RISC-V: Mark existing SBI as 0.1 SBI.
2019-11-26 3:20 [PATCH v4 0/4] Add support for SBI v0.2 Atish Patra
@ 2019-11-26 3:20 ` Atish Patra
2019-11-26 4:10 ` Anup Patel
2019-11-26 3:20 ` [PATCH v4 2/4] RISC-V: Add basic support for SBI v0.2 Atish Patra
` (2 subsequent siblings)
3 siblings, 1 reply; 12+ messages in thread
From: Atish Patra @ 2019-11-26 3:20 UTC (permalink / raw)
To: linux-kernel
Cc: Albert Ou, Anup Patel, Mike Rapoport, Atish Patra,
Palmer Dabbelt, Paul Walmsley, linux-riscv, Thomas Gleixner,
Mao Han
As per the new SBI specification, current SBI implementation version
is defined as 0.1 and will be removed/replaced in future. Each of the
function call in 0.1 is defined as a separate extension which makes
easier to replace them one at a time.
Rename existing implementation to reflect that. This patch is just
a preparatory patch for SBI v0.2 and doesn't introduce any functional
changes.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/include/asm/sbi.h | 43 +++++++++++++++++++-----------------
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 2570c1e683d3..96aaee270ded 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -9,17 +9,17 @@
#include <linux/types.h>
#ifdef CONFIG_RISCV_SBI
-#define SBI_SET_TIMER 0
-#define SBI_CONSOLE_PUTCHAR 1
-#define SBI_CONSOLE_GETCHAR 2
-#define SBI_CLEAR_IPI 3
-#define SBI_SEND_IPI 4
-#define SBI_REMOTE_FENCE_I 5
-#define SBI_REMOTE_SFENCE_VMA 6
-#define SBI_REMOTE_SFENCE_VMA_ASID 7
-#define SBI_SHUTDOWN 8
+#define SBI_EXT_0_1_SET_TIMER 0x0
+#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1
+#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2
+#define SBI_EXT_0_1_CLEAR_IPI 0x3
+#define SBI_EXT_0_1_SEND_IPI 0x4
+#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7
+#define SBI_EXT_0_1_SHUTDOWN 0x8
-#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
+#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
@@ -43,48 +43,50 @@
static inline void sbi_console_putchar(int ch)
{
- SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
+ SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch);
}
static inline int sbi_console_getchar(void)
{
- return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
+ return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR);
}
static inline void sbi_set_timer(uint64_t stime_value)
{
#if __riscv_xlen == 32
- SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
+ SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value,
+ stime_value >> 32);
#else
- SBI_CALL_1(SBI_SET_TIMER, stime_value);
+ SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value);
#endif
}
static inline void sbi_shutdown(void)
{
- SBI_CALL_0(SBI_SHUTDOWN);
+ SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN);
}
static inline void sbi_clear_ipi(void)
{
- SBI_CALL_0(SBI_CLEAR_IPI);
+ SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI);
}
static inline void sbi_send_ipi(const unsigned long *hart_mask)
{
- SBI_CALL_1(SBI_SEND_IPI, hart_mask);
+ SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask);
}
static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
{
- SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
+ SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask);
}
static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
unsigned long start,
unsigned long size)
{
- SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size);
+ SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask,
+ start, size);
}
static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
@@ -92,7 +94,8 @@ static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
unsigned long size,
unsigned long asid)
{
- SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
+ SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask,
+ start, size, asid);
}
#else /* CONFIG_RISCV_SBI */
/* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */
--
2.23.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v4 2/4] RISC-V: Add basic support for SBI v0.2
2019-11-26 3:20 [PATCH v4 0/4] Add support for SBI v0.2 Atish Patra
2019-11-26 3:20 ` [PATCH v4 1/4] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
@ 2019-11-26 3:20 ` Atish Patra
2019-11-26 4:11 ` Anup Patel
2019-11-26 3:20 ` [PATCH v4 3/4] RISC-V: Introduce a new config for SBI v0.1 Atish Patra
2019-11-26 3:20 ` [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions Atish Patra
3 siblings, 1 reply; 12+ messages in thread
From: Atish Patra @ 2019-11-26 3:20 UTC (permalink / raw)
To: linux-kernel
Cc: Albert Ou, Anup Patel, Mike Rapoport, Atish Patra,
Palmer Dabbelt, Paul Walmsley, linux-riscv, Thomas Gleixner,
Mao Han
The SBI v0.2 introduces a base extension which is backward compatible
with v0.1. Implement all helper functions and minimum required SBI
calls from v0.2 for now. All other base extension function will be
added later as per need.
As v0.2 calling convention is backward compatible with v0.1, remove
the v0.1 helper functions and just use v0.2 calling convention.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/include/asm/sbi.h | 139 ++++++++++----------
arch/riscv/kernel/Makefile | 1 +
arch/riscv/kernel/sbi.c | 248 ++++++++++++++++++++++++++++++++++-
arch/riscv/kernel/setup.c | 2 +
4 files changed, 316 insertions(+), 74 deletions(-)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 96aaee270ded..906438322932 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -9,93 +9,88 @@
#include <linux/types.h>
#ifdef CONFIG_RISCV_SBI
-#define SBI_EXT_0_1_SET_TIMER 0x0
-#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1
-#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2
-#define SBI_EXT_0_1_CLEAR_IPI 0x3
-#define SBI_EXT_0_1_SEND_IPI 0x4
-#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5
-#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6
-#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7
-#define SBI_EXT_0_1_SHUTDOWN 0x8
+enum sbi_ext_id {
+ SBI_EXT_0_1_SET_TIMER = 0x0,
+ SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
+ SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
+ SBI_EXT_0_1_CLEAR_IPI = 0x3,
+ SBI_EXT_0_1_SEND_IPI = 0x4,
+ SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
+ SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
+ SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
+ SBI_EXT_0_1_SHUTDOWN = 0x8,
+ SBI_EXT_BASE = 0x10,
+};
-#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
- register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
- register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
- register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
- register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \
- register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \
- asm volatile ("ecall" \
- : "+r" (a0) \
- : "r" (a1), "r" (a2), "r" (a3), "r" (a7) \
- : "memory"); \
- a0; \
-})
+enum sbi_ext_base_fid {
+ SBI_BASE_GET_SPEC_VERSION = 0,
+ SBI_BASE_GET_IMP_ID,
+ SBI_BASE_GET_IMP_VERSION,
+ SBI_BASE_PROBE_EXT,
+ SBI_BASE_GET_MVENDORID,
+ SBI_BASE_GET_MARCHID,
+ SBI_BASE_GET_MIMPID,
+};
-/* Lazy implementations until SBI is finalized */
-#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0)
-#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0)
-#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0)
-#define SBI_CALL_3(which, arg0, arg1, arg2) \
- SBI_CALL(which, arg0, arg1, arg2, 0)
-#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \
- SBI_CALL(which, arg0, arg1, arg2, arg3)
+#define SBI_SPEC_VERSION_DEFAULT 0x1
+#define SBI_SPEC_VERSION_MAJOR_OFFSET 24
+#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
+#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff
-static inline void sbi_console_putchar(int ch)
-{
- SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch);
-}
+/* SBI return error codes */
+#define SBI_SUCCESS 0
+#define SBI_ERR_FAILURE -1
+#define SBI_ERR_NOT_SUPPORTED -2
+#define SBI_ERR_INVALID_PARAM -3
+#define SBI_ERR_DENIED -4
+#define SBI_ERR_INVALID_ADDRESS -5
-static inline int sbi_console_getchar(void)
-{
- return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR);
-}
+extern unsigned long sbi_spec_version;
+struct sbiret {
+ long error;
+ long value;
+};
-static inline void sbi_set_timer(uint64_t stime_value)
-{
-#if __riscv_xlen == 32
- SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value,
- stime_value >> 32);
-#else
- SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value);
-#endif
-}
-
-static inline void sbi_shutdown(void)
-{
- SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN);
-}
+int sbi_init(void);
+struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
+ unsigned long arg1, unsigned long arg2,
+ unsigned long arg3, unsigned long arg4,
+ unsigned long arg5);
-static inline void sbi_clear_ipi(void)
-{
- SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI);
-}
+void sbi_console_putchar(int ch);
+int sbi_console_getchar(void);
+void sbi_set_timer(uint64_t stime_value);
+void sbi_shutdown(void);
+void sbi_clear_ipi(void);
+void sbi_send_ipi(const unsigned long *hart_mask);
+void sbi_remote_fence_i(const unsigned long *hart_mask);
+void sbi_remote_sfence_vma(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size);
-static inline void sbi_send_ipi(const unsigned long *hart_mask)
-{
- SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask);
-}
+void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size,
+ unsigned long asid);
+int sbi_probe_extension(long ext);
-static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
+/* Check if current SBI specification version is 0.1 or not */
+static inline int sbi_spec_is_0_1(void)
{
- SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask);
+ return (sbi_spec_version == SBI_SPEC_VERSION_DEFAULT) ? 1 : 0;
}
-static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
- unsigned long start,
- unsigned long size)
+/* Get the major version of SBI */
+static inline unsigned long sbi_major_version(void)
{
- SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask,
- start, size);
+ return (sbi_spec_version >> SBI_SPEC_VERSION_MAJOR_OFFSET) &
+ SBI_SPEC_VERSION_MAJOR_MASK;
}
-static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
- unsigned long start,
- unsigned long size,
- unsigned long asid)
+/* Get the minor version of SBI */
+static inline unsigned long sbi_minor_version(void)
{
- SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask,
- start, size, asid);
+ return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK;
}
#else /* CONFIG_RISCV_SBI */
/* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */
diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
index f40205cb9a22..56127dd359f1 100644
--- a/arch/riscv/kernel/Makefile
+++ b/arch/riscv/kernel/Makefile
@@ -17,6 +17,7 @@ obj-y += irq.o
obj-y += process.o
obj-y += ptrace.o
obj-y += reset.o
+obj-y += sbi.o
obj-y += setup.o
obj-y += signal.o
obj-y += syscall_table.o
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index f6c7c3e82d28..8b36269fa515 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -4,14 +4,258 @@
#include <linux/pm.h>
#include <asm/sbi.h>
+/* default SBI version is 0.1 */
+unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT;
+EXPORT_SYMBOL(sbi_spec_version);
+
+struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
+ unsigned long arg1, unsigned long arg2,
+ unsigned long arg3, unsigned long arg4,
+ unsigned long arg5)
+{
+ struct sbiret ret;
+
+ register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
+ register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
+ register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
+ register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
+ register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
+ register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
+ register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
+ register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
+ asm volatile ("ecall"
+ : "+r" (a0), "+r" (a1)
+ : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
+ : "memory");
+ ret.error = a0;
+ ret.value = a1;
+
+ return ret;
+}
+EXPORT_SYMBOL(sbi_ecall);
+
+static int sbi_err_map_linux_errno(int err)
+{
+ switch (err) {
+ case SBI_SUCCESS:
+ return 0;
+ case SBI_ERR_DENIED:
+ return -EPERM;
+ case SBI_ERR_INVALID_PARAM:
+ return -EINVAL;
+ case SBI_ERR_INVALID_ADDRESS:
+ return -EFAULT;
+ case SBI_ERR_NOT_SUPPORTED:
+ case SBI_ERR_FAILURE:
+ default:
+ return -ENOTSUPP;
+ };
+}
+
+/**
+ * sbi_console_putchar() - Writes given character to the console device.
+ * @ch: The data to be written to the console.
+ *
+ * Return: None
+ */
+void sbi_console_putchar(int ch)
+{
+ sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0);
+}
+EXPORT_SYMBOL(sbi_console_putchar);
+
+/**
+ * sbi_console_getchar() - Reads a byte from console device.
+ *
+ * Returns the value read from console.
+ */
+int sbi_console_getchar(void)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0);
+
+ return ret.error;
+}
+EXPORT_SYMBOL(sbi_console_getchar);
+
+/**
+ * sbi_set_timer() - Program the timer for next timer event.
+ * @stime_value: The value after which next timer event should fire.
+ *
+ * Return: None
+ */
+void sbi_set_timer(uint64_t stime_value)
+{
+#if __riscv_xlen == 32
+ sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
+ stime_value >> 32, 0, 0, 0, 0);
+#else
+ sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
+#endif
+}
+EXPORT_SYMBOL(sbi_set_timer);
+
+/**
+ * sbi_shutdown() - Remove all the harts from executing supervisor code.
+ *
+ * Return: None
+ */
+void sbi_shutdown(void)
+{
+ sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
+}
+EXPORT_SYMBOL(sbi_shutdown);
+
+/**
+ * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
+ *
+ * Return: None
+ */
+void sbi_clear_ipi(void)
+{
+ sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
+}
+
+/**
+ * sbi_send_ipi() - Send an IPI to any hart.
+ * @hart_mask: A cpu mask containing all the target harts.
+ *
+ * Return: None
+ */
+void sbi_send_ipi(const unsigned long *hart_mask)
+{
+ sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
+ 0, 0, 0, 0, 0);
+}
+EXPORT_SYMBOL(sbi_send_ipi);
+
+/**
+ * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
+ * @hart_mask: A cpu mask containing all the target harts.
+ *
+ * Return: None
+ */
+void sbi_remote_fence_i(const unsigned long *hart_mask)
+{
+ sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask,
+ 0, 0, 0, 0, 0);
+}
+EXPORT_SYMBOL(sbi_remote_fence_i);
+
+/**
+ * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote
+ * harts for the specified virtual address range.
+ * @hart_mask: A cpu mask containing all the target harts.
+ * @start: Start of the virtual address
+ * @size: Total size of the virtual address range.
+ *
+ * Return: None
+ */
+void sbi_remote_sfence_vma(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size)
+{
+ sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
+ (unsigned long)hart_mask, start, size, 0, 0, 0);
+}
+EXPORT_SYMBOL(sbi_remote_sfence_vma);
+
+/**
+ * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given
+ * remote harts for a virtual address range belonging to a specific ASID.
+ *
+ * @hart_mask: A cpu mask containing all the target harts.
+ * @start: Start of the virtual address
+ * @size: Total size of the virtual address range.
+ * @asid: The value of address space identifier (ASID).
+ *
+ * Return: None
+ */
+void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size,
+ unsigned long asid)
+{
+ sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
+ (unsigned long)hart_mask, start, size, asid, 0, 0);
+}
+EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
+
+/**
+ * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
+ * @extid: The extension ID to be probed.
+ *
+ * Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise.
+ */
+int sbi_probe_extension(long extid)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_PROBE_EXT, extid, 0, 0, 0, 0, 0);
+ pr_err("%ld: %ld\n", ret.value, ret.error);
+ if (!ret.error)
+ if (ret.value)
+ return ret.value;
+
+ return -ENOTSUPP;
+}
+EXPORT_SYMBOL(sbi_probe_extension);
+
+static long sbi_get_spec_version(void)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_SPEC_VERSION,
+ 0, 0, 0, 0, 0, 0);
+ if (!ret.error)
+ return ret.value;
+ else
+ return ret.error;
+}
+
+static long sbi_get_firmware_id(void)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_ID,
+ 0, 0, 0, 0, 0, 0);
+ if (!ret.error)
+ return ret.value;
+ else
+ return sbi_err_map_linux_errno(ret.error);
+}
+
+static long sbi_get_firmware_version(void)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_VERSION,
+ 0, 0, 0, 0, 0, 0);
+ if (!ret.error)
+ return ret.value;
+ else
+ return sbi_err_map_linux_errno(ret.error);
+}
+
static void sbi_power_off(void)
{
sbi_shutdown();
}
-static int __init sbi_init(void)
+int __init sbi_init(void)
{
+ int ret;
+
pm_power_off = sbi_power_off;
+ ret = sbi_get_spec_version();
+ if (ret > 0)
+ sbi_spec_version = ret;
+
+ pr_info("SBI specification v%lu.%lu detected\n",
+ sbi_major_version(), sbi_minor_version());
+ if (!sbi_spec_is_0_1())
+ pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
+ sbi_get_firmware_id(), sbi_get_firmware_version());
return 0;
}
-early_initcall(sbi_init);
diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
index 365ff8420bfe..f0a3c51e3d1b 100644
--- a/arch/riscv/kernel/setup.c
+++ b/arch/riscv/kernel/setup.c
@@ -22,6 +22,7 @@
#include <asm/sections.h>
#include <asm/pgtable.h>
#include <asm/smp.h>
+#include <asm/sbi.h>
#include <asm/tlbflush.h>
#include <asm/thread_info.h>
@@ -74,6 +75,7 @@ void __init setup_arch(char **cmdline_p)
swiotlb_init(1);
#endif
+ sbi_init();
#ifdef CONFIG_SMP
setup_smp();
#endif
--
2.23.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v4 3/4] RISC-V: Introduce a new config for SBI v0.1
2019-11-26 3:20 [PATCH v4 0/4] Add support for SBI v0.2 Atish Patra
2019-11-26 3:20 ` [PATCH v4 1/4] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
2019-11-26 3:20 ` [PATCH v4 2/4] RISC-V: Add basic support for SBI v0.2 Atish Patra
@ 2019-11-26 3:20 ` Atish Patra
2019-11-26 4:14 ` Anup Patel
2019-11-26 3:20 ` [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions Atish Patra
3 siblings, 1 reply; 12+ messages in thread
From: Atish Patra @ 2019-11-26 3:20 UTC (permalink / raw)
To: linux-kernel
Cc: Albert Ou, Anup Patel, Mike Rapoport, Atish Patra,
Palmer Dabbelt, Paul Walmsley, linux-riscv, Thomas Gleixner,
Mao Han
We now have SBI v0.2 which is more scalable and extendable to handle
future needs for RISC-V supervisor interfaces.
Introduce a new config and move all SBI v0.1 code under that config.
This allows to implement the new replacement SBI extensions cleanly
and remove v0.1 extensions easily in future. Currently, the config
is enabled by default. Once all M-mode software with v0.1 are no
longer in use, this config option and all relevant code can be easily
removed.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/Kconfig | 6 ++
arch/riscv/include/asm/sbi.h | 2 +
arch/riscv/kernel/sbi.c | 154 +++++++++++++++++++++++++++++------
3 files changed, 138 insertions(+), 24 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ca3b5541ae93..15c020d6837b 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -304,6 +304,12 @@ config SECCOMP
and the task is only allowed to execute a few safe syscalls
defined by each seccomp mode.
+config RISCV_SBI_V01
+ bool "SBI v0.1 support"
+ default y
+ help
+ This config allows kernel to use SBI v0.1 APIs. This will be
+ deprecated in future once legacy M-mode software are no longer in use.
endmenu
menu "Boot options"
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 906438322932..cc82ae63f8e0 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -10,6 +10,7 @@
#ifdef CONFIG_RISCV_SBI
enum sbi_ext_id {
+#ifdef CONFIG_RISCV_SBI_V01
SBI_EXT_0_1_SET_TIMER = 0x0,
SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
@@ -19,6 +20,7 @@ enum sbi_ext_id {
SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
SBI_EXT_0_1_SHUTDOWN = 0x8,
+#endif
SBI_EXT_BASE = 0x10,
};
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 8b36269fa515..8574de1074c4 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -8,6 +8,14 @@
unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT;
EXPORT_SYMBOL(sbi_spec_version);
+void (*__sbi_set_timer)(uint64_t stime);
+int (*__sbi_send_ipi)(const unsigned long *hart_mask);
+int (*__sbi_rfence)(unsigned long extid, unsigned long fid,
+ const unsigned long *hart_mask,
+ unsigned long hbase, unsigned long start,
+ unsigned long size, unsigned long arg4,
+ unsigned long arg5);
+
struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
unsigned long arg1, unsigned long arg2,
unsigned long arg3, unsigned long arg4,
@@ -52,6 +60,32 @@ static int sbi_err_map_linux_errno(int err)
};
}
+static inline void __sbi_set_timer_dummy_warn(uint64_t stime_value)
+{
+ pr_warn("Timer extension is not available in SBI v%lu.%lu\n",
+ sbi_major_version(), sbi_minor_version());
+}
+
+static inline int __sbi_send_ipi_dummy_warn(const unsigned long *hart_mask)
+{
+ pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
+ sbi_major_version(), sbi_minor_version());
+ return 0;
+}
+
+static inline int __sbi_rfence_dummy_warn(unsigned long extid,
+ unsigned long fid,
+ const unsigned long *hart_mask,
+ unsigned long hbase, unsigned long start,
+ unsigned long size, unsigned long arg4,
+ unsigned long arg5)
+{
+ pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
+ sbi_major_version(), sbi_minor_version());
+ return 0;
+}
+
+#ifdef CONFIG_RISCV_SBI_V01
/**
* sbi_console_putchar() - Writes given character to the console device.
* @ch: The data to be written to the console.
@@ -80,41 +114,106 @@ int sbi_console_getchar(void)
EXPORT_SYMBOL(sbi_console_getchar);
/**
- * sbi_set_timer() - Program the timer for next timer event.
- * @stime_value: The value after which next timer event should fire.
+ * sbi_shutdown() - Remove all the harts from executing supervisor code.
*
* Return: None
*/
-void sbi_set_timer(uint64_t stime_value)
+void sbi_shutdown(void)
{
-#if __riscv_xlen == 32
- sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
- stime_value >> 32, 0, 0, 0, 0);
-#else
- sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
-#endif
+ sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
}
EXPORT_SYMBOL(sbi_set_timer);
/**
- * sbi_shutdown() - Remove all the harts from executing supervisor code.
+ * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
*
* Return: None
*/
-void sbi_shutdown(void)
+void sbi_clear_ipi(void)
{
- sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
+ sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
}
EXPORT_SYMBOL(sbi_shutdown);
/**
- * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
+ * sbi_set_timer_v01() - Program the timer for next timer event.
+ * @stime_value: The value after which next timer event should fire.
*
* Return: None
*/
-void sbi_clear_ipi(void)
+static void __sbi_set_timer_v01(uint64_t stime_value)
{
- sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
+#if __riscv_xlen == 32
+ sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
+ stime_value >> 32, 0, 0, 0, 0);
+#else
+ sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
+#endif
+}
+
+static int __sbi_send_ipi_v01(const unsigned long *hart_mask)
+{
+ sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
+ 0, 0, 0, 0, 0);
+ return 0;
+}
+
+static int __sbi_rfence_v01(unsigned long ext, unsigned long fid,
+ const unsigned long *hart_mask,
+ unsigned long hbase, unsigned long start,
+ unsigned long size, unsigned long arg4,
+ unsigned long arg5)
+{
+ switch (ext) {
+ case SBI_EXT_0_1_REMOTE_FENCE_I:
+ sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
+ (unsigned long)hart_mask, 0, 0, 0, 0, 0);
+ break;
+ case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
+ sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
+ (unsigned long)hart_mask, start, size,
+ 0, 0, 0);
+ break;
+ case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
+ sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
+ (unsigned long)hart_mask, start, size,
+ arg4, 0, 0);
+ break;
+ default:
+ pr_err("extid [%lu]not supported in SBI v0.1\n", ext);
+ }
+
+ return 0;
+}
+#else
+static void __sbi_set_timer_v01(uint64_t stime_value)
+{
+ __sbi_set_timer_dummy_warn(0);
+}
+static int __sbi_send_ipi_v01(const unsigned long *hart_mask)
+{
+ return __sbi_send_ipi_dummy_warn(NULL);
+}
+static int __sbi_rfence_v01(unsigned long ext, unsigned long fid,
+ const unsigned long *hart_mask,
+ unsigned long hbase, unsigned long start,
+ unsigned long size, unsigned long arg4,
+ unsigned long arg5)
+{
+ return __sbi_rfence_dummy_warn(0, 0, 0, 0, 0, 0, 0, 0);
+
+}
+#endif /* CONFIG_RISCV_SBI_V01 */
+
+/**
+ * sbi_set_timer() - Program the timer for next timer event.
+ * @stime_value: The value after which next timer event should fire.
+ *
+ * Return: None
+ */
+void sbi_set_timer(uint64_t stime_value)
+{
+ __sbi_set_timer(stime_value);
}
/**
@@ -125,11 +224,11 @@ void sbi_clear_ipi(void)
*/
void sbi_send_ipi(const unsigned long *hart_mask)
{
- sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
- 0, 0, 0, 0, 0);
+ __sbi_send_ipi(hart_mask);
}
EXPORT_SYMBOL(sbi_send_ipi);
+
/**
* sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
* @hart_mask: A cpu mask containing all the target harts.
@@ -138,8 +237,8 @@ EXPORT_SYMBOL(sbi_send_ipi);
*/
void sbi_remote_fence_i(const unsigned long *hart_mask)
{
- sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask,
- 0, 0, 0, 0, 0);
+ __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
+ hart_mask, 0, 0, 0, 0, 0);
}
EXPORT_SYMBOL(sbi_remote_fence_i);
@@ -156,8 +255,8 @@ void sbi_remote_sfence_vma(const unsigned long *hart_mask,
unsigned long start,
unsigned long size)
{
- sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
- (unsigned long)hart_mask, start, size, 0, 0, 0);
+ __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
+ hart_mask, 0, start, size, 0, 0);
}
EXPORT_SYMBOL(sbi_remote_sfence_vma);
@@ -177,8 +276,8 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
unsigned long size,
unsigned long asid)
{
- sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
- (unsigned long)hart_mask, start, size, asid, 0, 0);
+ __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
+ hart_mask, 0, start, size, asid, 0);
}
EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
@@ -254,8 +353,15 @@ int __init sbi_init(void)
pr_info("SBI specification v%lu.%lu detected\n",
sbi_major_version(), sbi_minor_version());
- if (!sbi_spec_is_0_1())
+
+ if (sbi_spec_is_0_1()) {
+ __sbi_set_timer = __sbi_set_timer_v01;
+ __sbi_send_ipi = __sbi_send_ipi_v01;
+ __sbi_rfence = __sbi_rfence_v01;
+ } else {
pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
sbi_get_firmware_id(), sbi_get_firmware_version());
+ }
+
return 0;
}
--
2.23.0
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions
2019-11-26 3:20 [PATCH v4 0/4] Add support for SBI v0.2 Atish Patra
` (2 preceding siblings ...)
2019-11-26 3:20 ` [PATCH v4 3/4] RISC-V: Introduce a new config for SBI v0.1 Atish Patra
@ 2019-11-26 3:20 ` Atish Patra
2019-11-26 4:16 ` Anup Patel
2019-11-26 6:52 ` kbuild test robot
3 siblings, 2 replies; 12+ messages in thread
From: Atish Patra @ 2019-11-26 3:20 UTC (permalink / raw)
To: linux-kernel
Cc: Albert Ou, Anup Patel, Mike Rapoport, Atish Patra,
Palmer Dabbelt, Paul Walmsley, linux-riscv, Thomas Gleixner,
Mao Han
Few v0.1 SBI calls are being replaced by new SBI calls that follows
v0.2 calling convention. The specification changes can be found at
riscv/riscv-sbi-doc#27
Implement the replacement extensions and few additional new SBI
function calls that makes way for a better SBI interface in future.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
arch/riscv/include/asm/sbi.h | 35 +++++++
arch/riscv/kernel/sbi.c | 197 ++++++++++++++++++++++++++++++++++-
2 files changed, 229 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index cc82ae63f8e0..54ba9eebec11 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -22,6 +22,9 @@ enum sbi_ext_id {
SBI_EXT_0_1_SHUTDOWN = 0x8,
#endif
SBI_EXT_BASE = 0x10,
+ SBI_EXT_TIME = 0x54494D45,
+ SBI_EXT_IPI = 0x735049,
+ SBI_EXT_RFENCE = 0x52464E43,
};
enum sbi_ext_base_fid {
@@ -34,6 +37,24 @@ enum sbi_ext_base_fid {
SBI_BASE_GET_MIMPID,
};
+enum sbi_ext_time_fid {
+ SBI_EXT_TIME_SET_TIMER = 0,
+};
+
+enum sbi_ext_ipi_fid {
+ SBI_EXT_IPI_SEND_IPI = 0,
+};
+
+enum sbi_ext_rfence_fid {
+ SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
+ SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
+ SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
+ SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
+ SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
+ SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
+ SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
+};
+
#define SBI_SPEC_VERSION_DEFAULT 0x1
#define SBI_SPEC_VERSION_MAJOR_OFFSET 24
#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
@@ -74,6 +95,20 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
unsigned long start,
unsigned long size,
unsigned long asid);
+int sbi_remote_hfence_gvma(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size);
+int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size,
+ unsigned long vmid);
+int sbi_remote_hfence_vvma(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size);
+int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size,
+ unsigned long asid);
int sbi_probe_extension(long ext);
/* Check if current SBI specification version is 0.1 or not */
diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 8574de1074c4..74b3155b570f 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -205,6 +205,101 @@ static int __sbi_rfence_v01(unsigned long ext, unsigned long fid,
}
#endif /* CONFIG_RISCV_SBI_V01 */
+static void __sbi_set_timer_v02(uint64_t stime_value)
+{
+#if __riscv_xlen == 32
+ sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value,
+ stime_value >> 32, 0, 0, 0, 0);
+#else
+ sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, 0,
+ 0, 0, 0, 0);
+#endif
+}
+
+static int __sbi_send_ipi_v02(const unsigned long *hart_mask)
+{
+ unsigned long hmask_val;
+ struct sbiret ret = {0};
+ int result;
+
+ if (!hart_mask)
+ hmask_val = *(cpumask_bits(cpu_online_mask));
+ else
+ hmask_val = *hart_mask;
+
+ ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, hmask_val,
+ 0, 0, 0, 0, 0);
+ if (ret.error) {
+ pr_err("%s: failed with error [%d]\n", __func__,
+ sbi_err_map_linux_errno(ret.error));
+ result = ret.error;
+ } else
+ result = ret.value;
+
+ return result;
+}
+
+static int __sbi_rfence_v02(unsigned long extid, unsigned long fid,
+ const unsigned long *hart_mask,
+ unsigned long hbase, unsigned long start,
+ unsigned long size, unsigned long arg4,
+ unsigned long arg5)
+{
+ unsigned long hmask_val;
+ struct sbiret ret = {0};
+ int result;
+ unsigned long ext = SBI_EXT_RFENCE;
+
+ if (!hart_mask)
+ hmask_val = *(cpumask_bits(cpu_online_mask));
+ else
+ hmask_val = *hart_mask;
+
+ switch (fid) {
+ case SBI_EXT_RFENCE_REMOTE_FENCE_I:
+ ret = sbi_ecall(ext, fid, hmask_val, 0, 0, 0, 0, 0);
+ break;
+ case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
+ ret = sbi_ecall(ext, fid, hmask_val, 0, start,
+ size, 0, 0);
+ break;
+ case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
+ ret = sbi_ecall(ext, fid, hmask_val, 0, start,
+ size, arg4, 0);
+ break;
+ /*TODO: Handle non zero hbase cases */
+ case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
+ ret = sbi_ecall(ext, fid, hmask_val, 0, start,
+ size, 0, 0);
+ break;
+ case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
+ ret = sbi_ecall(ext, fid, hmask_val, 0, start,
+ size, arg4, 0);
+ break;
+ case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
+ ret = sbi_ecall(ext, fid, hmask_val, 0, start,
+ size, 0, 0);
+ break;
+ case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
+ ret = sbi_ecall(ext, fid, hmask_val, 0, start,
+ size, arg4, 0);
+ break;
+ default:
+ pr_err("unknown function ID [%lu] for SBI extension [%lu]\n",
+ fid, ext);
+ result = -EINVAL;
+ }
+
+ if (ret.error) {
+ pr_err("%s: failed with error [%d]\n", __func__,
+ sbi_err_map_linux_errno(ret.error));
+ result = ret.error;
+ } else
+ result = ret.value;
+
+ return result;
+}
+
/**
* sbi_set_timer() - Program the timer for next timer event.
* @stime_value: The value after which next timer event should fire.
@@ -237,7 +332,7 @@ EXPORT_SYMBOL(sbi_send_ipi);
*/
void sbi_remote_fence_i(const unsigned long *hart_mask)
{
- __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
+ __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, SBI_EXT_RFENCE_REMOTE_FENCE_I,
hart_mask, 0, 0, 0, 0, 0);
}
EXPORT_SYMBOL(sbi_remote_fence_i);
@@ -255,7 +350,8 @@ void sbi_remote_sfence_vma(const unsigned long *hart_mask,
unsigned long start,
unsigned long size)
{
- __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
+ __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA,
+ SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
hart_mask, 0, start, size, 0, 0);
}
EXPORT_SYMBOL(sbi_remote_sfence_vma);
@@ -276,11 +372,93 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
unsigned long size,
unsigned long asid)
{
- __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
+ __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID,
+ SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
hart_mask, 0, start, size, asid, 0);
}
EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
+/**
+ * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on given remote
+ * harts for the specified guest physical address range.
+ * @hart_mask: A cpu mask containing all the target harts.
+ * @start: Start of the guest physical address
+ * @size: Total size of the guest physical address range.
+ *
+ * Return: None
+ */
+int sbi_remote_hfence_gvma(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size)
+{
+ return __sbi_rfence(SBI_EXT_RFENCE, SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
+ hart_mask, 0, start, size, 0, 0);
+}
+EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma);
+
+/**
+ * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA instructions on given
+ * remote harts for a guest physical address range belonging to a specific VMID.
+ *
+ * @hart_mask: A cpu mask containing all the target harts.
+ * @start: Start of the guest physical address
+ * @size: Total size of the guest physical address range.
+ * @vmid: The value of guest ID (VMID).
+ *
+ * Return: 0 if success, Error otherwise.
+ */
+int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size,
+ unsigned long vmid)
+{
+ return __sbi_rfence(SBI_EXT_RFENCE,
+ SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
+ hart_mask, 0, start, size, vmid, 0);
+}
+EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid);
+
+/**
+ * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on given remote
+ * harts for the current guest virtual address range.
+ * @hart_mask: A cpu mask containing all the target harts.
+ * @start: Start of the current guest virtual address
+ * @size: Total size of the current guest virtual address range.
+ *
+ * Return: None
+ */
+int sbi_remote_hfence_vvma(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size)
+{
+ return __sbi_rfence(SBI_EXT_RFENCE, SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
+ hart_mask, 0, start, size, 0, 0);
+}
+EXPORT_SYMBOL(sbi_remote_hfence_vvma);
+
+/**
+ * sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA instructions on given
+ * remote harts for current guest virtual address range belonging to a specific
+ * ASID.
+ *
+ * @hart_mask: A cpu mask containing all the target harts.
+ * @start: Start of the current guest virtual address
+ * @size: Total size of the current guest virtual address range.
+ * @asid: The value of address space identifier (ASID).
+ *
+ * Return: None
+ */
+int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size,
+ unsigned long asid)
+{
+ return __sbi_rfence(SBI_EXT_RFENCE,
+ SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
+ hart_mask, 0, start, size, asid, 0);
+}
+EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
+
/**
* sbi_probe_extension() - Check if an SBI extension ID is supported or not.
* @extid: The extension ID to be probed.
@@ -361,6 +539,19 @@ int __init sbi_init(void)
} else {
pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
sbi_get_firmware_id(), sbi_get_firmware_version());
+ if (sbi_probe_extension(SBI_EXT_TIME) > 0)
+ __sbi_set_timer = __sbi_set_timer_v02;
+ else
+ __sbi_set_timer = __sbi_set_timer_dummy_warn;
+ if (sbi_probe_extension(SBI_EXT_IPI) > 0)
+ __sbi_send_ipi = __sbi_send_ipi_v02;
+ else
+ __sbi_send_ipi = __sbi_send_ipi_dummy_warn;
+ if (sbi_probe_extension(SBI_EXT_RFENCE) > 0)
+ __sbi_rfence = __sbi_rfence_v02;
+ else
+ __sbi_rfence = __sbi_rfence_dummy_warn;
+
}
return 0;
--
2.23.0
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v4 1/4] RISC-V: Mark existing SBI as 0.1 SBI.
2019-11-26 3:20 ` [PATCH v4 1/4] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
@ 2019-11-26 4:10 ` Anup Patel
0 siblings, 0 replies; 12+ messages in thread
From: Anup Patel @ 2019-11-26 4:10 UTC (permalink / raw)
To: Atish Patra
Cc: Albert Ou, linux-kernel@vger.kernel.org List, Mike Rapoport,
Palmer Dabbelt, Paul Walmsley, linux-riscv, Thomas Gleixner,
Mao Han
On Tue, Nov 26, 2019 at 8:50 AM Atish Patra <atish.patra@wdc.com> wrote:
>
> As per the new SBI specification, current SBI implementation version
> is defined as 0.1 and will be removed/replaced in future. Each of the
> function call in 0.1 is defined as a separate extension which makes
> easier to replace them one at a time.
>
> Rename existing implementation to reflect that. This patch is just
> a preparatory patch for SBI v0.2 and doesn't introduce any functional
> changes.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
> arch/riscv/include/asm/sbi.h | 43 +++++++++++++++++++-----------------
> 1 file changed, 23 insertions(+), 20 deletions(-)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 2570c1e683d3..96aaee270ded 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -9,17 +9,17 @@
> #include <linux/types.h>
>
> #ifdef CONFIG_RISCV_SBI
> -#define SBI_SET_TIMER 0
> -#define SBI_CONSOLE_PUTCHAR 1
> -#define SBI_CONSOLE_GETCHAR 2
> -#define SBI_CLEAR_IPI 3
> -#define SBI_SEND_IPI 4
> -#define SBI_REMOTE_FENCE_I 5
> -#define SBI_REMOTE_SFENCE_VMA 6
> -#define SBI_REMOTE_SFENCE_VMA_ASID 7
> -#define SBI_SHUTDOWN 8
> +#define SBI_EXT_0_1_SET_TIMER 0x0
> +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1
> +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2
> +#define SBI_EXT_0_1_CLEAR_IPI 0x3
> +#define SBI_EXT_0_1_SEND_IPI 0x4
> +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5
> +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6
> +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7
> +#define SBI_EXT_0_1_SHUTDOWN 0x8
>
> -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
> +#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
> register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
> register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
> register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
> @@ -43,48 +43,50 @@
>
> static inline void sbi_console_putchar(int ch)
> {
> - SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
> + SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch);
> }
>
> static inline int sbi_console_getchar(void)
> {
> - return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
> + return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR);
> }
>
> static inline void sbi_set_timer(uint64_t stime_value)
> {
> #if __riscv_xlen == 32
> - SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
> + SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value,
> + stime_value >> 32);
> #else
> - SBI_CALL_1(SBI_SET_TIMER, stime_value);
> + SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value);
> #endif
> }
>
> static inline void sbi_shutdown(void)
> {
> - SBI_CALL_0(SBI_SHUTDOWN);
> + SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN);
> }
>
> static inline void sbi_clear_ipi(void)
> {
> - SBI_CALL_0(SBI_CLEAR_IPI);
> + SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI);
> }
>
> static inline void sbi_send_ipi(const unsigned long *hart_mask)
> {
> - SBI_CALL_1(SBI_SEND_IPI, hart_mask);
> + SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask);
> }
>
> static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
> {
> - SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
> + SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask);
> }
>
> static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
> unsigned long start,
> unsigned long size)
> {
> - SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size);
> + SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask,
> + start, size);
> }
>
> static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> @@ -92,7 +94,8 @@ static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> unsigned long size,
> unsigned long asid)
> {
> - SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
> + SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask,
> + start, size, asid);
> }
> #else /* CONFIG_RISCV_SBI */
> /* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */
> --
> 2.23.0
>
LGTM.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
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http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 2/4] RISC-V: Add basic support for SBI v0.2
2019-11-26 3:20 ` [PATCH v4 2/4] RISC-V: Add basic support for SBI v0.2 Atish Patra
@ 2019-11-26 4:11 ` Anup Patel
0 siblings, 0 replies; 12+ messages in thread
From: Anup Patel @ 2019-11-26 4:11 UTC (permalink / raw)
To: Atish Patra
Cc: Albert Ou, linux-kernel@vger.kernel.org List, Mike Rapoport,
Palmer Dabbelt, Paul Walmsley, linux-riscv, Thomas Gleixner,
Mao Han
On Tue, Nov 26, 2019 at 8:50 AM Atish Patra <atish.patra@wdc.com> wrote:
>
> The SBI v0.2 introduces a base extension which is backward compatible
> with v0.1. Implement all helper functions and minimum required SBI
> calls from v0.2 for now. All other base extension function will be
> added later as per need.
> As v0.2 calling convention is backward compatible with v0.1, remove
> the v0.1 helper functions and just use v0.2 calling convention.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
> arch/riscv/include/asm/sbi.h | 139 ++++++++++----------
> arch/riscv/kernel/Makefile | 1 +
> arch/riscv/kernel/sbi.c | 248 ++++++++++++++++++++++++++++++++++-
> arch/riscv/kernel/setup.c | 2 +
> 4 files changed, 316 insertions(+), 74 deletions(-)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 96aaee270ded..906438322932 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -9,93 +9,88 @@
> #include <linux/types.h>
>
> #ifdef CONFIG_RISCV_SBI
> -#define SBI_EXT_0_1_SET_TIMER 0x0
> -#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1
> -#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2
> -#define SBI_EXT_0_1_CLEAR_IPI 0x3
> -#define SBI_EXT_0_1_SEND_IPI 0x4
> -#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5
> -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6
> -#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7
> -#define SBI_EXT_0_1_SHUTDOWN 0x8
> +enum sbi_ext_id {
> + SBI_EXT_0_1_SET_TIMER = 0x0,
> + SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> + SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> + SBI_EXT_0_1_CLEAR_IPI = 0x3,
> + SBI_EXT_0_1_SEND_IPI = 0x4,
> + SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
> + SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
> + SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
> + SBI_EXT_0_1_SHUTDOWN = 0x8,
> + SBI_EXT_BASE = 0x10,
> +};
>
> -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \
> - register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
> - register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
> - register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
> - register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); \
> - register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \
> - asm volatile ("ecall" \
> - : "+r" (a0) \
> - : "r" (a1), "r" (a2), "r" (a3), "r" (a7) \
> - : "memory"); \
> - a0; \
> -})
> +enum sbi_ext_base_fid {
> + SBI_BASE_GET_SPEC_VERSION = 0,
> + SBI_BASE_GET_IMP_ID,
> + SBI_BASE_GET_IMP_VERSION,
> + SBI_BASE_PROBE_EXT,
> + SBI_BASE_GET_MVENDORID,
> + SBI_BASE_GET_MARCHID,
> + SBI_BASE_GET_MIMPID,
> +};
>
> -/* Lazy implementations until SBI is finalized */
> -#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0, 0)
> -#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0, 0)
> -#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0, 0)
> -#define SBI_CALL_3(which, arg0, arg1, arg2) \
> - SBI_CALL(which, arg0, arg1, arg2, 0)
> -#define SBI_CALL_4(which, arg0, arg1, arg2, arg3) \
> - SBI_CALL(which, arg0, arg1, arg2, arg3)
> +#define SBI_SPEC_VERSION_DEFAULT 0x1
> +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24
> +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
> +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff
>
> -static inline void sbi_console_putchar(int ch)
> -{
> - SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch);
> -}
> +/* SBI return error codes */
> +#define SBI_SUCCESS 0
> +#define SBI_ERR_FAILURE -1
> +#define SBI_ERR_NOT_SUPPORTED -2
> +#define SBI_ERR_INVALID_PARAM -3
> +#define SBI_ERR_DENIED -4
> +#define SBI_ERR_INVALID_ADDRESS -5
>
> -static inline int sbi_console_getchar(void)
> -{
> - return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR);
> -}
> +extern unsigned long sbi_spec_version;
> +struct sbiret {
> + long error;
> + long value;
> +};
>
> -static inline void sbi_set_timer(uint64_t stime_value)
> -{
> -#if __riscv_xlen == 32
> - SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value,
> - stime_value >> 32);
> -#else
> - SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value);
> -#endif
> -}
> -
> -static inline void sbi_shutdown(void)
> -{
> - SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN);
> -}
> +int sbi_init(void);
> +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
> + unsigned long arg1, unsigned long arg2,
> + unsigned long arg3, unsigned long arg4,
> + unsigned long arg5);
>
> -static inline void sbi_clear_ipi(void)
> -{
> - SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI);
> -}
> +void sbi_console_putchar(int ch);
> +int sbi_console_getchar(void);
> +void sbi_set_timer(uint64_t stime_value);
> +void sbi_shutdown(void);
> +void sbi_clear_ipi(void);
> +void sbi_send_ipi(const unsigned long *hart_mask);
> +void sbi_remote_fence_i(const unsigned long *hart_mask);
> +void sbi_remote_sfence_vma(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size);
>
> -static inline void sbi_send_ipi(const unsigned long *hart_mask)
> -{
> - SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask);
> -}
> +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size,
> + unsigned long asid);
> +int sbi_probe_extension(long ext);
>
> -static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
> +/* Check if current SBI specification version is 0.1 or not */
> +static inline int sbi_spec_is_0_1(void)
> {
> - SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask);
> + return (sbi_spec_version == SBI_SPEC_VERSION_DEFAULT) ? 1 : 0;
> }
>
> -static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
> - unsigned long start,
> - unsigned long size)
> +/* Get the major version of SBI */
> +static inline unsigned long sbi_major_version(void)
> {
> - SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask,
> - start, size);
> + return (sbi_spec_version >> SBI_SPEC_VERSION_MAJOR_OFFSET) &
> + SBI_SPEC_VERSION_MAJOR_MASK;
> }
>
> -static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> - unsigned long start,
> - unsigned long size,
> - unsigned long asid)
> +/* Get the minor version of SBI */
> +static inline unsigned long sbi_minor_version(void)
> {
> - SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask,
> - start, size, asid);
> + return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK;
> }
> #else /* CONFIG_RISCV_SBI */
> /* stubs for code that is only reachable under IS_ENABLED(CONFIG_RISCV_SBI): */
> diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
> index f40205cb9a22..56127dd359f1 100644
> --- a/arch/riscv/kernel/Makefile
> +++ b/arch/riscv/kernel/Makefile
> @@ -17,6 +17,7 @@ obj-y += irq.o
> obj-y += process.o
> obj-y += ptrace.o
> obj-y += reset.o
> +obj-y += sbi.o
> obj-y += setup.o
> obj-y += signal.o
> obj-y += syscall_table.o
> diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> index f6c7c3e82d28..8b36269fa515 100644
> --- a/arch/riscv/kernel/sbi.c
> +++ b/arch/riscv/kernel/sbi.c
> @@ -4,14 +4,258 @@
> #include <linux/pm.h>
> #include <asm/sbi.h>
>
> +/* default SBI version is 0.1 */
> +unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT;
> +EXPORT_SYMBOL(sbi_spec_version);
> +
> +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
> + unsigned long arg1, unsigned long arg2,
> + unsigned long arg3, unsigned long arg4,
> + unsigned long arg5)
> +{
> + struct sbiret ret;
> +
> + register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
> + register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
> + register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
> + register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
> + register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
> + register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
> + register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
> + register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
> + asm volatile ("ecall"
> + : "+r" (a0), "+r" (a1)
> + : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
> + : "memory");
> + ret.error = a0;
> + ret.value = a1;
> +
> + return ret;
> +}
> +EXPORT_SYMBOL(sbi_ecall);
> +
> +static int sbi_err_map_linux_errno(int err)
> +{
> + switch (err) {
> + case SBI_SUCCESS:
> + return 0;
> + case SBI_ERR_DENIED:
> + return -EPERM;
> + case SBI_ERR_INVALID_PARAM:
> + return -EINVAL;
> + case SBI_ERR_INVALID_ADDRESS:
> + return -EFAULT;
> + case SBI_ERR_NOT_SUPPORTED:
> + case SBI_ERR_FAILURE:
> + default:
> + return -ENOTSUPP;
> + };
> +}
> +
> +/**
> + * sbi_console_putchar() - Writes given character to the console device.
> + * @ch: The data to be written to the console.
> + *
> + * Return: None
> + */
> +void sbi_console_putchar(int ch)
> +{
> + sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0);
> +}
> +EXPORT_SYMBOL(sbi_console_putchar);
> +
> +/**
> + * sbi_console_getchar() - Reads a byte from console device.
> + *
> + * Returns the value read from console.
> + */
> +int sbi_console_getchar(void)
> +{
> + struct sbiret ret;
> +
> + ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0);
> +
> + return ret.error;
> +}
> +EXPORT_SYMBOL(sbi_console_getchar);
> +
> +/**
> + * sbi_set_timer() - Program the timer for next timer event.
> + * @stime_value: The value after which next timer event should fire.
> + *
> + * Return: None
> + */
> +void sbi_set_timer(uint64_t stime_value)
> +{
> +#if __riscv_xlen == 32
> + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
> + stime_value >> 32, 0, 0, 0, 0);
> +#else
> + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
> +#endif
> +}
> +EXPORT_SYMBOL(sbi_set_timer);
> +
> +/**
> + * sbi_shutdown() - Remove all the harts from executing supervisor code.
> + *
> + * Return: None
> + */
> +void sbi_shutdown(void)
> +{
> + sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
> +}
> +EXPORT_SYMBOL(sbi_shutdown);
> +
> +/**
> + * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
> + *
> + * Return: None
> + */
> +void sbi_clear_ipi(void)
> +{
> + sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
> +}
> +
> +/**
> + * sbi_send_ipi() - Send an IPI to any hart.
> + * @hart_mask: A cpu mask containing all the target harts.
> + *
> + * Return: None
> + */
> +void sbi_send_ipi(const unsigned long *hart_mask)
> +{
> + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
> + 0, 0, 0, 0, 0);
> +}
> +EXPORT_SYMBOL(sbi_send_ipi);
> +
> +/**
> + * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
> + * @hart_mask: A cpu mask containing all the target harts.
> + *
> + * Return: None
> + */
> +void sbi_remote_fence_i(const unsigned long *hart_mask)
> +{
> + sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask,
> + 0, 0, 0, 0, 0);
> +}
> +EXPORT_SYMBOL(sbi_remote_fence_i);
> +
> +/**
> + * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote
> + * harts for the specified virtual address range.
> + * @hart_mask: A cpu mask containing all the target harts.
> + * @start: Start of the virtual address
> + * @size: Total size of the virtual address range.
> + *
> + * Return: None
> + */
> +void sbi_remote_sfence_vma(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size)
> +{
> + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> + (unsigned long)hart_mask, start, size, 0, 0, 0);
> +}
> +EXPORT_SYMBOL(sbi_remote_sfence_vma);
> +
> +/**
> + * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given
> + * remote harts for a virtual address range belonging to a specific ASID.
> + *
> + * @hart_mask: A cpu mask containing all the target harts.
> + * @start: Start of the virtual address
> + * @size: Total size of the virtual address range.
> + * @asid: The value of address space identifier (ASID).
> + *
> + * Return: None
> + */
> +void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size,
> + unsigned long asid)
> +{
> + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> + (unsigned long)hart_mask, start, size, asid, 0, 0);
> +}
> +EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
> +
> +/**
> + * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
> + * @extid: The extension ID to be probed.
> + *
> + * Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise.
> + */
> +int sbi_probe_extension(long extid)
> +{
> + struct sbiret ret;
> +
> + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_PROBE_EXT, extid, 0, 0, 0, 0, 0);
> + pr_err("%ld: %ld\n", ret.value, ret.error);
> + if (!ret.error)
> + if (ret.value)
> + return ret.value;
> +
> + return -ENOTSUPP;
> +}
> +EXPORT_SYMBOL(sbi_probe_extension);
> +
> +static long sbi_get_spec_version(void)
> +{
> + struct sbiret ret;
> +
> + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_SPEC_VERSION,
> + 0, 0, 0, 0, 0, 0);
> + if (!ret.error)
> + return ret.value;
> + else
> + return ret.error;
> +}
> +
> +static long sbi_get_firmware_id(void)
> +{
> + struct sbiret ret;
> +
> + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_ID,
> + 0, 0, 0, 0, 0, 0);
> + if (!ret.error)
> + return ret.value;
> + else
> + return sbi_err_map_linux_errno(ret.error);
> +}
> +
> +static long sbi_get_firmware_version(void)
> +{
> + struct sbiret ret;
> +
> + ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_VERSION,
> + 0, 0, 0, 0, 0, 0);
> + if (!ret.error)
> + return ret.value;
> + else
> + return sbi_err_map_linux_errno(ret.error);
> +}
> +
> static void sbi_power_off(void)
> {
> sbi_shutdown();
> }
>
> -static int __init sbi_init(void)
> +int __init sbi_init(void)
> {
> + int ret;
> +
> pm_power_off = sbi_power_off;
> + ret = sbi_get_spec_version();
> + if (ret > 0)
> + sbi_spec_version = ret;
> +
> + pr_info("SBI specification v%lu.%lu detected\n",
> + sbi_major_version(), sbi_minor_version());
> + if (!sbi_spec_is_0_1())
> + pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
> + sbi_get_firmware_id(), sbi_get_firmware_version());
> return 0;
> }
> -early_initcall(sbi_init);
> diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
> index 365ff8420bfe..f0a3c51e3d1b 100644
> --- a/arch/riscv/kernel/setup.c
> +++ b/arch/riscv/kernel/setup.c
> @@ -22,6 +22,7 @@
> #include <asm/sections.h>
> #include <asm/pgtable.h>
> #include <asm/smp.h>
> +#include <asm/sbi.h>
> #include <asm/tlbflush.h>
> #include <asm/thread_info.h>
>
> @@ -74,6 +75,7 @@ void __init setup_arch(char **cmdline_p)
> swiotlb_init(1);
> #endif
>
> + sbi_init();
> #ifdef CONFIG_SMP
> setup_smp();
> #endif
> --
> 2.23.0
>
LGTM.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 3/4] RISC-V: Introduce a new config for SBI v0.1
2019-11-26 3:20 ` [PATCH v4 3/4] RISC-V: Introduce a new config for SBI v0.1 Atish Patra
@ 2019-11-26 4:14 ` Anup Patel
2019-11-26 18:12 ` Atish Patra
0 siblings, 1 reply; 12+ messages in thread
From: Anup Patel @ 2019-11-26 4:14 UTC (permalink / raw)
To: Atish Patra
Cc: Albert Ou, linux-kernel@vger.kernel.org List, Mike Rapoport,
Palmer Dabbelt, Paul Walmsley, linux-riscv, Thomas Gleixner,
Mao Han
On Tue, Nov 26, 2019 at 8:50 AM Atish Patra <atish.patra@wdc.com> wrote:
>
> We now have SBI v0.2 which is more scalable and extendable to handle
> future needs for RISC-V supervisor interfaces.
>
> Introduce a new config and move all SBI v0.1 code under that config.
> This allows to implement the new replacement SBI extensions cleanly
> and remove v0.1 extensions easily in future. Currently, the config
> is enabled by default. Once all M-mode software with v0.1 are no
> longer in use, this config option and all relevant code can be easily
> removed.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
> arch/riscv/Kconfig | 6 ++
> arch/riscv/include/asm/sbi.h | 2 +
> arch/riscv/kernel/sbi.c | 154 +++++++++++++++++++++++++++++------
> 3 files changed, 138 insertions(+), 24 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index ca3b5541ae93..15c020d6837b 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -304,6 +304,12 @@ config SECCOMP
> and the task is only allowed to execute a few safe syscalls
> defined by each seccomp mode.
>
> +config RISCV_SBI_V01
> + bool "SBI v0.1 support"
> + default y
> + help
> + This config allows kernel to use SBI v0.1 APIs. This will be
> + deprecated in future once legacy M-mode software are no longer in use.
> endmenu
>
> menu "Boot options"
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 906438322932..cc82ae63f8e0 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -10,6 +10,7 @@
>
> #ifdef CONFIG_RISCV_SBI
> enum sbi_ext_id {
> +#ifdef CONFIG_RISCV_SBI_V01
> SBI_EXT_0_1_SET_TIMER = 0x0,
> SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> @@ -19,6 +20,7 @@ enum sbi_ext_id {
> SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
> SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
> SBI_EXT_0_1_SHUTDOWN = 0x8,
> +#endif
> SBI_EXT_BASE = 0x10,
> };
>
> diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> index 8b36269fa515..8574de1074c4 100644
> --- a/arch/riscv/kernel/sbi.c
> +++ b/arch/riscv/kernel/sbi.c
> @@ -8,6 +8,14 @@
> unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT;
> EXPORT_SYMBOL(sbi_spec_version);
>
> +void (*__sbi_set_timer)(uint64_t stime);
> +int (*__sbi_send_ipi)(const unsigned long *hart_mask);
> +int (*__sbi_rfence)(unsigned long extid, unsigned long fid,
> + const unsigned long *hart_mask,
> + unsigned long hbase, unsigned long start,
> + unsigned long size, unsigned long arg4,
> + unsigned long arg5);
> +
Make these function pointers static.
> struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
> unsigned long arg1, unsigned long arg2,
> unsigned long arg3, unsigned long arg4,
> @@ -52,6 +60,32 @@ static int sbi_err_map_linux_errno(int err)
> };
> }
>
> +static inline void __sbi_set_timer_dummy_warn(uint64_t stime_value)
Don't make this function inline because you are assigning it to function
pointer below.
> +{
> + pr_warn("Timer extension is not available in SBI v%lu.%lu\n",
> + sbi_major_version(), sbi_minor_version());
> +}
> +
> +static inline int __sbi_send_ipi_dummy_warn(const unsigned long *hart_mask)
Same as above.
> +{
> + pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
> + sbi_major_version(), sbi_minor_version());
> + return 0;
> +}
> +
> +static inline int __sbi_rfence_dummy_warn(unsigned long extid,
> + unsigned long fid,
> + const unsigned long *hart_mask,
> + unsigned long hbase, unsigned long start,
> + unsigned long size, unsigned long arg4,
> + unsigned long arg5)
Same as above.
> +{
> + pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
> + sbi_major_version(), sbi_minor_version());
> + return 0;
> +}
> +
> +#ifdef CONFIG_RISCV_SBI_V01
> /**
> * sbi_console_putchar() - Writes given character to the console device.
> * @ch: The data to be written to the console.
> @@ -80,41 +114,106 @@ int sbi_console_getchar(void)
> EXPORT_SYMBOL(sbi_console_getchar);
>
> /**
> - * sbi_set_timer() - Program the timer for next timer event.
> - * @stime_value: The value after which next timer event should fire.
> + * sbi_shutdown() - Remove all the harts from executing supervisor code.
> *
> * Return: None
> */
> -void sbi_set_timer(uint64_t stime_value)
> +void sbi_shutdown(void)
> {
> -#if __riscv_xlen == 32
> - sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
> - stime_value >> 32, 0, 0, 0, 0);
> -#else
> - sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
> -#endif
> + sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
> }
> EXPORT_SYMBOL(sbi_set_timer);
>
> /**
> - * sbi_shutdown() - Remove all the harts from executing supervisor code.
> + * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
> *
> * Return: None
> */
> -void sbi_shutdown(void)
> +void sbi_clear_ipi(void)
> {
> - sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
> + sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
> }
> EXPORT_SYMBOL(sbi_shutdown);
>
> /**
> - * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
> + * sbi_set_timer_v01() - Program the timer for next timer event.
> + * @stime_value: The value after which next timer event should fire.
> *
> * Return: None
> */
> -void sbi_clear_ipi(void)
> +static void __sbi_set_timer_v01(uint64_t stime_value)
> {
> - sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
> +#if __riscv_xlen == 32
> + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
> + stime_value >> 32, 0, 0, 0, 0);
> +#else
> + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
> +#endif
> +}
> +
> +static int __sbi_send_ipi_v01(const unsigned long *hart_mask)
> +{
> + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
> + 0, 0, 0, 0, 0);
> + return 0;
> +}
> +
> +static int __sbi_rfence_v01(unsigned long ext, unsigned long fid,
> + const unsigned long *hart_mask,
> + unsigned long hbase, unsigned long start,
> + unsigned long size, unsigned long arg4,
> + unsigned long arg5)
> +{
> + switch (ext) {
> + case SBI_EXT_0_1_REMOTE_FENCE_I:
> + sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
> + (unsigned long)hart_mask, 0, 0, 0, 0, 0);
> + break;
> + case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
> + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> + (unsigned long)hart_mask, start, size,
> + 0, 0, 0);
> + break;
> + case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
> + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> + (unsigned long)hart_mask, start, size,
> + arg4, 0, 0);
> + break;
> + default:
> + pr_err("extid [%lu]not supported in SBI v0.1\n", ext);
> + }
> +
> + return 0;
> +}
> +#else
> +static void __sbi_set_timer_v01(uint64_t stime_value)
> +{
> + __sbi_set_timer_dummy_warn(0);
> +}
> +static int __sbi_send_ipi_v01(const unsigned long *hart_mask)
> +{
> + return __sbi_send_ipi_dummy_warn(NULL);
> +}
> +static int __sbi_rfence_v01(unsigned long ext, unsigned long fid,
> + const unsigned long *hart_mask,
> + unsigned long hbase, unsigned long start,
> + unsigned long size, unsigned long arg4,
> + unsigned long arg5)
> +{
> + return __sbi_rfence_dummy_warn(0, 0, 0, 0, 0, 0, 0, 0);
> +
> +}
> +#endif /* CONFIG_RISCV_SBI_V01 */
> +
> +/**
> + * sbi_set_timer() - Program the timer for next timer event.
> + * @stime_value: The value after which next timer event should fire.
> + *
> + * Return: None
> + */
> +void sbi_set_timer(uint64_t stime_value)
> +{
> + __sbi_set_timer(stime_value);
> }
>
> /**
> @@ -125,11 +224,11 @@ void sbi_clear_ipi(void)
> */
> void sbi_send_ipi(const unsigned long *hart_mask)
> {
> - sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)hart_mask,
> - 0, 0, 0, 0, 0);
> + __sbi_send_ipi(hart_mask);
> }
> EXPORT_SYMBOL(sbi_send_ipi);
>
> +
> /**
> * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
> * @hart_mask: A cpu mask containing all the target harts.
> @@ -138,8 +237,8 @@ EXPORT_SYMBOL(sbi_send_ipi);
> */
> void sbi_remote_fence_i(const unsigned long *hart_mask)
> {
> - sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned long)hart_mask,
> - 0, 0, 0, 0, 0);
> + __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
> + hart_mask, 0, 0, 0, 0, 0);
> }
> EXPORT_SYMBOL(sbi_remote_fence_i);
>
> @@ -156,8 +255,8 @@ void sbi_remote_sfence_vma(const unsigned long *hart_mask,
> unsigned long start,
> unsigned long size)
> {
> - sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> - (unsigned long)hart_mask, start, size, 0, 0, 0);
> + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> + hart_mask, 0, start, size, 0, 0);
> }
> EXPORT_SYMBOL(sbi_remote_sfence_vma);
>
> @@ -177,8 +276,8 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> unsigned long size,
> unsigned long asid)
> {
> - sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> - (unsigned long)hart_mask, start, size, asid, 0, 0);
> + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> + hart_mask, 0, start, size, asid, 0);
> }
> EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
>
> @@ -254,8 +353,15 @@ int __init sbi_init(void)
>
> pr_info("SBI specification v%lu.%lu detected\n",
> sbi_major_version(), sbi_minor_version());
> - if (!sbi_spec_is_0_1())
> +
> + if (sbi_spec_is_0_1()) {
> + __sbi_set_timer = __sbi_set_timer_v01;
> + __sbi_send_ipi = __sbi_send_ipi_v01;
> + __sbi_rfence = __sbi_rfence_v01;
> + } else {
> pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
> sbi_get_firmware_id(), sbi_get_firmware_version());
> + }
> +
> return 0;
> }
> --
> 2.23.0
>
Minor comments above otherwise looks good.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions
2019-11-26 3:20 ` [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions Atish Patra
@ 2019-11-26 4:16 ` Anup Patel
2019-11-26 18:13 ` Atish Patra
2019-11-26 6:52 ` kbuild test robot
1 sibling, 1 reply; 12+ messages in thread
From: Anup Patel @ 2019-11-26 4:16 UTC (permalink / raw)
To: Atish Patra
Cc: Albert Ou, linux-kernel@vger.kernel.org List, Mike Rapoport,
Palmer Dabbelt, Paul Walmsley, linux-riscv, Thomas Gleixner,
Mao Han
On Tue, Nov 26, 2019 at 8:50 AM Atish Patra <atish.patra@wdc.com> wrote:
>
> Few v0.1 SBI calls are being replaced by new SBI calls that follows
> v0.2 calling convention. The specification changes can be found at
>
> riscv/riscv-sbi-doc#27
>
> Implement the replacement extensions and few additional new SBI
> function calls that makes way for a better SBI interface in future.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
> arch/riscv/include/asm/sbi.h | 35 +++++++
> arch/riscv/kernel/sbi.c | 197 ++++++++++++++++++++++++++++++++++-
> 2 files changed, 229 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index cc82ae63f8e0..54ba9eebec11 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -22,6 +22,9 @@ enum sbi_ext_id {
> SBI_EXT_0_1_SHUTDOWN = 0x8,
> #endif
> SBI_EXT_BASE = 0x10,
> + SBI_EXT_TIME = 0x54494D45,
> + SBI_EXT_IPI = 0x735049,
> + SBI_EXT_RFENCE = 0x52464E43,
> };
>
> enum sbi_ext_base_fid {
> @@ -34,6 +37,24 @@ enum sbi_ext_base_fid {
> SBI_BASE_GET_MIMPID,
> };
>
> +enum sbi_ext_time_fid {
> + SBI_EXT_TIME_SET_TIMER = 0,
> +};
> +
> +enum sbi_ext_ipi_fid {
> + SBI_EXT_IPI_SEND_IPI = 0,
> +};
> +
> +enum sbi_ext_rfence_fid {
> + SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
> + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
> + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
> +};
> +
> #define SBI_SPEC_VERSION_DEFAULT 0x1
> #define SBI_SPEC_VERSION_MAJOR_OFFSET 24
> #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
> @@ -74,6 +95,20 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> unsigned long start,
> unsigned long size,
> unsigned long asid);
> +int sbi_remote_hfence_gvma(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size);
> +int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size,
> + unsigned long vmid);
> +int sbi_remote_hfence_vvma(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size);
> +int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size,
> + unsigned long asid);
> int sbi_probe_extension(long ext);
>
> /* Check if current SBI specification version is 0.1 or not */
> diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> index 8574de1074c4..74b3155b570f 100644
> --- a/arch/riscv/kernel/sbi.c
> +++ b/arch/riscv/kernel/sbi.c
> @@ -205,6 +205,101 @@ static int __sbi_rfence_v01(unsigned long ext, unsigned long fid,
> }
> #endif /* CONFIG_RISCV_SBI_V01 */
>
> +static void __sbi_set_timer_v02(uint64_t stime_value)
> +{
> +#if __riscv_xlen == 32
> + sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value,
> + stime_value >> 32, 0, 0, 0, 0);
> +#else
> + sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, 0,
> + 0, 0, 0, 0);
> +#endif
> +}
> +
> +static int __sbi_send_ipi_v02(const unsigned long *hart_mask)
> +{
> + unsigned long hmask_val;
> + struct sbiret ret = {0};
> + int result;
> +
> + if (!hart_mask)
> + hmask_val = *(cpumask_bits(cpu_online_mask));
> + else
> + hmask_val = *hart_mask;
> +
> + ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, hmask_val,
> + 0, 0, 0, 0, 0);
> + if (ret.error) {
> + pr_err("%s: failed with error [%d]\n", __func__,
> + sbi_err_map_linux_errno(ret.error));
> + result = ret.error;
> + } else
> + result = ret.value;
> +
> + return result;
> +}
> +
> +static int __sbi_rfence_v02(unsigned long extid, unsigned long fid,
> + const unsigned long *hart_mask,
> + unsigned long hbase, unsigned long start,
> + unsigned long size, unsigned long arg4,
> + unsigned long arg5)
> +{
> + unsigned long hmask_val;
> + struct sbiret ret = {0};
> + int result;
> + unsigned long ext = SBI_EXT_RFENCE;
> +
> + if (!hart_mask)
> + hmask_val = *(cpumask_bits(cpu_online_mask));
> + else
> + hmask_val = *hart_mask;
> +
> + switch (fid) {
> + case SBI_EXT_RFENCE_REMOTE_FENCE_I:
> + ret = sbi_ecall(ext, fid, hmask_val, 0, 0, 0, 0, 0);
> + break;
> + case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
> + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> + size, 0, 0);
> + break;
> + case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
> + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> + size, arg4, 0);
> + break;
> + /*TODO: Handle non zero hbase cases */
> + case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
> + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> + size, 0, 0);
> + break;
> + case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
> + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> + size, arg4, 0);
> + break;
> + case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
> + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> + size, 0, 0);
> + break;
> + case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
> + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> + size, arg4, 0);
> + break;
> + default:
> + pr_err("unknown function ID [%lu] for SBI extension [%lu]\n",
> + fid, ext);
> + result = -EINVAL;
> + }
> +
> + if (ret.error) {
> + pr_err("%s: failed with error [%d]\n", __func__,
> + sbi_err_map_linux_errno(ret.error));
> + result = ret.error;
> + } else
> + result = ret.value;
> +
> + return result;
> +}
> +
> /**
> * sbi_set_timer() - Program the timer for next timer event.
> * @stime_value: The value after which next timer event should fire.
> @@ -237,7 +332,7 @@ EXPORT_SYMBOL(sbi_send_ipi);
> */
> void sbi_remote_fence_i(const unsigned long *hart_mask)
> {
> - __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
> + __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, SBI_EXT_RFENCE_REMOTE_FENCE_I,
> hart_mask, 0, 0, 0, 0, 0);
> }
> EXPORT_SYMBOL(sbi_remote_fence_i);
> @@ -255,7 +350,8 @@ void sbi_remote_sfence_vma(const unsigned long *hart_mask,
> unsigned long start,
> unsigned long size)
> {
> - __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA,
> + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
> hart_mask, 0, start, size, 0, 0);
> }
> EXPORT_SYMBOL(sbi_remote_sfence_vma);
> @@ -276,11 +372,93 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> unsigned long size,
> unsigned long asid)
> {
> - __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID,
> + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
> hart_mask, 0, start, size, asid, 0);
> }
> EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
>
> +/**
> + * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on given remote
> + * harts for the specified guest physical address range.
> + * @hart_mask: A cpu mask containing all the target harts.
> + * @start: Start of the guest physical address
> + * @size: Total size of the guest physical address range.
> + *
> + * Return: None
> + */
> +int sbi_remote_hfence_gvma(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size)
> +{
> + return __sbi_rfence(SBI_EXT_RFENCE, SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
> + hart_mask, 0, start, size, 0, 0);
> +}
> +EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma);
> +
> +/**
> + * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA instructions on given
> + * remote harts for a guest physical address range belonging to a specific VMID.
> + *
> + * @hart_mask: A cpu mask containing all the target harts.
> + * @start: Start of the guest physical address
> + * @size: Total size of the guest physical address range.
> + * @vmid: The value of guest ID (VMID).
> + *
> + * Return: 0 if success, Error otherwise.
> + */
> +int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size,
> + unsigned long vmid)
> +{
> + return __sbi_rfence(SBI_EXT_RFENCE,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
> + hart_mask, 0, start, size, vmid, 0);
> +}
> +EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid);
> +
> +/**
> + * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on given remote
> + * harts for the current guest virtual address range.
> + * @hart_mask: A cpu mask containing all the target harts.
> + * @start: Start of the current guest virtual address
> + * @size: Total size of the current guest virtual address range.
> + *
> + * Return: None
> + */
> +int sbi_remote_hfence_vvma(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size)
> +{
> + return __sbi_rfence(SBI_EXT_RFENCE, SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
> + hart_mask, 0, start, size, 0, 0);
> +}
> +EXPORT_SYMBOL(sbi_remote_hfence_vvma);
> +
> +/**
> + * sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA instructions on given
> + * remote harts for current guest virtual address range belonging to a specific
> + * ASID.
> + *
> + * @hart_mask: A cpu mask containing all the target harts.
> + * @start: Start of the current guest virtual address
> + * @size: Total size of the current guest virtual address range.
> + * @asid: The value of address space identifier (ASID).
> + *
> + * Return: None
> + */
> +int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
> + unsigned long start,
> + unsigned long size,
> + unsigned long asid)
> +{
> + return __sbi_rfence(SBI_EXT_RFENCE,
> + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
> + hart_mask, 0, start, size, asid, 0);
> +}
> +EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
> +
> /**
> * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
> * @extid: The extension ID to be probed.
> @@ -361,6 +539,19 @@ int __init sbi_init(void)
> } else {
> pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
> sbi_get_firmware_id(), sbi_get_firmware_version());
> + if (sbi_probe_extension(SBI_EXT_TIME) > 0)
> + __sbi_set_timer = __sbi_set_timer_v02;
> + else
> + __sbi_set_timer = __sbi_set_timer_dummy_warn;
> + if (sbi_probe_extension(SBI_EXT_IPI) > 0)
> + __sbi_send_ipi = __sbi_send_ipi_v02;
> + else
> + __sbi_send_ipi = __sbi_send_ipi_dummy_warn;
> + if (sbi_probe_extension(SBI_EXT_RFENCE) > 0)
> + __sbi_rfence = __sbi_rfence_v02;
> + else
> + __sbi_rfence = __sbi_rfence_dummy_warn;
> +
> }
>
> return 0;
> --
> 2.23.0
>
You might want to print whether TIMER, IPI and RFENCE extension
were detected at boot-time.
Otherwise, looks good.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards,
Anup
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions
2019-11-26 3:20 ` [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions Atish Patra
2019-11-26 4:16 ` Anup Patel
@ 2019-11-26 6:52 ` kbuild test robot
1 sibling, 0 replies; 12+ messages in thread
From: kbuild test robot @ 2019-11-26 6:52 UTC (permalink / raw)
To: Atish Patra
Cc: Albert Ou, kbuild-all, Anup Patel, linux-kernel, Mike Rapoport,
Atish Patra, Palmer Dabbelt, Paul Walmsley, linux-riscv,
Thomas Gleixner, Mao Han
[-- Attachment #1: Type: text/plain, Size: 28107 bytes --]
Hi Atish,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on next-20191125]
[cannot apply to linus/master v5.4 v5.4-rc8 v5.4-rc7 v5.4]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Atish-Patra/Add-support-for-SBI-v0-2/20191126-122142
base: c165016bac2719e05794c216f9b6da730d68d1e3
config: riscv-allnoconfig (attached as .config)
compiler: riscv64-linux-gcc (GCC) 7.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=riscv
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
arch/riscv/kernel/sbi.c:71:52: note: format string is defined here
pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
~~^
%u
In file included from include/linux/printk.h:7:0,
from include/linux/kernel.h:15,
from include/linux/list.h:9,
from include/linux/pm.h:11,
from arch/riscv/kernel/sbi.c:4:
include/linux/kern_levels.h:5:18: warning: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'int' [-Wformat=]
#define KERN_SOH "\001" /* ASCII Start Of Header */
^
include/linux/kern_levels.h:12:22: note: in expansion of macro 'KERN_SOH'
#define KERN_WARNING KERN_SOH "4" /* warning conditions */
^~~~~~~~
include/linux/printk.h:306:9: note: in expansion of macro 'KERN_WARNING'
printk(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~~~~
include/linux/printk.h:307:17: note: in expansion of macro 'pr_warning'
#define pr_warn pr_warning
^~~~~~~~~~
arch/riscv/kernel/sbi.c:71:2: note: in expansion of macro 'pr_warn'
pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
^~~~~~~
arch/riscv/kernel/sbi.c:71:56: note: format string is defined here
pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
~~^
%u
In file included from include/linux/printk.h:7:0,
from include/linux/kernel.h:15,
from include/linux/list.h:9,
from include/linux/pm.h:11,
from arch/riscv/kernel/sbi.c:4:
arch/riscv/kernel/sbi.c: In function '__sbi_rfence_dummy_warn':
include/linux/kern_levels.h:5:18: warning: format '%lu' expects argument of type 'long unsigned int', but argument 2 has type 'int' [-Wformat=]
#define KERN_SOH "\001" /* ASCII Start Of Header */
^
include/linux/kern_levels.h:12:22: note: in expansion of macro 'KERN_SOH'
#define KERN_WARNING KERN_SOH "4" /* warning conditions */
^~~~~~~~
include/linux/printk.h:306:9: note: in expansion of macro 'KERN_WARNING'
printk(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~~~~
include/linux/printk.h:307:17: note: in expansion of macro 'pr_warning'
#define pr_warn pr_warning
^~~~~~~~~~
arch/riscv/kernel/sbi.c:83:2: note: in expansion of macro 'pr_warn'
pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
^~~~~~~
arch/riscv/kernel/sbi.c:83:61: note: format string is defined here
pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
~~^
%u
In file included from include/linux/printk.h:7:0,
from include/linux/kernel.h:15,
from include/linux/list.h:9,
from include/linux/pm.h:11,
from arch/riscv/kernel/sbi.c:4:
include/linux/kern_levels.h:5:18: warning: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'int' [-Wformat=]
#define KERN_SOH "\001" /* ASCII Start Of Header */
^
include/linux/kern_levels.h:12:22: note: in expansion of macro 'KERN_SOH'
#define KERN_WARNING KERN_SOH "4" /* warning conditions */
^~~~~~~~
include/linux/printk.h:306:9: note: in expansion of macro 'KERN_WARNING'
printk(KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~~~~
include/linux/printk.h:307:17: note: in expansion of macro 'pr_warning'
#define pr_warn pr_warning
^~~~~~~~~~
arch/riscv/kernel/sbi.c:83:2: note: in expansion of macro 'pr_warn'
pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
^~~~~~~
arch/riscv/kernel/sbi.c:83:65: note: format string is defined here
pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
~~^
%u
arch/riscv/kernel/sbi.c: In function '__sbi_set_timer_v02':
arch/riscv/kernel/sbi.c:214:12: error: 'SBI_EXT_TIME' undeclared (first use in this function); did you mean 'STA_PPSTIME'?
sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, 0,
^~~~~~~~~~~~
STA_PPSTIME
arch/riscv/kernel/sbi.c:214:26: error: 'SBI_EXT_TIME_SET_TIMER' undeclared (first use in this function); did you mean 'SBI_EXT_TIME'?
sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, 0,
^~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_TIME
arch/riscv/kernel/sbi.c: In function '__sbi_send_ipi_v02':
arch/riscv/kernel/sbi.c:222:9: error: variable 'ret' has initializer but incomplete type
struct sbiret ret = {0};
^~~~~~
arch/riscv/kernel/sbi.c:222:23: warning: excess elements in struct initializer
struct sbiret ret = {0};
^
arch/riscv/kernel/sbi.c:222:23: note: (near initialization for 'ret')
arch/riscv/kernel/sbi.c:222:16: error: storage size of 'ret' isn't known
struct sbiret ret = {0};
^~~
arch/riscv/kernel/sbi.c:230:18: error: 'SBI_EXT_IPI' undeclared (first use in this function)
ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, hmask_val,
^~~~~~~~~~~
>> arch/riscv/kernel/sbi.c:230:31: error: 'SBI_EXT_IPI_SEND_IPI' undeclared (first use in this function); did you mean 'SBI_EXT_IPI'?
ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, hmask_val,
^~~~~~~~~~~~~~~~~~~~
SBI_EXT_IPI
arch/riscv/kernel/sbi.c:222:16: warning: unused variable 'ret' [-Wunused-variable]
struct sbiret ret = {0};
^~~
arch/riscv/kernel/sbi.c: In function '__sbi_rfence_v02':
arch/riscv/kernel/sbi.c:249:9: error: variable 'ret' has initializer but incomplete type
struct sbiret ret = {0};
^~~~~~
arch/riscv/kernel/sbi.c:249:23: warning: excess elements in struct initializer
struct sbiret ret = {0};
^
arch/riscv/kernel/sbi.c:249:23: note: (near initialization for 'ret')
arch/riscv/kernel/sbi.c:249:16: error: storage size of 'ret' isn't known
struct sbiret ret = {0};
^~~
arch/riscv/kernel/sbi.c:251:22: error: 'SBI_EXT_RFENCE' undeclared (first use in this function); did you mean 'RISCV_FENCE'?
unsigned long ext = SBI_EXT_RFENCE;
^~~~~~~~~~~~~~
RISCV_FENCE
arch/riscv/kernel/sbi.c:259:7: error: 'SBI_EXT_RFENCE_REMOTE_FENCE_I' undeclared (first use in this function)
case SBI_EXT_RFENCE_REMOTE_FENCE_I:
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c:262:7: error: 'SBI_EXT_RFENCE_REMOTE_SFENCE_VMA' undeclared (first use in this function); did you mean 'SBI_EXT_RFENCE_REMOTE_FENCE_I'?
case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_RFENCE_REMOTE_FENCE_I
arch/riscv/kernel/sbi.c:266:7: error: 'SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID' undeclared (first use in this function); did you mean 'SBI_EXT_RFENCE_REMOTE_SFENCE_VMA'?
case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
>> arch/riscv/kernel/sbi.c:271:7: error: 'SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA' undeclared (first use in this function); did you mean 'SBI_EXT_RFENCE_REMOTE_SFENCE_VMA'?
case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
>> arch/riscv/kernel/sbi.c:275:7: error: 'SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID' undeclared (first use in this function); did you mean 'SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID'?
case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
>> arch/riscv/kernel/sbi.c:279:7: error: 'SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA' undeclared (first use in this function); did you mean 'SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA'?
case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA
>> arch/riscv/kernel/sbi.c:283:7: error: 'SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID' undeclared (first use in this function); did you mean 'SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID'?
case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
arch/riscv/kernel/sbi.c:249:16: warning: unused variable 'ret' [-Wunused-variable]
struct sbiret ret = {0};
^~~
arch/riscv/kernel/sbi.c: In function 'sbi_remote_fence_i':
arch/riscv/kernel/sbi.c:335:15: error: 'SBI_EXT_0_1_REMOTE_FENCE_I' undeclared (first use in this function)
__sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, SBI_EXT_RFENCE_REMOTE_FENCE_I,
^~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c:335:43: error: 'SBI_EXT_RFENCE_REMOTE_FENCE_I' undeclared (first use in this function); did you mean 'SBI_EXT_0_1_REMOTE_FENCE_I'?
__sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, SBI_EXT_RFENCE_REMOTE_FENCE_I,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_0_1_REMOTE_FENCE_I
arch/riscv/kernel/sbi.c: In function 'sbi_remote_sfence_vma':
arch/riscv/kernel/sbi.c:353:15: error: 'SBI_EXT_0_1_REMOTE_SFENCE_VMA' undeclared (first use in this function)
__sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> arch/riscv/kernel/sbi.c:354:8: error: 'SBI_EXT_RFENCE_REMOTE_SFENCE_VMA' undeclared (first use in this function); did you mean 'SBI_EXT_0_1_REMOTE_SFENCE_VMA'?
SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_0_1_REMOTE_SFENCE_VMA
arch/riscv/kernel/sbi.c: In function 'sbi_remote_sfence_vma_asid':
arch/riscv/kernel/sbi.c:375:15: error: 'SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID' undeclared (first use in this function)
__sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> arch/riscv/kernel/sbi.c:376:8: error: 'SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID' undeclared (first use in this function); did you mean 'SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID'?
SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID
arch/riscv/kernel/sbi.c: In function 'sbi_remote_hfence_gvma':
arch/riscv/kernel/sbi.c:394:22: error: 'SBI_EXT_RFENCE' undeclared (first use in this function); did you mean 'RISCV_FENCE'?
return __sbi_rfence(SBI_EXT_RFENCE, SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
^~~~~~~~~~~~~~
RISCV_FENCE
arch/riscv/kernel/sbi.c:394:38: error: 'SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA' undeclared (first use in this function)
return __sbi_rfence(SBI_EXT_RFENCE, SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c: In function 'sbi_remote_hfence_gvma_vmid':
arch/riscv/kernel/sbi.c:415:22: error: 'SBI_EXT_RFENCE' undeclared (first use in this function); did you mean 'RISCV_FENCE'?
return __sbi_rfence(SBI_EXT_RFENCE,
^~~~~~~~~~~~~~
RISCV_FENCE
arch/riscv/kernel/sbi.c:416:8: error: 'SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID' undeclared (first use in this function)
SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c: In function 'sbi_remote_hfence_vvma':
arch/riscv/kernel/sbi.c:434:22: error: 'SBI_EXT_RFENCE' undeclared (first use in this function); did you mean 'RISCV_FENCE'?
return __sbi_rfence(SBI_EXT_RFENCE, SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
^~~~~~~~~~~~~~
RISCV_FENCE
arch/riscv/kernel/sbi.c:434:38: error: 'SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA' undeclared (first use in this function)
return __sbi_rfence(SBI_EXT_RFENCE, SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c: In function 'sbi_remote_hfence_vvma_asid':
arch/riscv/kernel/sbi.c:456:22: error: 'SBI_EXT_RFENCE' undeclared (first use in this function); did you mean 'RISCV_FENCE'?
return __sbi_rfence(SBI_EXT_RFENCE,
^~~~~~~~~~~~~~
RISCV_FENCE
arch/riscv/kernel/sbi.c:457:8: error: 'SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID' undeclared (first use in this function)
SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c: In function 'sbi_probe_extension':
arch/riscv/kernel/sbi.c:470:16: error: storage size of 'ret' isn't known
struct sbiret ret;
^~~
arch/riscv/kernel/sbi.c:472:18: error: 'SBI_EXT_BASE' undeclared (first use in this function); did you mean 'BIT_MASK'?
ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_PROBE_EXT, extid, 0, 0, 0, 0, 0);
^~~~~~~~~~~~
BIT_MASK
arch/riscv/kernel/sbi.c:472:32: error: 'SBI_BASE_PROBE_EXT' undeclared (first use in this function)
ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_PROBE_EXT, extid, 0, 0, 0, 0, 0);
^~~~~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c:470:16: warning: unused variable 'ret' [-Wunused-variable]
struct sbiret ret;
^~~
arch/riscv/kernel/sbi.c: In function 'sbi_get_spec_version':
arch/riscv/kernel/sbi.c:484:16: error: storage size of 'ret' isn't known
struct sbiret ret;
^~~
arch/riscv/kernel/sbi.c:486:18: error: 'SBI_EXT_BASE' undeclared (first use in this function); did you mean 'BIT_MASK'?
ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_SPEC_VERSION,
^~~~~~~~~~~~
BIT_MASK
arch/riscv/kernel/sbi.c:486:32: error: 'SBI_BASE_GET_SPEC_VERSION' undeclared (first use in this function)
ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_SPEC_VERSION,
^~~~~~~~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c:484:16: warning: unused variable 'ret' [-Wunused-variable]
struct sbiret ret;
^~~
arch/riscv/kernel/sbi.c: In function 'sbi_get_firmware_id':
arch/riscv/kernel/sbi.c:496:16: error: storage size of 'ret' isn't known
struct sbiret ret;
^~~
arch/riscv/kernel/sbi.c:498:18: error: 'SBI_EXT_BASE' undeclared (first use in this function); did you mean 'BIT_MASK'?
ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_ID,
^~~~~~~~~~~~
BIT_MASK
arch/riscv/kernel/sbi.c:498:32: error: 'SBI_BASE_GET_IMP_ID' undeclared (first use in this function)
ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_ID,
^~~~~~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c:496:16: warning: unused variable 'ret' [-Wunused-variable]
struct sbiret ret;
^~~
arch/riscv/kernel/sbi.c: In function 'sbi_get_firmware_version':
arch/riscv/kernel/sbi.c:508:16: error: storage size of 'ret' isn't known
struct sbiret ret;
^~~
arch/riscv/kernel/sbi.c:510:18: error: 'SBI_EXT_BASE' undeclared (first use in this function); did you mean 'BIT_MASK'?
ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_VERSION,
^~~~~~~~~~~~
BIT_MASK
arch/riscv/kernel/sbi.c:510:32: error: 'SBI_BASE_GET_IMP_VERSION' undeclared (first use in this function); did you mean '__GXX_ABI_VERSION'?
ret = sbi_ecall(SBI_EXT_BASE, SBI_BASE_GET_IMP_VERSION,
^~~~~~~~~~~~~~~~~~~~~~~~
__GXX_ABI_VERSION
arch/riscv/kernel/sbi.c:508:16: warning: unused variable 'ret' [-Wunused-variable]
struct sbiret ret;
^~~
arch/riscv/kernel/sbi.c: In function 'sbi_power_off':
arch/riscv/kernel/sbi.c:520:2: error: implicit declaration of function 'sbi_shutdown' [-Werror=implicit-function-declaration]
sbi_shutdown();
^~~~~~~~~~~~
In file included from include/linux/printk.h:7:0,
from include/linux/kernel.h:15,
from include/linux/list.h:9,
from include/linux/pm.h:11,
from arch/riscv/kernel/sbi.c:4:
arch/riscv/kernel/sbi.c: In function 'sbi_init':
include/linux/kern_levels.h:5:18: warning: format '%lu' expects argument of type 'long unsigned int', but argument 2 has type 'int' [-Wformat=]
#define KERN_SOH "\001" /* ASCII Start Of Header */
^
include/linux/kern_levels.h:14:19: note: in expansion of macro 'KERN_SOH'
#define KERN_INFO KERN_SOH "6" /* informational */
^~~~~~~~
include/linux/printk.h:311:9: note: in expansion of macro 'KERN_INFO'
printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~
arch/riscv/kernel/sbi.c:532:2: note: in expansion of macro 'pr_info'
pr_info("SBI specification v%lu.%lu detected\n",
^~~~~~~
arch/riscv/kernel/sbi.c:532:32: note: format string is defined here
pr_info("SBI specification v%lu.%lu detected\n",
~~^
%u
In file included from include/linux/printk.h:7:0,
from include/linux/kernel.h:15,
from include/linux/list.h:9,
from include/linux/pm.h:11,
from arch/riscv/kernel/sbi.c:4:
include/linux/kern_levels.h:5:18: warning: format '%lu' expects argument of type 'long unsigned int', but argument 3 has type 'int' [-Wformat=]
#define KERN_SOH "\001" /* ASCII Start Of Header */
^
include/linux/kern_levels.h:14:19: note: in expansion of macro 'KERN_SOH'
#define KERN_INFO KERN_SOH "6" /* informational */
^~~~~~~~
include/linux/printk.h:311:9: note: in expansion of macro 'KERN_INFO'
printk(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__)
^~~~~~~~~
arch/riscv/kernel/sbi.c:532:2: note: in expansion of macro 'pr_info'
pr_info("SBI specification v%lu.%lu detected\n",
^~~~~~~
arch/riscv/kernel/sbi.c:532:36: note: format string is defined here
pr_info("SBI specification v%lu.%lu detected\n",
~~^
%u
arch/riscv/kernel/sbi.c:535:6: error: implicit declaration of function 'sbi_spec_is_0_1' [-Werror=implicit-function-declaration]
if (sbi_spec_is_0_1()) {
^~~~~~~~~~~~~~~
arch/riscv/kernel/sbi.c:542:27: error: 'SBI_EXT_TIME' undeclared (first use in this function); did you mean 'STA_PPSTIME'?
if (sbi_probe_extension(SBI_EXT_TIME) > 0)
^~~~~~~~~~~~
STA_PPSTIME
>> arch/riscv/kernel/sbi.c:546:27: error: 'SBI_EXT_IPI' undeclared (first use in this function); did you mean 'SBI_EXT_TIME'?
if (sbi_probe_extension(SBI_EXT_IPI) > 0)
^~~~~~~~~~~
SBI_EXT_TIME
>> arch/riscv/kernel/sbi.c:550:27: error: 'SBI_EXT_RFENCE' undeclared (first use in this function); did you mean 'SBI_EXT_TIME'?
if (sbi_probe_extension(SBI_EXT_RFENCE) > 0)
^~~~~~~~~~~~~~
SBI_EXT_TIME
arch/riscv/kernel/sbi.c: In function 'sbi_remote_hfence_gvma':
arch/riscv/kernel/sbi.c:396:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
arch/riscv/kernel/sbi.c: In function 'sbi_remote_hfence_gvma_vmid':
arch/riscv/kernel/sbi.c:418:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
arch/riscv/kernel/sbi.c: In function 'sbi_remote_hfence_vvma':
arch/riscv/kernel/sbi.c:436:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
arch/riscv/kernel/sbi.c: In function 'sbi_remote_hfence_vvma_asid':
arch/riscv/kernel/sbi.c:459:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
arch/riscv/kernel/sbi.c: In function 'sbi_get_spec_version':
arch/riscv/kernel/sbi.c:492:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
arch/riscv/kernel/sbi.c: In function 'sbi_get_firmware_id':
arch/riscv/kernel/sbi.c:504:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
arch/riscv/kernel/sbi.c: In function 'sbi_get_firmware_version':
arch/riscv/kernel/sbi.c:516:1: warning: control reaches end of non-void function [-Wreturn-type]
}
^
cc1: some warnings being treated as errors
vim +230 arch/riscv/kernel/sbi.c
218
219 static int __sbi_send_ipi_v02(const unsigned long *hart_mask)
220 {
221 unsigned long hmask_val;
> 222 struct sbiret ret = {0};
223 int result;
224
225 if (!hart_mask)
226 hmask_val = *(cpumask_bits(cpu_online_mask));
227 else
228 hmask_val = *hart_mask;
229
> 230 ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI, hmask_val,
231 0, 0, 0, 0, 0);
232 if (ret.error) {
233 pr_err("%s: failed with error [%d]\n", __func__,
234 sbi_err_map_linux_errno(ret.error));
235 result = ret.error;
236 } else
237 result = ret.value;
238
239 return result;
240 }
241
242 static int __sbi_rfence_v02(unsigned long extid, unsigned long fid,
243 const unsigned long *hart_mask,
244 unsigned long hbase, unsigned long start,
245 unsigned long size, unsigned long arg4,
246 unsigned long arg5)
247 {
248 unsigned long hmask_val;
249 struct sbiret ret = {0};
250 int result;
251 unsigned long ext = SBI_EXT_RFENCE;
252
253 if (!hart_mask)
254 hmask_val = *(cpumask_bits(cpu_online_mask));
255 else
256 hmask_val = *hart_mask;
257
258 switch (fid) {
259 case SBI_EXT_RFENCE_REMOTE_FENCE_I:
260 ret = sbi_ecall(ext, fid, hmask_val, 0, 0, 0, 0, 0);
261 break;
> 262 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
263 ret = sbi_ecall(ext, fid, hmask_val, 0, start,
264 size, 0, 0);
265 break;
> 266 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
267 ret = sbi_ecall(ext, fid, hmask_val, 0, start,
268 size, arg4, 0);
269 break;
270 /*TODO: Handle non zero hbase cases */
> 271 case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
272 ret = sbi_ecall(ext, fid, hmask_val, 0, start,
273 size, 0, 0);
274 break;
> 275 case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
276 ret = sbi_ecall(ext, fid, hmask_val, 0, start,
277 size, arg4, 0);
278 break;
> 279 case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
280 ret = sbi_ecall(ext, fid, hmask_val, 0, start,
281 size, 0, 0);
282 break;
> 283 case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
284 ret = sbi_ecall(ext, fid, hmask_val, 0, start,
285 size, arg4, 0);
286 break;
287 default:
288 pr_err("unknown function ID [%lu] for SBI extension [%lu]\n",
289 fid, ext);
290 result = -EINVAL;
291 }
292
293 if (ret.error) {
294 pr_err("%s: failed with error [%d]\n", __func__,
295 sbi_err_map_linux_errno(ret.error));
296 result = ret.error;
297 } else
298 result = ret.value;
299
300 return result;
301 }
302
303 /**
304 * sbi_set_timer() - Program the timer for next timer event.
305 * @stime_value: The value after which next timer event should fire.
306 *
307 * Return: None
308 */
309 void sbi_set_timer(uint64_t stime_value)
310 {
311 __sbi_set_timer(stime_value);
312 }
313
314 /**
315 * sbi_send_ipi() - Send an IPI to any hart.
316 * @hart_mask: A cpu mask containing all the target harts.
317 *
318 * Return: None
319 */
320 void sbi_send_ipi(const unsigned long *hart_mask)
321 {
322 __sbi_send_ipi(hart_mask);
323 }
324 EXPORT_SYMBOL(sbi_send_ipi);
325
326
327 /**
328 * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
329 * @hart_mask: A cpu mask containing all the target harts.
330 *
331 * Return: None
332 */
333 void sbi_remote_fence_i(const unsigned long *hart_mask)
334 {
> 335 __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, SBI_EXT_RFENCE_REMOTE_FENCE_I,
336 hart_mask, 0, 0, 0, 0, 0);
337 }
338 EXPORT_SYMBOL(sbi_remote_fence_i);
339
340 /**
341 * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote
342 * harts for the specified virtual address range.
343 * @hart_mask: A cpu mask containing all the target harts.
344 * @start: Start of the virtual address
345 * @size: Total size of the virtual address range.
346 *
347 * Return: None
348 */
349 void sbi_remote_sfence_vma(const unsigned long *hart_mask,
350 unsigned long start,
351 unsigned long size)
352 {
353 __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA,
> 354 SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
355 hart_mask, 0, start, size, 0, 0);
356 }
357 EXPORT_SYMBOL(sbi_remote_sfence_vma);
358
359 /**
360 * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given
361 * remote harts for a virtual address range belonging to a specific ASID.
362 *
363 * @hart_mask: A cpu mask containing all the target harts.
364 * @start: Start of the virtual address
365 * @size: Total size of the virtual address range.
366 * @asid: The value of address space identifier (ASID).
367 *
368 * Return: None
369 */
370 void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
371 unsigned long start,
372 unsigned long size,
373 unsigned long asid)
374 {
375 __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID,
> 376 SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
377 hart_mask, 0, start, size, asid, 0);
378 }
379 EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
380
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 5332 bytes --]
[-- Attachment #3: Type: text/plain, Size: 161 bytes --]
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 3/4] RISC-V: Introduce a new config for SBI v0.1
2019-11-26 4:14 ` Anup Patel
@ 2019-11-26 18:12 ` Atish Patra
0 siblings, 0 replies; 12+ messages in thread
From: Atish Patra @ 2019-11-26 18:12 UTC (permalink / raw)
To: anup
Cc: aou, linux-kernel, rppt, palmer, paul.walmsley, linux-riscv,
tglx, han_mao
On Tue, 2019-11-26 at 09:44 +0530, Anup Patel wrote:
> On Tue, Nov 26, 2019 at 8:50 AM Atish Patra <atish.patra@wdc.com>
> wrote:
> > We now have SBI v0.2 which is more scalable and extendable to
> > handle
> > future needs for RISC-V supervisor interfaces.
> >
> > Introduce a new config and move all SBI v0.1 code under that
> > config.
> > This allows to implement the new replacement SBI extensions cleanly
> > and remove v0.1 extensions easily in future. Currently, the config
> > is enabled by default. Once all M-mode software with v0.1 are no
> > longer in use, this config option and all relevant code can be
> > easily
> > removed.
> >
> > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > ---
> > arch/riscv/Kconfig | 6 ++
> > arch/riscv/include/asm/sbi.h | 2 +
> > arch/riscv/kernel/sbi.c | 154 +++++++++++++++++++++++++++++
> > ------
> > 3 files changed, 138 insertions(+), 24 deletions(-)
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index ca3b5541ae93..15c020d6837b 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -304,6 +304,12 @@ config SECCOMP
> > and the task is only allowed to execute a few safe
> > syscalls
> > defined by each seccomp mode.
> >
> > +config RISCV_SBI_V01
> > + bool "SBI v0.1 support"
> > + default y
> > + help
> > + This config allows kernel to use SBI v0.1 APIs. This will
> > be
> > + deprecated in future once legacy M-mode software are no
> > longer in use.
> > endmenu
> >
> > menu "Boot options"
> > diff --git a/arch/riscv/include/asm/sbi.h
> > b/arch/riscv/include/asm/sbi.h
> > index 906438322932..cc82ae63f8e0 100644
> > --- a/arch/riscv/include/asm/sbi.h
> > +++ b/arch/riscv/include/asm/sbi.h
> > @@ -10,6 +10,7 @@
> >
> > #ifdef CONFIG_RISCV_SBI
> > enum sbi_ext_id {
> > +#ifdef CONFIG_RISCV_SBI_V01
> > SBI_EXT_0_1_SET_TIMER = 0x0,
> > SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
> > SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
> > @@ -19,6 +20,7 @@ enum sbi_ext_id {
> > SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
> > SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
> > SBI_EXT_0_1_SHUTDOWN = 0x8,
> > +#endif
> > SBI_EXT_BASE = 0x10,
> > };
> >
> > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> > index 8b36269fa515..8574de1074c4 100644
> > --- a/arch/riscv/kernel/sbi.c
> > +++ b/arch/riscv/kernel/sbi.c
> > @@ -8,6 +8,14 @@
> > unsigned long sbi_spec_version = SBI_SPEC_VERSION_DEFAULT;
> > EXPORT_SYMBOL(sbi_spec_version);
> >
> > +void (*__sbi_set_timer)(uint64_t stime);
> > +int (*__sbi_send_ipi)(const unsigned long *hart_mask);
> > +int (*__sbi_rfence)(unsigned long extid, unsigned long fid,
> > + const unsigned long *hart_mask,
> > + unsigned long hbase, unsigned long start,
> > + unsigned long size, unsigned long arg4,
> > + unsigned long arg5);
> > +
>
> Make these function pointers static.
>
Sure.
> > struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
> > unsigned long arg1, unsigned long arg2,
> > unsigned long arg3, unsigned long arg4,
> > @@ -52,6 +60,32 @@ static int sbi_err_map_linux_errno(int err)
> > };
> > }
> >
> > +static inline void __sbi_set_timer_dummy_warn(uint64_t
> > stime_value)
>
> Don't make this function inline because you are assigning it to
> function
> pointer below.
>
Thanks for pointing that out. I wil fix all the instances.
> > +{
> > + pr_warn("Timer extension is not available in SBI
> > v%lu.%lu\n",
> > + sbi_major_version(), sbi_minor_version());
> > +}
> > +
> > +static inline int __sbi_send_ipi_dummy_warn(const unsigned long
> > *hart_mask)
>
> Same as above.
>
> > +{
> > + pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
> > + sbi_major_version(), sbi_minor_version());
> > + return 0;
> > +}
> > +
> > +static inline int __sbi_rfence_dummy_warn(unsigned long extid,
> > + unsigned long fid,
> > + const unsigned long *hart_mask,
> > + unsigned long hbase, unsigned long
> > start,
> > + unsigned long size, unsigned long
> > arg4,
> > + unsigned long arg5)
>
> Same as above.
>
> > +{
> > + pr_warn("remote fence extension is not available in SBI
> > v%lu.%lu\n",
> > + sbi_major_version(), sbi_minor_version());
> > + return 0;
> > +}
> > +
> > +#ifdef CONFIG_RISCV_SBI_V01
> > /**
> > * sbi_console_putchar() - Writes given character to the console
> > device.
> > * @ch: The data to be written to the console.
> > @@ -80,41 +114,106 @@ int sbi_console_getchar(void)
> > EXPORT_SYMBOL(sbi_console_getchar);
> >
> > /**
> > - * sbi_set_timer() - Program the timer for next timer event.
> > - * @stime_value: The value after which next timer event should
> > fire.
> > + * sbi_shutdown() - Remove all the harts from executing supervisor
> > code.
> > *
> > * Return: None
> > */
> > -void sbi_set_timer(uint64_t stime_value)
> > +void sbi_shutdown(void)
> > {
> > -#if __riscv_xlen == 32
> > - sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
> > - stime_value >> 32, 0, 0, 0, 0);
> > -#else
> > - sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0,
> > 0, 0);
> > -#endif
> > + sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
> > }
> > EXPORT_SYMBOL(sbi_set_timer);
> >
> > /**
> > - * sbi_shutdown() - Remove all the harts from executing supervisor
> > code.
> > + * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
> > *
> > * Return: None
> > */
> > -void sbi_shutdown(void)
> > +void sbi_clear_ipi(void)
> > {
> > - sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
> > + sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
> > }
> > EXPORT_SYMBOL(sbi_shutdown);
> >
> > /**
> > - * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
> > + * sbi_set_timer_v01() - Program the timer for next timer event.
> > + * @stime_value: The value after which next timer event should
> > fire.
> > *
> > * Return: None
> > */
> > -void sbi_clear_ipi(void)
> > +static void __sbi_set_timer_v01(uint64_t stime_value)
> > {
> > - sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
> > +#if __riscv_xlen == 32
> > + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
> > + stime_value >> 32, 0, 0, 0, 0);
> > +#else
> > + sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0,
> > 0, 0);
> > +#endif
> > +}
> > +
> > +static int __sbi_send_ipi_v01(const unsigned long *hart_mask)
> > +{
> > + sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned
> > long)hart_mask,
> > + 0, 0, 0, 0, 0);
> > + return 0;
> > +}
> > +
> > +static int __sbi_rfence_v01(unsigned long ext, unsigned long fid,
> > + const unsigned long *hart_mask,
> > + unsigned long hbase, unsigned long
> > start,
> > + unsigned long size, unsigned long
> > arg4,
> > + unsigned long arg5)
> > +{
> > + switch (ext) {
> > + case SBI_EXT_0_1_REMOTE_FENCE_I:
> > + sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
> > + (unsigned long)hart_mask, 0, 0, 0, 0, 0);
> > + break;
> > + case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
> > + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> > + (unsigned long)hart_mask, start, size,
> > + 0, 0, 0);
> > + break;
> > + case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
> > + sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> > + (unsigned long)hart_mask, start, size,
> > + arg4, 0, 0);
> > + break;
> > + default:
> > + pr_err("extid [%lu]not supported in SBI v0.1\n",
> > ext);
> > + }
> > +
> > + return 0;
> > +}
> > +#else
> > +static void __sbi_set_timer_v01(uint64_t stime_value)
> > +{
> > + __sbi_set_timer_dummy_warn(0);
> > +}
> > +static int __sbi_send_ipi_v01(const unsigned long *hart_mask)
> > +{
> > + return __sbi_send_ipi_dummy_warn(NULL);
> > +}
> > +static int __sbi_rfence_v01(unsigned long ext, unsigned long fid,
> > + const unsigned long *hart_mask,
> > + unsigned long hbase, unsigned long
> > start,
> > + unsigned long size, unsigned long
> > arg4,
> > + unsigned long arg5)
> > +{
> > + return __sbi_rfence_dummy_warn(0, 0, 0, 0, 0, 0, 0, 0);
> > +
> > +}
> > +#endif /* CONFIG_RISCV_SBI_V01 */
> > +
> > +/**
> > + * sbi_set_timer() - Program the timer for next timer event.
> > + * @stime_value: The value after which next timer event should
> > fire.
> > + *
> > + * Return: None
> > + */
> > +void sbi_set_timer(uint64_t stime_value)
> > +{
> > + __sbi_set_timer(stime_value);
> > }
> >
> > /**
> > @@ -125,11 +224,11 @@ void sbi_clear_ipi(void)
> > */
> > void sbi_send_ipi(const unsigned long *hart_mask)
> > {
> > - sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned
> > long)hart_mask,
> > - 0, 0, 0, 0, 0);
> > + __sbi_send_ipi(hart_mask);
> > }
> > EXPORT_SYMBOL(sbi_send_ipi);
> >
> > +
> > /**
> > * sbi_remote_fence_i() - Execute FENCE.I instruction on given
> > remote harts.
> > * @hart_mask: A cpu mask containing all the target harts.
> > @@ -138,8 +237,8 @@ EXPORT_SYMBOL(sbi_send_ipi);
> > */
> > void sbi_remote_fence_i(const unsigned long *hart_mask)
> > {
> > - sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0, (unsigned
> > long)hart_mask,
> > - 0, 0, 0, 0, 0);
> > + __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
> > + hart_mask, 0, 0, 0, 0, 0);
> > }
> > EXPORT_SYMBOL(sbi_remote_fence_i);
> >
> > @@ -156,8 +255,8 @@ void sbi_remote_sfence_vma(const unsigned long
> > *hart_mask,
> > unsigned long start,
> > unsigned long size)
> > {
> > - sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> > - (unsigned long)hart_mask, start, size, 0,
> > 0, 0);
> > + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> > + hart_mask, 0, start, size, 0, 0);
> > }
> > EXPORT_SYMBOL(sbi_remote_sfence_vma);
> >
> > @@ -177,8 +276,8 @@ void sbi_remote_sfence_vma_asid(const unsigned
> > long *hart_mask,
> > unsigned long size,
> > unsigned long asid)
> > {
> > - sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> > - (unsigned long)hart_mask, start, size,
> > asid, 0, 0);
> > + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> > + hart_mask, 0, start, size, asid, 0);
> > }
> > EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
> >
> > @@ -254,8 +353,15 @@ int __init sbi_init(void)
> >
> > pr_info("SBI specification v%lu.%lu detected\n",
> > sbi_major_version(), sbi_minor_version());
> > - if (!sbi_spec_is_0_1())
> > +
> > + if (sbi_spec_is_0_1()) {
> > + __sbi_set_timer = __sbi_set_timer_v01;
> > + __sbi_send_ipi = __sbi_send_ipi_v01;
> > + __sbi_rfence = __sbi_rfence_v01;
> > + } else {
> > pr_info("SBI implementation ID=0x%lx
> > Version=0x%lx\n",
> > sbi_get_firmware_id(),
> > sbi_get_firmware_version());
> > + }
> > +
> > return 0;
> > }
> > --
> > 2.23.0
> >
>
> Minor comments above otherwise looks good.
>
> Reviewed-by: Anup Patel <anup@brainfault.org>
>
> Regards,
> Anup
--
Regards,
Atish
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions
2019-11-26 4:16 ` Anup Patel
@ 2019-11-26 18:13 ` Atish Patra
0 siblings, 0 replies; 12+ messages in thread
From: Atish Patra @ 2019-11-26 18:13 UTC (permalink / raw)
To: anup
Cc: aou, linux-kernel, rppt, palmer, paul.walmsley, linux-riscv,
tglx, han_mao
On Tue, 2019-11-26 at 09:46 +0530, Anup Patel wrote:
> On Tue, Nov 26, 2019 at 8:50 AM Atish Patra <atish.patra@wdc.com>
> wrote:
> > Few v0.1 SBI calls are being replaced by new SBI calls that follows
> > v0.2 calling convention. The specification changes can be found at
> >
> > riscv/riscv-sbi-doc#27
> >
> > Implement the replacement extensions and few additional new SBI
> > function calls that makes way for a better SBI interface in future.
> >
> > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > ---
> > arch/riscv/include/asm/sbi.h | 35 +++++++
> > arch/riscv/kernel/sbi.c | 197
> > ++++++++++++++++++++++++++++++++++-
> > 2 files changed, 229 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/sbi.h
> > b/arch/riscv/include/asm/sbi.h
> > index cc82ae63f8e0..54ba9eebec11 100644
> > --- a/arch/riscv/include/asm/sbi.h
> > +++ b/arch/riscv/include/asm/sbi.h
> > @@ -22,6 +22,9 @@ enum sbi_ext_id {
> > SBI_EXT_0_1_SHUTDOWN = 0x8,
> > #endif
> > SBI_EXT_BASE = 0x10,
> > + SBI_EXT_TIME = 0x54494D45,
> > + SBI_EXT_IPI = 0x735049,
> > + SBI_EXT_RFENCE = 0x52464E43,
> > };
> >
> > enum sbi_ext_base_fid {
> > @@ -34,6 +37,24 @@ enum sbi_ext_base_fid {
> > SBI_BASE_GET_MIMPID,
> > };
> >
> > +enum sbi_ext_time_fid {
> > + SBI_EXT_TIME_SET_TIMER = 0,
> > +};
> > +
> > +enum sbi_ext_ipi_fid {
> > + SBI_EXT_IPI_SEND_IPI = 0,
> > +};
> > +
> > +enum sbi_ext_rfence_fid {
> > + SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
> > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
> > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
> > +};
> > +
> > #define SBI_SPEC_VERSION_DEFAULT 0x1
> > #define SBI_SPEC_VERSION_MAJOR_OFFSET 24
> > #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
> > @@ -74,6 +95,20 @@ void sbi_remote_sfence_vma_asid(const unsigned
> > long *hart_mask,
> > unsigned long start,
> > unsigned long size,
> > unsigned long asid);
> > +int sbi_remote_hfence_gvma(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size);
> > +int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size,
> > + unsigned long vmid);
> > +int sbi_remote_hfence_vvma(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size);
> > +int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size,
> > + unsigned long asid);
> > int sbi_probe_extension(long ext);
> >
> > /* Check if current SBI specification version is 0.1 or not */
> > diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
> > index 8574de1074c4..74b3155b570f 100644
> > --- a/arch/riscv/kernel/sbi.c
> > +++ b/arch/riscv/kernel/sbi.c
> > @@ -205,6 +205,101 @@ static int __sbi_rfence_v01(unsigned long
> > ext, unsigned long fid,
> > }
> > #endif /* CONFIG_RISCV_SBI_V01 */
> >
> > +static void __sbi_set_timer_v02(uint64_t stime_value)
> > +{
> > +#if __riscv_xlen == 32
> > + sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER,
> > stime_value,
> > + stime_value >> 32, 0, 0, 0, 0);
> > +#else
> > + sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER,
> > stime_value, 0,
> > + 0, 0, 0, 0);
> > +#endif
> > +}
> > +
> > +static int __sbi_send_ipi_v02(const unsigned long *hart_mask)
> > +{
> > + unsigned long hmask_val;
> > + struct sbiret ret = {0};
> > + int result;
> > +
> > + if (!hart_mask)
> > + hmask_val = *(cpumask_bits(cpu_online_mask));
> > + else
> > + hmask_val = *hart_mask;
> > +
> > + ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,
> > hmask_val,
> > + 0, 0, 0, 0, 0);
> > + if (ret.error) {
> > + pr_err("%s: failed with error [%d]\n", __func__,
> > + sbi_err_map_linux_errno(ret.error));
> > + result = ret.error;
> > + } else
> > + result = ret.value;
> > +
> > + return result;
> > +}
> > +
> > +static int __sbi_rfence_v02(unsigned long extid, unsigned long
> > fid,
> > + const unsigned long *hart_mask,
> > + unsigned long hbase, unsigned long
> > start,
> > + unsigned long size, unsigned long
> > arg4,
> > + unsigned long arg5)
> > +{
> > + unsigned long hmask_val;
> > + struct sbiret ret = {0};
> > + int result;
> > + unsigned long ext = SBI_EXT_RFENCE;
> > +
> > + if (!hart_mask)
> > + hmask_val = *(cpumask_bits(cpu_online_mask));
> > + else
> > + hmask_val = *hart_mask;
> > +
> > + switch (fid) {
> > + case SBI_EXT_RFENCE_REMOTE_FENCE_I:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, 0, 0, 0,
> > 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, 0, 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, arg4, 0);
> > + break;
> > + /*TODO: Handle non zero hbase cases */
> > + case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, 0, 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, arg4, 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, 0, 0);
> > + break;
> > + case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
> > + ret = sbi_ecall(ext, fid, hmask_val, 0, start,
> > + size, arg4, 0);
> > + break;
> > + default:
> > + pr_err("unknown function ID [%lu] for SBI extension
> > [%lu]\n",
> > + fid, ext);
> > + result = -EINVAL;
> > + }
> > +
> > + if (ret.error) {
> > + pr_err("%s: failed with error [%d]\n", __func__,
> > + sbi_err_map_linux_errno(ret.error));
> > + result = ret.error;
> > + } else
> > + result = ret.value;
> > +
> > + return result;
> > +}
> > +
> > /**
> > * sbi_set_timer() - Program the timer for next timer event.
> > * @stime_value: The value after which next timer event should
> > fire.
> > @@ -237,7 +332,7 @@ EXPORT_SYMBOL(sbi_send_ipi);
> > */
> > void sbi_remote_fence_i(const unsigned long *hart_mask)
> > {
> > - __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
> > + __sbi_rfence(SBI_EXT_0_1_REMOTE_FENCE_I,
> > SBI_EXT_RFENCE_REMOTE_FENCE_I,
> > hart_mask, 0, 0, 0, 0, 0);
> > }
> > EXPORT_SYMBOL(sbi_remote_fence_i);
> > @@ -255,7 +350,8 @@ void sbi_remote_sfence_vma(const unsigned long
> > *hart_mask,
> > unsigned long start,
> > unsigned long size)
> > {
> > - __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
> > + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA,
> > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
> > hart_mask, 0, start, size, 0, 0);
> > }
> > EXPORT_SYMBOL(sbi_remote_sfence_vma);
> > @@ -276,11 +372,93 @@ void sbi_remote_sfence_vma_asid(const
> > unsigned long *hart_mask,
> > unsigned long size,
> > unsigned long asid)
> > {
> > - __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
> > + __sbi_rfence(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID,
> > + SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
> > hart_mask, 0, start, size, asid, 0);
> > }
> > EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
> >
> > +/**
> > + * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on
> > given remote
> > + * harts for the specified guest physical
> > address range.
> > + * @hart_mask: A cpu mask containing all the target harts.
> > + * @start: Start of the guest physical address
> > + * @size: Total size of the guest physical address range.
> > + *
> > + * Return: None
> > + */
> > +int sbi_remote_hfence_gvma(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size)
> > +{
> > + return __sbi_rfence(SBI_EXT_RFENCE,
> > SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
> > + hart_mask, 0, start, size, 0, 0);
> > +}
> > +EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma);
> > +
> > +/**
> > + * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA
> > instructions on given
> > + * remote harts for a guest physical address range belonging to a
> > specific VMID.
> > + *
> > + * @hart_mask: A cpu mask containing all the target harts.
> > + * @start: Start of the guest physical address
> > + * @size: Total size of the guest physical address range.
> > + * @vmid: The value of guest ID (VMID).
> > + *
> > + * Return: 0 if success, Error otherwise.
> > + */
> > +int sbi_remote_hfence_gvma_vmid(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size,
> > + unsigned long vmid)
> > +{
> > + return __sbi_rfence(SBI_EXT_RFENCE,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
> > + hart_mask, 0, start, size, vmid, 0);
> > +}
> > +EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid);
> > +
> > +/**
> > + * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on
> > given remote
> > + * harts for the current guest virtual
> > address range.
> > + * @hart_mask: A cpu mask containing all the target harts.
> > + * @start: Start of the current guest virtual address
> > + * @size: Total size of the current guest virtual address range.
> > + *
> > + * Return: None
> > + */
> > +int sbi_remote_hfence_vvma(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size)
> > +{
> > + return __sbi_rfence(SBI_EXT_RFENCE,
> > SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
> > + hart_mask, 0, start, size, 0, 0);
> > +}
> > +EXPORT_SYMBOL(sbi_remote_hfence_vvma);
> > +
> > +/**
> > + * sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA
> > instructions on given
> > + * remote harts for current guest virtual address range belonging
> > to a specific
> > + * ASID.
> > + *
> > + * @hart_mask: A cpu mask containing all the target harts.
> > + * @start: Start of the current guest virtual address
> > + * @size: Total size of the current guest virtual address range.
> > + * @asid: The value of address space identifier (ASID).
> > + *
> > + * Return: None
> > + */
> > +int sbi_remote_hfence_vvma_asid(const unsigned long *hart_mask,
> > + unsigned long start,
> > + unsigned long size,
> > + unsigned long asid)
> > +{
> > + return __sbi_rfence(SBI_EXT_RFENCE,
> > + SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
> > + hart_mask, 0, start, size, asid, 0);
> > +}
> > +EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
> > +
> > /**
> > * sbi_probe_extension() - Check if an SBI extension ID is
> > supported or not.
> > * @extid: The extension ID to be probed.
> > @@ -361,6 +539,19 @@ int __init sbi_init(void)
> > } else {
> > pr_info("SBI implementation ID=0x%lx
> > Version=0x%lx\n",
> > sbi_get_firmware_id(),
> > sbi_get_firmware_version());
> > + if (sbi_probe_extension(SBI_EXT_TIME) > 0)
> > + __sbi_set_timer = __sbi_set_timer_v02;
> > + else
> > + __sbi_set_timer =
> > __sbi_set_timer_dummy_warn;
> > + if (sbi_probe_extension(SBI_EXT_IPI) > 0)
> > + __sbi_send_ipi = __sbi_send_ipi_v02;
> > + else
> > + __sbi_send_ipi = __sbi_send_ipi_dummy_warn;
> > + if (sbi_probe_extension(SBI_EXT_RFENCE) > 0)
> > + __sbi_rfence = __sbi_rfence_v02;
> > + else
> > + __sbi_rfence = __sbi_rfence_dummy_warn;
> > +
> > }
> >
> > return 0;
> > --
> > 2.23.0
> >
>
> You might want to print whether TIMER, IPI and RFENCE extension
> were detected at boot-time.
>
Sure. Will do.
> Otherwise, looks good.
>
> Reviewed-by: Anup Patel <anup@brainfault.org>
>
Thanks for the review.
> Regards,
> Anup
--
Regards,
Atish
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^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2019-11-26 18:13 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-26 3:20 [PATCH v4 0/4] Add support for SBI v0.2 Atish Patra
2019-11-26 3:20 ` [PATCH v4 1/4] RISC-V: Mark existing SBI as 0.1 SBI Atish Patra
2019-11-26 4:10 ` Anup Patel
2019-11-26 3:20 ` [PATCH v4 2/4] RISC-V: Add basic support for SBI v0.2 Atish Patra
2019-11-26 4:11 ` Anup Patel
2019-11-26 3:20 ` [PATCH v4 3/4] RISC-V: Introduce a new config for SBI v0.1 Atish Patra
2019-11-26 4:14 ` Anup Patel
2019-11-26 18:12 ` Atish Patra
2019-11-26 3:20 ` [PATCH v4 4/4] RISC-V: Implement new SBI v0.2 extensions Atish Patra
2019-11-26 4:16 ` Anup Patel
2019-11-26 18:13 ` Atish Patra
2019-11-26 6:52 ` kbuild test robot
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