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From: Palmer Dabbelt <palmer@dabbelt.com>
To: mail@conchuod.ie
Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	Paul Walmsley <paul.walmsley@sifive.com>,
	aou@eecs.berkeley.edu, daire.mcnamara@microchip.com,
	conor.dooley@microchip.com, niklas.cassel@wdc.com,
	damien.lemoal@opensource.wdc.com, geert@linux-m68k.org,
	zong.li@sifive.com, kernel@esmil.dk, hahnjo@hahnjo.de,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, Brice.Goglin@inria.fr
Subject: Re: [PATCH 4/5] riscv: dts: microchip: Add mpfs' topology information
Date: Thu, 14 Jul 2022 15:04:03 -0700 (PDT)	[thread overview]
Message-ID: <mhng-efe2b7ce-e803-4a61-91b7-ca9c302a33bc@palmer-ri-x1c9> (raw)
In-Reply-To: <20220705190435.1790466-5-mail@conchuod.ie>

On Tue, 05 Jul 2022 12:04:35 PDT (-0700), mail@conchuod.ie wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> The mpfs has no cpu-map node, so tools like hwloc cannot correctly
> parse the topology. Add the node using the existing node labels.
>
> Reported-by: Brice Goglin <Brice.Goglin@inria.fr>
> Link: https://github.com/open-mpi/hwloc/issues/536
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  arch/riscv/boot/dts/microchip/mpfs.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
> index 45efd35d50c5..0a17d30bb3f2 100644
> --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
> @@ -138,6 +138,30 @@ cpu4_intc: interrupt-controller {
>  				interrupt-controller;
>  			};
>  		};
> +
> +		cpu-map {
> +			cluster0 {
> +				core0 {
> +					cpu = <&cpu0>;
> +				};
> +
> +				core1 {
> +					cpu = <&cpu1>;
> +				};
> +
> +				core2 {
> +					cpu = <&cpu2>;
> +				};
> +
> +				core3 {
> +					cpu = <&cpu3>;
> +				};
> +
> +				core4 {
> +					cpu = <&cpu4>;
> +				};
> +			};
> +		};
>  	};
>
>  	refclk: mssrefclk {

In case anyone is following along: this patch got split out from the 
rest of the series and ended up in the Microchip DT PR for 5.20.  
I've taken the other four into for-next.

Thanks!

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  reply	other threads:[~2022-07-14 22:04 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-05 19:04 [PATCH 0/5] RISC-V: Add cpu-map topology information nodes Conor Dooley
2022-07-05 19:04 ` [PATCH 1/5] riscv: dts: starfive: Add JH7100 CPU topology Conor Dooley
2022-07-05 19:04 ` [PATCH 2/5] riscv: dts: sifive: Add fu540 topology information Conor Dooley
2022-07-05 19:04 ` [PATCH 3/5] riscv: dts: sifive: Add fu740 " Conor Dooley
2022-07-05 19:04 ` [PATCH 4/5] riscv: dts: microchip: Add mpfs' " Conor Dooley
2022-07-14 22:04   ` Palmer Dabbelt [this message]
2022-07-05 19:04 ` [PATCH 5/5] riscv: dts: canaan: Add k210 " Conor Dooley
2022-07-06  3:49   ` Damien Le Moal
2022-07-05 20:19 ` [PATCH 0/5] RISC-V: Add cpu-map topology information nodes Sudeep Holla
2022-07-05 20:33   ` Conor.Dooley
2022-07-05 23:03     ` Conor.Dooley
2022-07-06  9:21       ` Sudeep Holla
2022-07-06  9:43         ` Conor.Dooley
2022-07-06 10:03           ` Sudeep Holla
2022-07-06 10:11             ` Conor.Dooley
2022-07-06 13:04         ` Conor.Dooley
2022-07-06 14:00           ` Sudeep Holla
2022-07-06  9:18     ` Sudeep Holla
2022-07-07 22:29 ` (subset) " Conor Dooley

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