[PATCH] watchdog: renesas_wdt: Fix interrupt enable for timer

[PATCH] watchdog: renesas_wdt: Fix interrupt enable for timer

[Nguyen An Hoan]

From: Hoan Nguyen An <na-hoan@jinso.co.jp>

Fix setting for bit WOVFE of RWTCSRA. Keep it enable follow hardware document.

Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
---
 drivers/watchdog/renesas_wdt.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c
index 565dbc1..a6aca0e 100644
--- a/drivers/watchdog/renesas_wdt.c
+++ b/drivers/watchdog/renesas_wdt.c
@@ -19,6 +19,7 @@
 
 #define RWTCNT		0
 #define RWTCSRA		4
+#define RWTCSRA_WOVFE	BIT(3)
 #define RWTCSRA_WOVF	BIT(4)
 #define RWTCSRA_WRFLG	BIT(5)
 #define RWTCSRA_TME	BIT(7)
@@ -82,13 +83,14 @@ static int rwdt_start(struct watchdog_device *wdev)
 	rwdt_write(priv, val, RWTCSRA);
 
 	rwdt_init_timeout(wdev);
-	rwdt_write(priv, priv->cks, RWTCSRA);
+	val |= priv->cks;
+	rwdt_write(priv, val, RWTCSRA);
 	rwdt_write(priv, 0, RWTCSRB);
 
 	while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
 		cpu_relax();
-
-	rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
+	/* Enable interrupt and timer */
+	rwdt_write(priv, val | RWTCSRA_WOVFE | RWTCSRA_TME, RWTCSRA);
 
 	return 0;
 }
-- 
2.7.4

[PATCH] watchdog: renesas_wdt: Use 'dev' instead of dereferencing it repeatedly

[Nguyen An Hoan]

From: Hoan Nguyen An <na-hoan@jinso.co.jp>

Add helper variable dev = &pdev->dev

Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
---
 drivers/watchdog/renesas_wdt.c | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c
index 565dbc1..d8ac229 100644
--- a/drivers/watchdog/renesas_wdt.c
+++ b/drivers/watchdog/renesas_wdt.c
@@ -175,15 +175,16 @@ static inline bool rwdt_blacklisted(struct device *dev) { return false; }
 
 static int rwdt_probe(struct platform_device *pdev)
 {
+	struct device *dev = &pdev->dev;
 	struct rwdt_priv *priv;
 	struct clk *clk;
 	unsigned long clks_per_sec;
 	int ret, i;
 
-	if (rwdt_blacklisted(&pdev->dev))
+	if (rwdt_blacklisted(dev))
 		return -ENODEV;
 
-	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 	if (!priv)
 		return -ENOMEM;
 
@@ -191,16 +192,16 @@ static int rwdt_probe(struct platform_device *pdev)
 	if (IS_ERR(priv->base))
 		return PTR_ERR(priv->base);
 
-	clk = devm_clk_get(&pdev->dev, NULL);
+	clk = devm_clk_get(dev, NULL);
 	if (IS_ERR(clk))
 		return PTR_ERR(clk);
 
-	pm_runtime_enable(&pdev->dev);
-	pm_runtime_get_sync(&pdev->dev);
+	pm_runtime_enable(dev);
+	pm_runtime_get_sync(dev);
 	priv->clk_rate = clk_get_rate(clk);
 	priv->wdev.bootstatus = (readb_relaxed(priv->base + RWTCSRA) &
 				RWTCSRA_WOVF) ? WDIOF_CARDRESET : 0;
-	pm_runtime_put(&pdev->dev);
+	pm_runtime_put(dev);
 
 	if (!priv->clk_rate) {
 		ret = -ENOENT;
@@ -216,14 +217,14 @@ static int rwdt_probe(struct platform_device *pdev)
 	}
 
 	if (i < 0) {
-		dev_err(&pdev->dev, "Can't find suitable clock divider\n");
+		dev_err(dev, "Can't find suitable clock divider\n");
 		ret = -ERANGE;
 		goto out_pm_disable;
 	}
 
 	priv->wdev.info = &rwdt_ident;
 	priv->wdev.ops = &rwdt_ops;
-	priv->wdev.parent = &pdev->dev;
+	priv->wdev.parent = dev;
 	priv->wdev.min_timeout = 1;
 	priv->wdev.max_timeout = DIV_BY_CLKS_PER_SEC(priv, 65536);
 	priv->wdev.timeout = min(priv->wdev.max_timeout, RWDT_DEFAULT_TIMEOUT);
@@ -235,7 +236,7 @@ static int rwdt_probe(struct platform_device *pdev)
 	watchdog_stop_on_unregister(&priv->wdev);
 
 	/* This overrides the default timeout only if DT configuration was found */
-	watchdog_init_timeout(&priv->wdev, 0, &pdev->dev);
+	watchdog_init_timeout(&priv->wdev, 0, dev);
 
 	ret = watchdog_register_device(&priv->wdev);
 	if (ret < 0)
@@ -244,7 +245,7 @@ static int rwdt_probe(struct platform_device *pdev)
 	return 0;
 
  out_pm_disable:
-	pm_runtime_disable(&pdev->dev);
+	pm_runtime_disable(dev);
 	return ret;
 }
 
-- 
2.7.4

Re: [PATCH] watchdog: renesas_wdt: Use 'dev' instead of dereferencing it repeatedly

[Wolfram Sang]

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Hi,

On Thu, May 23, 2019 at 06:29:38PM +0900, Nguyen An Hoan wrote:
> From: Hoan Nguyen An <na-hoan@jinso.co.jp>
> 
> Add helper variable dev = &pdev->dev
> 
> Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>

Hmm, I leave the decision to Guenter. Dunno if there is a subsystem
preference. I personally don't think it adds value but I am not against
it.

Regards,

   Wolfram


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Re: [PATCH] watchdog: renesas_wdt: Use 'dev' instead of dereferencing it repeatedly

[Guenter Roeck]

On 5/23/19 4:06 AM, Wolfram Sang wrote:
> Hi,
> 
> On Thu, May 23, 2019 at 06:29:38PM +0900, Nguyen An Hoan wrote:
>> From: Hoan Nguyen An <na-hoan@jinso.co.jp>
>>
>> Add helper variable dev = &pdev->dev
>>
>> Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
> 
> Hmm, I leave the decision to Guenter. Dunno if there is a subsystem
> preference. I personally don't think it adds value but I am not against
> it.
> 

I like it because it makes the code easier to read.

Guenter

Re: [PATCH] watchdog: renesas_wdt: Use 'dev' instead of dereferencing it repeatedly

[Geert Uytterhoeven]

On Thu, May 23, 2019 at 11:30 AM Nguyen An Hoan <na-hoan@jinso.co.jp> wrote:
> From: Hoan Nguyen An <na-hoan@jinso.co.jp>
>
> Add helper variable dev = &pdev->dev
>
> Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH] watchdog: renesas_wdt: Use 'dev' instead of dereferencing it repeatedly

[Guenter Roeck]

On Thu, May 23, 2019 at 06:29:38PM +0900, Nguyen An Hoan wrote:
> From: Hoan Nguyen An <na-hoan@jinso.co.jp>
> 
> Add helper variable dev = &pdev->dev
> 
> Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

> ---
>  drivers/watchdog/renesas_wdt.c | 21 +++++++++++----------
>  1 file changed, 11 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c
> index 565dbc1..d8ac229 100644
> --- a/drivers/watchdog/renesas_wdt.c
> +++ b/drivers/watchdog/renesas_wdt.c
> @@ -175,15 +175,16 @@ static inline bool rwdt_blacklisted(struct device *dev) { return false; }
>  
>  static int rwdt_probe(struct platform_device *pdev)
>  {
> +	struct device *dev = &pdev->dev;
>  	struct rwdt_priv *priv;
>  	struct clk *clk;
>  	unsigned long clks_per_sec;
>  	int ret, i;
>  
> -	if (rwdt_blacklisted(&pdev->dev))
> +	if (rwdt_blacklisted(dev))
>  		return -ENODEV;
>  
> -	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>  	if (!priv)
>  		return -ENOMEM;
>  
> @@ -191,16 +192,16 @@ static int rwdt_probe(struct platform_device *pdev)
>  	if (IS_ERR(priv->base))
>  		return PTR_ERR(priv->base);
>  
> -	clk = devm_clk_get(&pdev->dev, NULL);
> +	clk = devm_clk_get(dev, NULL);
>  	if (IS_ERR(clk))
>  		return PTR_ERR(clk);
>  
> -	pm_runtime_enable(&pdev->dev);
> -	pm_runtime_get_sync(&pdev->dev);
> +	pm_runtime_enable(dev);
> +	pm_runtime_get_sync(dev);
>  	priv->clk_rate = clk_get_rate(clk);
>  	priv->wdev.bootstatus = (readb_relaxed(priv->base + RWTCSRA) &
>  				RWTCSRA_WOVF) ? WDIOF_CARDRESET : 0;
> -	pm_runtime_put(&pdev->dev);
> +	pm_runtime_put(dev);
>  
>  	if (!priv->clk_rate) {
>  		ret = -ENOENT;
> @@ -216,14 +217,14 @@ static int rwdt_probe(struct platform_device *pdev)
>  	}
>  
>  	if (i < 0) {
> -		dev_err(&pdev->dev, "Can't find suitable clock divider\n");
> +		dev_err(dev, "Can't find suitable clock divider\n");
>  		ret = -ERANGE;
>  		goto out_pm_disable;
>  	}
>  
>  	priv->wdev.info = &rwdt_ident;
>  	priv->wdev.ops = &rwdt_ops;
> -	priv->wdev.parent = &pdev->dev;
> +	priv->wdev.parent = dev;
>  	priv->wdev.min_timeout = 1;
>  	priv->wdev.max_timeout = DIV_BY_CLKS_PER_SEC(priv, 65536);
>  	priv->wdev.timeout = min(priv->wdev.max_timeout, RWDT_DEFAULT_TIMEOUT);
> @@ -235,7 +236,7 @@ static int rwdt_probe(struct platform_device *pdev)
>  	watchdog_stop_on_unregister(&priv->wdev);
>  
>  	/* This overrides the default timeout only if DT configuration was found */
> -	watchdog_init_timeout(&priv->wdev, 0, &pdev->dev);
> +	watchdog_init_timeout(&priv->wdev, 0, dev);
>  
>  	ret = watchdog_register_device(&priv->wdev);
>  	if (ret < 0)
> @@ -244,7 +245,7 @@ static int rwdt_probe(struct platform_device *pdev)
>  	return 0;
>  
>   out_pm_disable:
> -	pm_runtime_disable(&pdev->dev);
> +	pm_runtime_disable(dev);
>  	return ret;
>  }
>  

Re: [PATCH] watchdog: renesas_wdt: Use 'dev' instead of dereferencing it repeatedly

[Simon Horman]

On Fri, Jun 07, 2019 at 10:31:52AM -0700, Guenter Roeck wrote:
> On Thu, May 23, 2019 at 06:29:38PM +0900, Nguyen An Hoan wrote:
> > From: Hoan Nguyen An <na-hoan@jinso.co.jp>
> > 
> > Add helper variable dev = &pdev->dev
> > 
> > Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> Reviewed-by: Guenter Roeck <linux@roeck-us.net>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Re: [PATCH] watchdog: renesas_wdt: Fix interrupt enable for timer

[Wolfram Sang]

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Hi,

On Thu, May 23, 2019 at 06:29:37PM +0900, Nguyen An Hoan wrote:
> From: Hoan Nguyen An <na-hoan@jinso.co.jp>
> 
> Fix setting for bit WOVFE of RWTCSRA. Keep it enable follow hardware document.

Hmm, I can't find it in the docs. Which version of the documentation do
you use?


> -	rwdt_write(priv, priv->cks, RWTCSRA);
> +	val |= priv->cks;
> +	rwdt_write(priv, val, RWTCSRA);

Have you tested this successfully? According to the docs, CKS bits are
all 1 by default. So, your |= operation should be a NOP and we can't
select a CKS value anymore if I am not mistaken.

>  	rwdt_write(priv, 0, RWTCSRB);
>  
>  	while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
>  		cpu_relax();
> -
> -	rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
> +	/* Enable interrupt and timer */
> +	rwdt_write(priv, val | RWTCSRA_WOVFE | RWTCSRA_TME, RWTCSRA);

What is the use of enabling an interrupt without having an interrupt
handler? (And I never understood why there is an interrupt for an
overflowing watchdog. We won't have time to serve it, or am I
overlooking something obvious?)

Kind regards,

   Wolfram


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Re: [PATCH] watchdog: renesas_wdt: Fix interrupt enable for timer

[Geert Uytterhoeven]

Hi Wolfram,

On Thu, May 23, 2019 at 1:04 PM Wolfram Sang <wsa@the-dreams.de> wrote:
> On Thu, May 23, 2019 at 06:29:37PM +0900, Nguyen An Hoan wrote:
> > From: Hoan Nguyen An <na-hoan@jinso.co.jp>
> >
> > Fix setting for bit WOVFE of RWTCSRA. Keep it enable follow hardware document.

> >       rwdt_write(priv, 0, RWTCSRB);
> >
> >       while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
> >               cpu_relax();
> > -
> > -     rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
> > +     /* Enable interrupt and timer */
> > +     rwdt_write(priv, val | RWTCSRA_WOVFE | RWTCSRA_TME, RWTCSRA);
>
> What is the use of enabling an interrupt without having an interrupt
> handler?

Exactly.

> (And I never understood why there is an interrupt for an
> overflowing watchdog. We won't have time to serve it, or am I
> overlooking something obvious?)

I guess it (the hardware, not the Linux watchdog driver) might be used
as a generic timer? Or the interrupt may signal the RT core that the
application cores have been restarted?

But in the context of (the current) Linux watchdog driver, this doesn't
make much sense.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH] watchdog: renesas_wdt: Fix interrupt enable for timer

["グェン・アン・ホァン"]

Dear Wolfram-san
Dear Geert- san

Thank you very much
Wolfram Sang wrote:
> Hi,
> 
> On Thu, May 23, 2019 at 06:29:37PM +0900, Nguyen An Hoan wrote:
> > From: Hoan Nguyen An <na-hoan@jinso.co.jp>
> > 
> > Fix setting for bit WOVFE of RWTCSRA. Keep it enable follow hardware document.
> 
> Hmm, I can't find it in the docs. Which version of the documentation do
> you use?
> 
> 
> > -	rwdt_write(priv, priv->cks, RWTCSRA);
> > +	val |= priv->cks;
> > +	rwdt_write(priv, val, RWTCSRA);
> 
> Have you tested this successfully? According to the docs, CKS bits are
> all 1 by default. So, your |= operation should be a NOP and we can't
> select a CKS value anymore if I am not mistaken.
> 
I tested and can confirm WOVFE was be disable by command 
rwdt_write(priv, priv->cks, RWTCSRA);
I don't understand why this bit is turned off but the watchdog can still reset, but 
according to the document it will be 1.

> >  	rwdt_write(priv, 0, RWTCSRB);
> >  
> >  	while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
> >  		cpu_relax();
> > -
> > -	rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
> > +	/* Enable interrupt and timer */
> > +	rwdt_write(priv, val | RWTCSRA_WOVFE | RWTCSRA_TME, RWTCSRA);
> 
> What is the use of enabling an interrupt without having an interrupt
> handler? (And I never understood why there is an interrupt for an
> overflowing watchdog. We won't have time to serve it, or am I
> overlooking something obvious?)

I have added the interrupt node to dtsi and created the interrupt handler to successfully handle the Secure watchdog Gen2, but this is not documented.  With Gen 3, I am also thinking whether it is necessary or not.  Thank you!!!
With Gen3, after reset by WDT, then restart will have an interrupt when probe timer(), but we can do this no reset, after this,  timer operate normally. 
Problaly this patch should RFC

Thank you for your helps!!!


> 
> Kind regards,
> 
>    Wolfram
> 

RE: [PATCH] watchdog: renesas_wdt: Fix interrupt enable for timer

[Yoshihiro Shimoda]

Dear Hoan-san,

> From: "グェン・アン・ホァン", Sent: Friday, May 24, 2019 10:14 AM
> 
> Dear Wolfram-san
> Dear Geert- san
> 
> Thank you very much
> Wolfram Sang wrote:
> > Hi,
> >
> > On Thu, May 23, 2019 at 06:29:37PM +0900, Nguyen An Hoan wrote:
> > > From: Hoan Nguyen An <na-hoan@jinso.co.jp>
> > >
> > > Fix setting for bit WOVFE of RWTCSRA. Keep it enable follow hardware document.
> >
> > Hmm, I can't find it in the docs. Which version of the documentation do
> > you use?

Do you have any comment about this question?

> > > -	rwdt_write(priv, priv->cks, RWTCSRA);
> > > +	val |= priv->cks;
> > > +	rwdt_write(priv, val, RWTCSRA);
> >
> > Have you tested this successfully? According to the docs, CKS bits are
> > all 1 by default. So, your |= operation should be a NOP and we can't
> > select a CKS value anymore if I am not mistaken.
> >
> I tested and can confirm WOVFE was be disable by command
> rwdt_write(priv, priv->cks, RWTCSRA);
> I don't understand why this bit is turned off but the watchdog can still reset, but
> according to the document it will be 1.

Your answer doesn't have CKS bits things. As Wolfram-san mentioned, the default CKS bits
value is b'111 and then the code "val |= priv->cks" can be not set to the priv->cks value.
In other words, if the priv->cks is set to 0, the driver should set the CKS bits to 0,
but your code will be set to b'111.

> > >  	rwdt_write(priv, 0, RWTCSRB);
> > >
> > >  	while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
> > >  		cpu_relax();
> > > -
> > > -	rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
> > > +	/* Enable interrupt and timer */
> > > +	rwdt_write(priv, val | RWTCSRA_WOVFE | RWTCSRA_TME, RWTCSRA);
> >
> > What is the use of enabling an interrupt without having an interrupt
> > handler? (And I never understood why there is an interrupt for an
> > overflowing watchdog. We won't have time to serve it, or am I
> > overlooking something obvious?)
> 
> I have added the interrupt node to dtsi and created the interrupt handler to successfully handle the Secure watchdog Gen2,
> but this is not documented.  With Gen 3, I am also thinking whether it is necessary or not.  Thank you!!!
> With Gen3, after reset by WDT, then restart will have an interrupt when probe timer(), but we can do this no reset, after
> this,  timer operate normally.
> Problaly this patch should RFC

I'm afraid I could not understand these comments well, but if you have the interrupt handler for this renesas_wdt driver,
you should contain it on this patch :)  To be honest, I have no idea how to use the interrupt though.

Best regards,
Yoshihiro Shimoda

> Thank you for your helps!!!
> 
> 
> >
> > Kind regards,
> >
> >    Wolfram
> >