[PATCH 01/24] ARM: shmobile: use __iomem pointers for MMIO

[PATCH 01/24] ARM: shmobile: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

This patch is a bit ugly for shmobile, which is the only platform
that just uses integer literals all over the place, but I can't
see a better way to do this.

Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: linux-sh@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-shmobile/board-ap4evb.c          |   12 ++--
 arch/arm/mach-shmobile/board-armadillo800eva.c |    6 +-
 arch/arm/mach-shmobile/board-bonito.c          |    8 +--
 arch/arm/mach-shmobile/board-g3evm.c           |   12 ++--
 arch/arm/mach-shmobile/board-g4evm.c           |   30 +++++-----
 arch/arm/mach-shmobile/board-kzm9g.c           |    8 +--
 arch/arm/mach-shmobile/board-mackerel.c        |   22 ++++----
 arch/arm/mach-shmobile/clock-r8a7740.c         |   46 ++++++++--------
 arch/arm/mach-shmobile/clock-sh7367.c          |   44 +++++++--------
 arch/arm/mach-shmobile/clock-sh7372.c          |   60 ++++++++++----------
 arch/arm/mach-shmobile/clock-sh7377.c          |   50 ++++++++---------
 arch/arm/mach-shmobile/clock-sh73a0.c          |   70 ++++++++++++------------
 arch/arm/mach-shmobile/include/mach/gpio.h     |    6 +-
 arch/arm/mach-shmobile/intc-r8a7779.c          |   14 ++---
 arch/arm/mach-shmobile/intc-sh7372.c           |   27 +++++----
 arch/arm/mach-shmobile/intc-sh73a0.c           |   20 ++++---
 arch/arm/mach-shmobile/pm-rmobile.c            |    6 +-
 arch/arm/mach-shmobile/pm-sh7372.c             |   57 +++++++++----------
 arch/arm/mach-shmobile/setup-sh7367.c          |    2 +-
 arch/arm/mach-shmobile/setup-sh7377.c          |    2 +-
 arch/arm/mach-shmobile/setup-sh73a0.c          |    2 +-
 include/linux/serial_sci.h                     |    2 +-
 22 files changed, 256 insertions(+), 250 deletions(-)

diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index f172ca8..1089ee5 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -432,7 +432,7 @@ static void usb1_host_port_power(int port, int power)
 		return;
 
 	/* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
-	__raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
+	__raw_writew(__raw_readw(IOMEM(0xE68B0008)) | 0x600, IOMEM(0xE68B0008));
 }
 
 static struct r8a66597_platdata usb1_host_data = {
@@ -1224,9 +1224,9 @@ static struct i2c_board_info i2c1_devices[] = {
 };
 
 
-#define GPIO_PORT9CR	0xE6051009
-#define GPIO_PORT10CR	0xE605100A
-#define USCCR1		0xE6058144
+#define GPIO_PORT9CR	IOMEM(0xE6051009)
+#define GPIO_PORT10CR	IOMEM(0xE605100A)
+#define USCCR1		IOMEM(0xE6058144)
 static void __init ap4evb_init(void)
 {
 	u32 srcr4;
@@ -1304,7 +1304,7 @@ static void __init ap4evb_init(void)
 	gpio_request(GPIO_FN_OVCN2_1,    NULL);
 
 	/* setup USB phy */
-	__raw_writew(0x8a0a, 0xE6058130);	/* USBCR4 */
+	__raw_writew(0x8a0a, IOMEM(0xE6058130));	/* USBCR4 */
 
 	/* enable FSI2 port A (ak4643) */
 	gpio_request(GPIO_FN_FSIAIBT,	NULL);
@@ -1453,7 +1453,7 @@ static void __init ap4evb_init(void)
 	gpio_request(GPIO_FN_HDMI_CEC, NULL);
 
 	/* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
-#define SRCR4 0xe61580bc
+#define SRCR4 IOMEM(0xe61580bc)
 	srcr4 = __raw_readl(SRCR4);
 	__raw_writel(srcr4 | (1 << 13), SRCR4);
 	udelay(50);
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index cf10f92..2f32aa6 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -135,7 +135,7 @@
  *	usbhsf_power_ctrl()
  */
 #define IRQ7		evt2irq(0x02e0)
-#define USBCR1		0xe605810a
+#define USBCR1		IOMEM(0xe605810a)
 #define USBH		0xC6700000
 #define USBH_USBCTR	0x10834
 
@@ -949,8 +949,8 @@ clock_error:
 /*
  * board init
  */
-#define GPIO_PORT7CR	0xe6050007
-#define GPIO_PORT8CR	0xe6050008
+#define GPIO_PORT7CR	IOMEM(0xe6050007)
+#define GPIO_PORT8CR	IOMEM(0xe6050008)
 static void __init eva_init(void)
 {
 	struct platform_device *usb = NULL;
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
index 4129008..cb8c994 100644
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ b/arch/arm/mach-shmobile/board-bonito.c
@@ -108,12 +108,12 @@ static struct regulator_consumer_supply dummy_supplies[] = {
 #define FPGA_ETH_IRQ		(FPGA_IRQ0 + 15)
 static u16 bonito_fpga_read(u32 offset)
 {
-	return __raw_readw(0xf0003000 + offset);
+	return __raw_readw(IOMEM(0xf0003000) + offset);
 }
 
 static void bonito_fpga_write(u32 offset, u16 val)
 {
-	__raw_writew(val, 0xf0003000 + offset);
+	__raw_writew(val, IOMEM(0xf0003000) + offset);
 }
 
 static void bonito_fpga_irq_disable(struct irq_data *data)
@@ -361,8 +361,8 @@ static void __init bonito_map_io(void)
 #define BIT_ON(sw, bit)		(sw & (1 << bit))
 #define BIT_OFF(sw, bit)	(!(sw & (1 << bit)))
 
-#define VCCQ1CR		0xE6058140
-#define VCCQ1LCDCR	0xE6058186
+#define VCCQ1CR		IOMEM(0xE6058140)
+#define VCCQ1LCDCR	IOMEM(0xE6058186)
 
 static void __init bonito_init(void)
 {
diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c
index 796fa00..b179d4c 100644
--- a/arch/arm/mach-shmobile/board-g3evm.c
+++ b/arch/arm/mach-shmobile/board-g3evm.c
@@ -106,7 +106,7 @@ static void usb_host_port_power(int port, int power)
 		return;
 
 	/* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
-	__raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
+	__raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008));
 }
 
 static struct r8a66597_platdata usb_host_data = {
@@ -279,10 +279,10 @@ static void __init g3evm_init(void)
 	gpio_request(GPIO_FN_IDIN, NULL);
 
 	/* setup USB phy */
-	__raw_writew(0x0300, 0xe605810a);	/* USBCR1 */
-	__raw_writew(0x00e0, 0xe60581c0);	/* CPFCH */
-	__raw_writew(0x6010, 0xe60581c6);	/* CGPOSR */
-	__raw_writew(0x8a0a, 0xe605810c);	/* USBCR2 */
+	__raw_writew(0x0300, IOMEM(0xe605810a));	/* USBCR1 */
+	__raw_writew(0x00e0, IOMEM(0xe60581c0));	/* CPFCH */
+	__raw_writew(0x6010, IOMEM(0xe60581c6));	/* CGPOSR */
+	__raw_writew(0x8a0a, IOMEM(0xe605810c));	/* USBCR2 */
 
 	/* KEYSC @ CN7 */
 	gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL);
@@ -320,7 +320,7 @@ static void __init g3evm_init(void)
 	gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL);
 	gpio_request(GPIO_FN_FRB, NULL);
 	/* FOE, FCDE, FSC on dedicated pins */
-	__raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048);
+	__raw_writel(__raw_readl(IOMEM(0xe6158048)) & ~(1 << 15), IOMEM(0xe6158048));
 
 	/* IrDA */
 	gpio_request(GPIO_FN_IRDA_OUT, NULL);
diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c
index fa5dfc5..22d6893 100644
--- a/arch/arm/mach-shmobile/board-g4evm.c
+++ b/arch/arm/mach-shmobile/board-g4evm.c
@@ -126,7 +126,7 @@ static void usb_host_port_power(int port, int power)
 		return;
 
 	/* set VBOUT/PWEN and EXTLP0 in DVSTCTR */
-	__raw_writew(__raw_readw(0xe6890008) | 0x600, 0xe6890008);
+	__raw_writew(__raw_readw(IOMEM(0xe6890008)) | 0x600, IOMEM(0xe6890008));
 }
 
 static struct r8a66597_platdata usb_host_data = {
@@ -270,17 +270,17 @@ static struct platform_device *g4evm_devices[] __initdata = {
 	&sdhi1_device,
 };
 
-#define GPIO_SDHID0_D0	0xe60520fc
-#define GPIO_SDHID0_D1	0xe60520fd
-#define GPIO_SDHID0_D2	0xe60520fe
-#define GPIO_SDHID0_D3	0xe60520ff
-#define GPIO_SDHICMD0	0xe6052100
+#define GPIO_SDHID0_D0	IOMEM(0xe60520fc)
+#define GPIO_SDHID0_D1	IOMEM(0xe60520fd)
+#define GPIO_SDHID0_D2	IOMEM(0xe60520fe)
+#define GPIO_SDHID0_D3	IOMEM(0xe60520ff)
+#define GPIO_SDHICMD0	IOMEM(0xe6052100)
 
-#define GPIO_SDHID1_D0	0xe6052103
-#define GPIO_SDHID1_D1	0xe6052104
-#define GPIO_SDHID1_D2	0xe6052105
-#define GPIO_SDHID1_D3	0xe6052106
-#define GPIO_SDHICMD1	0xe6052107
+#define GPIO_SDHID1_D0	IOMEM(0xe6052103)
+#define GPIO_SDHID1_D1	IOMEM(0xe6052104)
+#define GPIO_SDHID1_D2	IOMEM(0xe6052105)
+#define GPIO_SDHID1_D3	IOMEM(0xe6052106)
+#define GPIO_SDHICMD1	IOMEM(0xe6052107)
 
 static void __init g4evm_init(void)
 {
@@ -318,10 +318,10 @@ static void __init g4evm_init(void)
 	gpio_request(GPIO_FN_IDIN, NULL);
 
 	/* setup USB phy */
-	__raw_writew(0x0200, 0xe605810a);       /* USBCR1 */
-	__raw_writew(0x00e0, 0xe60581c0);       /* CPFCH */
-	__raw_writew(0x6010, 0xe60581c6);       /* CGPOSR */
-	__raw_writew(0x8a0a, 0xe605810c);       /* USBCR2 */
+	__raw_writew(0x0200, IOMEM(0xe605810a));       /* USBCR1 */
+	__raw_writew(0x00e0, IOMEM(0xe60581c0));       /* CPFCH */
+	__raw_writew(0x6010, IOMEM(0xe60581c6));       /* CGPOSR */
+	__raw_writew(0x8a0a, IOMEM(0xe605810c));       /* USBCR2 */
 
 	/* KEYSC @ CN31 */
 	gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL);
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 53b7ea9..5ffafc1 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -133,8 +133,8 @@ static struct platform_device usb_host_device = {
 
 /* USB Func CN17 */
 struct usbhs_private {
-	unsigned int phy;
-	unsigned int cr2;
+	void __iomem *phy;
+	void __iomem *cr2;
 	struct renesas_usbhs_platform_info info;
 };
 
@@ -232,8 +232,8 @@ static u32 usbhs_pipe_cfg[] = {
 };
 
 static struct usbhs_private usbhs_private = {
-	.phy	= 0xe60781e0,		/* USBPHYINT */
-	.cr2	= 0xe605810c,		/* USBCR2 */
+	.phy	= IOMEM(0xe60781e0),		/* USBPHYINT */
+	.cr2	= IOMEM(0xe605810c),		/* USBCR2 */
 	.info = {
 		.platform_callback = {
 			.hardware_init	= usbhs_hardware_init,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 7ea2b31..d271b46 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -583,8 +583,8 @@ out:
 #define USBHS0_POLL_INTERVAL (HZ * 5)
 
 struct usbhs_private {
-	unsigned int usbphyaddr;
-	unsigned int usbcrcaddr;
+	void __iomem *usbphyaddr;
+	void __iomem *usbcrcaddr;
 	struct renesas_usbhs_platform_info info;
 	struct delayed_work work;
 	struct platform_device *pdev;
@@ -642,7 +642,7 @@ static void usbhs0_hardware_exit(struct platform_device *pdev)
 }
 
 static struct usbhs_private usbhs0_private = {
-	.usbcrcaddr	= 0xe605810c,		/* USBCR2 */
+	.usbcrcaddr	= IOMEM(0xe605810c),		/* USBCR2 */
 	.info = {
 		.platform_callback = {
 			.hardware_init	= usbhs0_hardware_init,
@@ -775,8 +775,8 @@ static u32 usbhs1_pipe_cfg[] = {
 };
 
 static struct usbhs_private usbhs1_private = {
-	.usbphyaddr	= 0xe60581e2,		/* USBPHY1INTAP */
-	.usbcrcaddr	= 0xe6058130,		/* USBCR4 */
+	.usbphyaddr	= IOMEM(0xe60581e2),	/* USBPHY1INTAP */
+	.usbcrcaddr	= IOMEM(0xe6058130),	/* USBCR4 */
 	.info = {
 		.platform_callback = {
 			.hardware_init	= usbhs1_hardware_init,
@@ -1401,12 +1401,12 @@ static struct i2c_board_info i2c1_devices[] = {
 	},
 };
 
-#define GPIO_PORT9CR	0xE6051009
-#define GPIO_PORT10CR	0xE605100A
-#define GPIO_PORT167CR	0xE60520A7
-#define GPIO_PORT168CR	0xE60520A8
-#define SRCR4		0xe61580bc
-#define USCCR1		0xE6058144
+#define GPIO_PORT9CR	IOMEM(0xE6051009)
+#define GPIO_PORT10CR	IOMEM(0xE605100A)
+#define GPIO_PORT167CR	IOMEM(0xE60520A7)
+#define GPIO_PORT168CR	IOMEM(0xE60520A8)
+#define SRCR4		IOMEM(0xe61580bc)
+#define USCCR1		IOMEM(0xE6058144)
 static void __init mackerel_init(void)
 {
 	u32 srcr4;
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index ad5fccc..6729e00 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -41,29 +41,29 @@
  */
 
 /* CPG registers */
-#define FRQCRA		0xe6150000
-#define FRQCRB		0xe6150004
-#define VCLKCR1		0xE6150008
-#define VCLKCR2		0xE615000c
-#define FRQCRC		0xe61500e0
-#define FSIACKCR	0xe6150018
-#define PLLC01CR	0xe6150028
-
-#define SUBCKCR		0xe6150080
-#define USBCKCR		0xe615008c
-
-#define MSTPSR0		0xe6150030
-#define MSTPSR1		0xe6150038
-#define MSTPSR2		0xe6150040
-#define MSTPSR3		0xe6150048
-#define MSTPSR4		0xe615004c
-#define FSIBCKCR	0xe6150090
-#define HDMICKCR	0xe6150094
-#define SMSTPCR0	0xe6150130
-#define SMSTPCR1	0xe6150134
-#define SMSTPCR2	0xe6150138
-#define SMSTPCR3	0xe615013c
-#define SMSTPCR4	0xe6150140
+#define FRQCRA		IOMEM(0xe6150000)
+#define FRQCRB		IOMEM(0xe6150004)
+#define VCLKCR1		IOMEM(0xE6150008)
+#define VCLKCR2		IOMEM(0xE615000c)
+#define FRQCRC		IOMEM(0xe61500e0)
+#define FSIACKCR	IOMEM(0xe6150018)
+#define PLLC01CR	IOMEM(0xe6150028)
+
+#define SUBCKCR		IOMEM(0xe6150080)
+#define USBCKCR		IOMEM(0xe615008c)
+
+#define MSTPSR0		IOMEM(0xe6150030)
+#define MSTPSR1		IOMEM(0xe6150038)
+#define MSTPSR2		IOMEM(0xe6150040)
+#define MSTPSR3		IOMEM(0xe6150048)
+#define MSTPSR4		IOMEM(0xe615004c)
+#define FSIBCKCR	IOMEM(0xe6150090)
+#define HDMICKCR	IOMEM(0xe6150094)
+#define SMSTPCR0	IOMEM(0xe6150130)
+#define SMSTPCR1	IOMEM(0xe6150134)
+#define SMSTPCR2	IOMEM(0xe6150138)
+#define SMSTPCR3	IOMEM(0xe615013c)
+#define SMSTPCR4	IOMEM(0xe6150140)
 
 /* Fixed 32 KHz root clock from EXTALR pin */
 static struct clk extalr_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index 162b791..ef0a95e 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -24,28 +24,28 @@
 #include <mach/common.h>
 
 /* SH7367 registers */
-#define RTFRQCR    0xe6150000
-#define SYFRQCR    0xe6150004
-#define CMFRQCR    0xe61500E0
-#define VCLKCR1    0xe6150008
-#define VCLKCR2    0xe615000C
-#define VCLKCR3    0xe615001C
-#define SCLKACR    0xe6150010
-#define SCLKBCR    0xe6150014
-#define SUBUSBCKCR 0xe6158080
-#define SPUCKCR    0xe6150084
-#define MSUCKCR    0xe6150088
-#define MVI3CKCR   0xe6150090
-#define VOUCKCR    0xe6150094
-#define MFCK1CR    0xe6150098
-#define MFCK2CR    0xe615009C
-#define PLLC1CR    0xe6150028
-#define PLLC2CR    0xe615002C
-#define RTMSTPCR0  0xe6158030
-#define RTMSTPCR2  0xe6158038
-#define SYMSTPCR0  0xe6158040
-#define SYMSTPCR2  0xe6158048
-#define CMMSTPCR0  0xe615804c
+#define RTFRQCR    IOMEM(0xe6150000)
+#define SYFRQCR    IOMEM(0xe6150004)
+#define CMFRQCR    IOMEM(0xe61500E0)
+#define VCLKCR1    IOMEM(0xe6150008)
+#define VCLKCR2    IOMEM(0xe615000C)
+#define VCLKCR3    IOMEM(0xe615001C)
+#define SCLKACR    IOMEM(0xe6150010)
+#define SCLKBCR    IOMEM(0xe6150014)
+#define SUBUSBCKCR IOMEM(0xe6158080)
+#define SPUCKCR    IOMEM(0xe6150084)
+#define MSUCKCR    IOMEM(0xe6150088)
+#define MVI3CKCR   IOMEM(0xe6150090)
+#define VOUCKCR    IOMEM(0xe6150094)
+#define MFCK1CR    IOMEM(0xe6150098)
+#define MFCK2CR    IOMEM(0xe615009C)
+#define PLLC1CR    IOMEM(0xe6150028)
+#define PLLC2CR    IOMEM(0xe615002C)
+#define RTMSTPCR0  IOMEM(0xe6158030)
+#define RTMSTPCR2  IOMEM(0xe6158038)
+#define SYMSTPCR0  IOMEM(0xe6158040)
+#define SYMSTPCR2  IOMEM(0xe6158048)
+#define CMMSTPCR0  IOMEM(0xe615804c)
 
 /* Fixed 32 KHz root clock from EXTALR pin */
 static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 5a2894b..430a90f 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -24,36 +24,36 @@
 #include <mach/common.h>
 
 /* SH7372 registers */
-#define FRQCRA		0xe6150000
-#define FRQCRB		0xe6150004
-#define FRQCRC		0xe61500e0
-#define FRQCRD		0xe61500e4
-#define VCLKCR1		0xe6150008
-#define VCLKCR2		0xe615000c
-#define VCLKCR3		0xe615001c
-#define FMSICKCR	0xe6150010
-#define FMSOCKCR	0xe6150014
-#define FSIACKCR	0xe6150018
-#define FSIBCKCR	0xe6150090
-#define SUBCKCR		0xe6150080
-#define SPUCKCR		0xe6150084
-#define VOUCKCR		0xe6150088
-#define HDMICKCR	0xe6150094
-#define DSITCKCR	0xe6150060
-#define DSI0PCKCR	0xe6150064
-#define DSI1PCKCR	0xe6150098
-#define PLLC01CR	0xe6150028
-#define PLLC2CR		0xe615002c
-#define RMSTPCR0	0xe6150110
-#define RMSTPCR1	0xe6150114
-#define RMSTPCR2	0xe6150118
-#define RMSTPCR3	0xe615011c
-#define RMSTPCR4	0xe6150120
-#define SMSTPCR0	0xe6150130
-#define SMSTPCR1	0xe6150134
-#define SMSTPCR2	0xe6150138
-#define SMSTPCR3	0xe615013c
-#define SMSTPCR4	0xe6150140
+#define FRQCRA		IOMEM(0xe6150000)
+#define FRQCRB		IOMEM(0xe6150004)
+#define FRQCRC		IOMEM(0xe61500e0)
+#define FRQCRD		IOMEM(0xe61500e4)
+#define VCLKCR1		IOMEM(0xe6150008)
+#define VCLKCR2		IOMEM(0xe615000c)
+#define VCLKCR3		IOMEM(0xe615001c)
+#define FMSICKCR	IOMEM(0xe6150010)
+#define FMSOCKCR	IOMEM(0xe6150014)
+#define FSIACKCR	IOMEM(0xe6150018)
+#define FSIBCKCR	IOMEM(0xe6150090)
+#define SUBCKCR		IOMEM(0xe6150080)
+#define SPUCKCR		IOMEM(0xe6150084)
+#define VOUCKCR		IOMEM(0xe6150088)
+#define HDMICKCR	IOMEM(0xe6150094)
+#define DSITCKCR	IOMEM(0xe6150060)
+#define DSI0PCKCR	IOMEM(0xe6150064)
+#define DSI1PCKCR	IOMEM(0xe6150098)
+#define PLLC01CR	IOMEM(0xe6150028)
+#define PLLC2CR		IOMEM(0xe615002c)
+#define RMSTPCR0	IOMEM(0xe6150110)
+#define RMSTPCR1	IOMEM(0xe6150114)
+#define RMSTPCR2	IOMEM(0xe6150118)
+#define RMSTPCR3	IOMEM(0xe615011c)
+#define RMSTPCR4	IOMEM(0xe6150120)
+#define SMSTPCR0	IOMEM(0xe6150130)
+#define SMSTPCR1	IOMEM(0xe6150134)
+#define SMSTPCR2	IOMEM(0xe6150138)
+#define SMSTPCR3	IOMEM(0xe615013c)
+#define SMSTPCR4	IOMEM(0xe6150140)
 
 #define FSIDIVA		0xFE1F8000
 #define FSIDIVB		0xFE1F8008
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index 85f2a3e..b8480d1 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -24,31 +24,31 @@
 #include <mach/common.h>
 
 /* SH7377 registers */
-#define RTFRQCR    0xe6150000
-#define SYFRQCR    0xe6150004
-#define CMFRQCR    0xe61500E0
-#define VCLKCR1    0xe6150008
-#define VCLKCR2    0xe615000C
-#define VCLKCR3    0xe615001C
-#define FMSICKCR   0xe6150010
-#define FMSOCKCR   0xe6150014
-#define FSICKCR    0xe6150018
-#define PLLC1CR    0xe6150028
-#define PLLC2CR    0xe615002C
-#define SUBUSBCKCR 0xe6150080
-#define SPUCKCR    0xe6150084
-#define MSUCKCR    0xe6150088
-#define MVI3CKCR   0xe6150090
-#define HDMICKCR   0xe6150094
-#define MFCK1CR    0xe6150098
-#define MFCK2CR    0xe615009C
-#define DSITCKCR   0xe6150060
-#define DSIPCKCR   0xe6150064
-#define SMSTPCR0   0xe6150130
-#define SMSTPCR1   0xe6150134
-#define SMSTPCR2   0xe6150138
-#define SMSTPCR3   0xe615013C
-#define SMSTPCR4   0xe6150140
+#define RTFRQCR    IOMEM(0xe6150000)
+#define SYFRQCR    IOMEM(0xe6150004)
+#define CMFRQCR    IOMEM(0xe61500E0)
+#define VCLKCR1    IOMEM(0xe6150008)
+#define VCLKCR2    IOMEM(0xe615000C)
+#define VCLKCR3    IOMEM(0xe615001C)
+#define FMSICKCR   IOMEM(0xe6150010)
+#define FMSOCKCR   IOMEM(0xe6150014)
+#define FSICKCR    IOMEM(0xe6150018)
+#define PLLC1CR    IOMEM(0xe6150028)
+#define PLLC2CR    IOMEM(0xe615002C)
+#define SUBUSBCKCR IOMEM(0xe6150080)
+#define SPUCKCR    IOMEM(0xe6150084)
+#define MSUCKCR    IOMEM(0xe6150088)
+#define MVI3CKCR   IOMEM(0xe6150090)
+#define HDMICKCR   IOMEM(0xe6150094)
+#define MFCK1CR    IOMEM(0xe6150098)
+#define MFCK2CR    IOMEM(0xe615009C)
+#define DSITCKCR   IOMEM(0xe6150060)
+#define DSIPCKCR   IOMEM(0xe6150064)
+#define SMSTPCR0   IOMEM(0xe6150130)
+#define SMSTPCR1   IOMEM(0xe6150134)
+#define SMSTPCR2   IOMEM(0xe6150138)
+#define SMSTPCR3   IOMEM(0xe615013C)
+#define SMSTPCR4   IOMEM(0xe6150140)
 
 /* Fixed 32 KHz root clock from EXTALR pin */
 static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 7f8da18..516ff7f 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -23,43 +23,43 @@
 #include <linux/clkdev.h>
 #include <mach/common.h>
 
-#define FRQCRA		0xe6150000
-#define FRQCRB		0xe6150004
-#define FRQCRD		0xe61500e4
-#define VCLKCR1		0xe6150008
-#define VCLKCR2		0xe615000C
-#define VCLKCR3		0xe615001C
-#define ZBCKCR		0xe6150010
-#define FLCKCR		0xe6150014
-#define SD0CKCR		0xe6150074
-#define SD1CKCR		0xe6150078
-#define SD2CKCR		0xe615007C
-#define FSIACKCR	0xe6150018
-#define FSIBCKCR	0xe6150090
-#define SUBCKCR		0xe6150080
-#define SPUACKCR	0xe6150084
-#define SPUVCKCR	0xe6150094
-#define MSUCKCR		0xe6150088
-#define HSICKCR		0xe615008C
-#define MFCK1CR		0xe6150098
-#define MFCK2CR		0xe615009C
-#define DSITCKCR	0xe6150060
-#define DSI0PCKCR	0xe6150064
-#define DSI1PCKCR	0xe6150068
+#define FRQCRA		IOMEM(0xe6150000)
+#define FRQCRB		IOMEM(0xe6150004)
+#define FRQCRD		IOMEM(0xe61500e4)
+#define VCLKCR1		IOMEM(0xe6150008)
+#define VCLKCR2		IOMEM(0xe615000C)
+#define VCLKCR3		IOMEM(0xe615001C)
+#define ZBCKCR		IOMEM(0xe6150010)
+#define FLCKCR		IOMEM(0xe6150014)
+#define SD0CKCR		IOMEM(0xe6150074)
+#define SD1CKCR		IOMEM(0xe6150078)
+#define SD2CKCR		IOMEM(0xe615007C)
+#define FSIACKCR	IOMEM(0xe6150018)
+#define FSIBCKCR	IOMEM(0xe6150090)
+#define SUBCKCR		IOMEM(0xe6150080)
+#define SPUACKCR	IOMEM(0xe6150084)
+#define SPUVCKCR	IOMEM(0xe6150094)
+#define MSUCKCR		IOMEM(0xe6150088)
+#define HSICKCR		IOMEM(0xe615008C)
+#define MFCK1CR		IOMEM(0xe6150098)
+#define MFCK2CR		IOMEM(0xe615009C)
+#define DSITCKCR	IOMEM(0xe6150060)
+#define DSI0PCKCR	IOMEM(0xe6150064)
+#define DSI1PCKCR	IOMEM(0xe6150068)
 #define DSI0PHYCR	0xe615006C
 #define DSI1PHYCR	0xe6150070
-#define PLLECR		0xe61500d0
-#define PLL0CR		0xe61500d8
-#define PLL1CR		0xe6150028
-#define PLL2CR		0xe615002c
-#define PLL3CR		0xe61500dc
-#define SMSTPCR0	0xe6150130
-#define SMSTPCR1	0xe6150134
-#define SMSTPCR2	0xe6150138
-#define SMSTPCR3	0xe615013c
-#define SMSTPCR4	0xe6150140
-#define SMSTPCR5	0xe6150144
-#define CKSCR		0xe61500c0
+#define PLLECR		IOMEM(0xe61500d0)
+#define PLL0CR		IOMEM(0xe61500d8)
+#define PLL1CR		IOMEM(0xe6150028)
+#define PLL2CR		IOMEM(0xe615002c)
+#define PLL3CR		IOMEM(0xe61500dc)
+#define SMSTPCR0	IOMEM(0xe6150130)
+#define SMSTPCR1	IOMEM(0xe6150134)
+#define SMSTPCR2	IOMEM(0xe6150138)
+#define SMSTPCR3	IOMEM(0xe615013c)
+#define SMSTPCR4	IOMEM(0xe6150140)
+#define SMSTPCR5	IOMEM(0xe6150144)
+#define CKSCR		IOMEM(0xe61500c0)
 
 /* Fixed 32 KHz root clock from EXTALR pin */
 static struct clk r_clk = {
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 844507d..90a92b2 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -35,12 +35,12 @@ static inline int irq_to_gpio(unsigned int irq)
  * the method to control only pull up/down/free.
  * this function should be replaced by correct gpio function
  */
-static inline void __init gpio_direction_none(u32 addr)
+static inline void __init gpio_direction_none(void __iomem * addr)
 {
 	__raw_writeb(0x00, addr);
 }
 
-static inline void __init gpio_request_pullup(u32 addr)
+static inline void __init gpio_request_pullup(void __iomem * addr)
 {
 	u8 data = __raw_readb(addr);
 
@@ -49,7 +49,7 @@ static inline void __init gpio_request_pullup(u32 addr)
 	__raw_writeb(data, addr);
 }
 
-static inline void __init gpio_request_pulldown(u32 addr)
+static inline void __init gpio_request_pulldown(void __iomem * addr)
 {
 	u8 data = __raw_readb(addr);
 
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index f04fad4..ef66f1a 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -29,14 +29,14 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-#define INT2SMSKCR0 0xfe7822a0
-#define INT2SMSKCR1 0xfe7822a4
-#define INT2SMSKCR2 0xfe7822a8
-#define INT2SMSKCR3 0xfe7822ac
-#define INT2SMSKCR4 0xfe7822b0
+#define INT2SMSKCR0 IOMEM(0xfe7822a0)
+#define INT2SMSKCR1 IOMEM(0xfe7822a4)
+#define INT2SMSKCR2 IOMEM(0xfe7822a8)
+#define INT2SMSKCR3 IOMEM(0xfe7822ac)
+#define INT2SMSKCR4 IOMEM(0xfe7822b0)
 
-#define INT2NTSR0 0xfe700060
-#define INT2NTSR1 0xfe700064
+#define INT2NTSR0 IOMEM(0xfe700060)
+#define INT2NTSR1 IOMEM(0xfe700064)
 
 static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
 {
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 2587a22..a91caad 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -624,6 +624,9 @@ void sh7372_intcs_resume(void)
 		__raw_writeb(ffd5[k], intcs_ffd5 + k);
 }
 
+#define E694_BASE IOMEM(0xe6940000)
+#define E695_BASE IOMEM(0xe6950000)
+
 static unsigned short e694[0x200];
 static unsigned short e695[0x200];
 
@@ -632,22 +635,22 @@ void sh7372_intca_suspend(void)
 	int k;
 
 	for (k = 0x00; k <= 0x38; k += 4)
-		e694[k] = __raw_readw(0xe6940000 + k);
+		e694[k] = __raw_readw(E694_BASE + k);
 
 	for (k = 0x80; k <= 0xb4; k += 4)
-		e694[k] = __raw_readb(0xe6940000 + k);
+		e694[k] = __raw_readb(E694_BASE + k);
 
 	for (k = 0x180; k <= 0x1b4; k += 4)
-		e694[k] = __raw_readb(0xe6940000 + k);
+		e694[k] = __raw_readb(E694_BASE + k);
 
 	for (k = 0x00; k <= 0x50; k += 4)
-		e695[k] = __raw_readw(0xe6950000 + k);
+		e695[k] = __raw_readw(E695_BASE + k);
 
 	for (k = 0x80; k <= 0xa8; k += 4)
-		e695[k] = __raw_readb(0xe6950000 + k);
+		e695[k] = __raw_readb(E695_BASE + k);
 
 	for (k = 0x180; k <= 0x1a8; k += 4)
-		e695[k] = __raw_readb(0xe6950000 + k);
+		e695[k] = __raw_readb(E695_BASE + k);
 }
 
 void sh7372_intca_resume(void)
@@ -655,20 +658,20 @@ void sh7372_intca_resume(void)
 	int k;
 
 	for (k = 0x00; k <= 0x38; k += 4)
-		__raw_writew(e694[k], 0xe6940000 + k);
+		__raw_writew(e694[k], E694_BASE + k);
 
 	for (k = 0x80; k <= 0xb4; k += 4)
-		__raw_writeb(e694[k], 0xe6940000 + k);
+		__raw_writeb(e694[k], E694_BASE + k);
 
 	for (k = 0x180; k <= 0x1b4; k += 4)
-		__raw_writeb(e694[k], 0xe6940000 + k);
+		__raw_writeb(e694[k], E694_BASE + k);
 
 	for (k = 0x00; k <= 0x50; k += 4)
-		__raw_writew(e695[k], 0xe6950000 + k);
+		__raw_writew(e695[k], E695_BASE + k);
 
 	for (k = 0x80; k <= 0xa8; k += 4)
-		__raw_writeb(e695[k], 0xe6950000 + k);
+		__raw_writeb(e695[k], E695_BASE + k);
 
 	for (k = 0x180; k <= 0x1a8; k += 4)
-		__raw_writeb(e695[k], 0xe6950000 + k);
+		__raw_writeb(e695[k], E695_BASE + k);
 }
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index ee44740..a8b2dd7 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -366,10 +366,12 @@ static irqreturn_t sh73a0_irq_pin_demux(int irq, void *dev_id)
 
 static struct irqaction sh73a0_irq_pin_cascade[32];
 
-#define PINTER0 0xe69000a0
-#define PINTER1 0xe69000a4
-#define PINTRR0 0xe69000d0
-#define PINTRR1 0xe69000d4
+#define PINTER0_PHYS 0xe69000a0
+#define PINTER1_PHYS 0xe69000a4
+#define PINTER0_VIRT IOMEM(0xe69000a0)
+#define PINTER1_VIRT IOMEM(0xe69000a4)
+#define PINTRR0 IOMEM(0xe69000d0)
+#define PINTRR1 IOMEM(0xe69000d4)
 
 #define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq))
 #define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8))
@@ -377,14 +379,14 @@ static struct irqaction sh73a0_irq_pin_cascade[32];
 #define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24))
 #define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq))
 
-INTC_PINT(intc_pint0, PINTER0, 0xe69000b0, "sh73a0-pint0",		\
+INTC_PINT(intc_pint0, PINTER0_PHYS, 0xe69000b0, "sh73a0-pint0",		\
   INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D),	\
   INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ),		\
   INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ),		\
   INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D),	\
   INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D));
 
-INTC_PINT(intc_pint1, PINTER1, 0xe69000c0, "sh73a0-pint1",		\
+INTC_PINT(intc_pint1, PINTER1_PHYS, 0xe69000c0, "sh73a0-pint1",		\
   INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \
   INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE,				\
   INTC_PINT_V_NONE, INTC_PINT_V_NONE,					\
@@ -394,7 +396,7 @@ INTC_PINT(intc_pint1, PINTER1, 0xe69000c0, "sh73a0-pint1",		\
 static struct irqaction sh73a0_pint0_cascade;
 static struct irqaction sh73a0_pint1_cascade;
 
-static void pint_demux(unsigned long rr, unsigned long er, int base_irq)
+static void pint_demux(void __iomem *rr, void __iomem *er, int base_irq)
 {
 	unsigned long value =  ioread32(rr) & ioread32(er);
 	int k;
@@ -409,13 +411,13 @@ static void pint_demux(unsigned long rr, unsigned long er, int base_irq)
 
 static irqreturn_t sh73a0_pint0_demux(int irq, void *dev_id)
 {
-	pint_demux(PINTRR0, PINTER0, SH73A0_PINT0_IRQ(0));
+	pint_demux(PINTRR0, PINTER0_VIRT, SH73A0_PINT0_IRQ(0));
 	return IRQ_HANDLED;
 }
 
 static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id)
 {
-	pint_demux(PINTRR1, PINTER1, SH73A0_PINT1_IRQ(0));
+	pint_demux(PINTRR1, PINTER1_VIRT, SH73A0_PINT1_IRQ(0));
 	return IRQ_HANDLED;
 }
 
diff --git a/arch/arm/mach-shmobile/pm-rmobile.c b/arch/arm/mach-shmobile/pm-rmobile.c
index a856254..32e1772 100644
--- a/arch/arm/mach-shmobile/pm-rmobile.c
+++ b/arch/arm/mach-shmobile/pm-rmobile.c
@@ -20,9 +20,9 @@
 #include <mach/pm-rmobile.h>
 
 /* SYSC */
-#define SPDCR		0xe6180008
-#define SWUCR		0xe6180014
-#define PSTR		0xe6180080
+#define SPDCR		IOMEM(0xe6180008)
+#define SWUCR		IOMEM(0xe6180014)
+#define PSTR		IOMEM(0xe6180080)
 
 #define PSTR_RETRIES	100
 #define PSTR_DELAY_US	10
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 7920370..1621218 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -29,45 +29,46 @@
 #include <mach/pm-rmobile.h>
 
 /* DBG */
-#define DBGREG1 0xe6100020
-#define DBGREG9 0xe6100040
+#define DBGREG1 IOMEM(0xe6100020)
+#define DBGREG9 IOMEM(0xe6100040)
 
 /* CPGA */
-#define SYSTBCR 0xe6150024
-#define MSTPSR0 0xe6150030
-#define MSTPSR1 0xe6150038
-#define MSTPSR2 0xe6150040
-#define MSTPSR3 0xe6150048
-#define MSTPSR4 0xe615004c
-#define PLLC01STPCR 0xe61500c8
+#define SYSTBCR IOMEM(0xe6150024)
+#define MSTPSR0 IOMEM(0xe6150030)
+#define MSTPSR1 IOMEM(0xe6150038)
+#define MSTPSR2 IOMEM(0xe6150040)
+#define MSTPSR3 IOMEM(0xe6150048)
+#define MSTPSR4 IOMEM(0xe615004c)
+#define PLLC01STPCR IOMEM(0xe61500c8)
 
 /* SYSC */
-#define SBAR 0xe6180020
-#define WUPRMSK 0xe6180028
-#define WUPSMSK 0xe618002c
-#define WUPSMSK2 0xe6180048
-#define WUPSFAC 0xe6180098
-#define IRQCR 0xe618022c
-#define IRQCR2 0xe6180238
-#define IRQCR3 0xe6180244
-#define IRQCR4 0xe6180248
-#define PDNSEL 0xe6180254
+#define SBAR IOMEM(0xe6180020)
+#define WUPRMSK IOMEM(0xe6180028)
+#define WUPSMSK IOMEM(0xe618002c)
+#define WUPSMSK2 IOMEM(0xe6180048)
+#define WUPSFAC IOMEM(0xe6180098)
+#define IRQCR IOMEM(0xe618022c)
+#define IRQCR2 IOMEM(0xe6180238)
+#define IRQCR3 IOMEM(0xe6180244)
+#define IRQCR4 IOMEM(0xe6180248)
+#define PDNSEL IOMEM(0xe6180254)
 
 /* INTC */
-#define ICR1A 0xe6900000
-#define ICR2A 0xe6900004
-#define ICR3A 0xe6900008
-#define ICR4A 0xe690000c
-#define INTMSK00A 0xe6900040
-#define INTMSK10A 0xe6900044
-#define INTMSK20A 0xe6900048
-#define INTMSK30A 0xe690004c
+#define ICR1A IOMEM(0xe6900000)
+#define ICR2A IOMEM(0xe6900004)
+#define ICR3A IOMEM(0xe6900008)
+#define ICR4A IOMEM(0xe690000c)
+#define INTMSK00A IOMEM(0xe6900040)
+#define INTMSK10A IOMEM(0xe6900044)
+#define INTMSK20A IOMEM(0xe6900048)
+#define INTMSK30A IOMEM(0xe690004c)
 
 /* MFIS */
+/* FIXME: pointing where? */
 #define SMFRAM 0xe6a70000
 
 /* AP-System Core */
-#define APARMBAREA 0xe6f10020
+#define APARMBAREA IOMEM(0xe6f10020)
 
 #ifdef CONFIG_PM
 
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
index 2e3074a..e647f54 100644
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -462,7 +462,7 @@ static void __init sh7367_earlytimer_init(void)
 	shmobile_earlytimer_init();
 }
 
-#define SYMSTPCR2 0xe6158048
+#define SYMSTPCR2 IOMEM(0xe6158048)
 #define SYMSTPCR2_CMT1 (1 << 29)
 
 void __init sh7367_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index 855b150..edcf98b 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -484,7 +484,7 @@ static void __init sh7377_earlytimer_init(void)
 	shmobile_earlytimer_init();
 }
 
-#define SMSTPCR3 0xe615013c
+#define SMSTPCR3 IOMEM(0xe615013c)
 #define SMSTPCR3_CMT1 (1 << 29)
 
 void __init sh7377_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
index d230af6..a13c97b 100644
--- a/arch/arm/mach-shmobile/setup-sh73a0.c
+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
@@ -759,7 +759,7 @@ static struct platform_device *sh73a0_late_devices[] __initdata = {
 	&mpdma0_device,
 };
 
-#define SRCR2          0xe61580b0
+#define SRCR2          IOMEM(0xe61580b0)
 
 void __init sh73a0_add_standard_devices(void)
 {
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index eb763ad..d323290 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -150,7 +150,7 @@ struct plat_sci_port {
 	int		overrun_bit;
 	unsigned int	error_mask;
 
-	int		port_reg;
+	void __iomem   *port_reg;
 	unsigned char	regshift;
 	unsigned char	regtype;
 
-- 
1.7.10

Re: [PATCH 01/24] ARM: shmobile: use __iomem pointers for MMIO

[Simon Horman]

On Fri, Sep 14, 2012 at 11:34:29PM +0200, Arnd Bergmann wrote:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
> 
> This patch is a bit ugly for shmobile, which is the only platform
> that just uses integer literals all over the place, but I can't
> see a better way to do this.
> 
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> Cc: Simon Horman <horms@verge.net.au>
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: linux-sh@vger.kernel.org
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Wow, thats a lot of chrun, but if we must

Acked-by: Simon Horman <horms@verge.net.au>

> ---
>  arch/arm/mach-shmobile/board-ap4evb.c          |   12 ++--
>  arch/arm/mach-shmobile/board-armadillo800eva.c |    6 +-
>  arch/arm/mach-shmobile/board-bonito.c          |    8 +--
>  arch/arm/mach-shmobile/board-g3evm.c           |   12 ++--
>  arch/arm/mach-shmobile/board-g4evm.c           |   30 +++++-----
>  arch/arm/mach-shmobile/board-kzm9g.c           |    8 +--
>  arch/arm/mach-shmobile/board-mackerel.c        |   22 ++++----
>  arch/arm/mach-shmobile/clock-r8a7740.c         |   46 ++++++++--------
>  arch/arm/mach-shmobile/clock-sh7367.c          |   44 +++++++--------
>  arch/arm/mach-shmobile/clock-sh7372.c          |   60 ++++++++++----------
>  arch/arm/mach-shmobile/clock-sh7377.c          |   50 ++++++++---------
>  arch/arm/mach-shmobile/clock-sh73a0.c          |   70 ++++++++++++------------
>  arch/arm/mach-shmobile/include/mach/gpio.h     |    6 +-
>  arch/arm/mach-shmobile/intc-r8a7779.c          |   14 ++---
>  arch/arm/mach-shmobile/intc-sh7372.c           |   27 +++++----
>  arch/arm/mach-shmobile/intc-sh73a0.c           |   20 ++++---
>  arch/arm/mach-shmobile/pm-rmobile.c            |    6 +-
>  arch/arm/mach-shmobile/pm-sh7372.c             |   57 +++++++++----------
>  arch/arm/mach-shmobile/setup-sh7367.c          |    2 +-
>  arch/arm/mach-shmobile/setup-sh7377.c          |    2 +-
>  arch/arm/mach-shmobile/setup-sh73a0.c          |    2 +-
>  include/linux/serial_sci.h                     |    2 +-
>  22 files changed, 256 insertions(+), 250 deletions(-)

Re: [PATCH 01/24] ARM: shmobile: use __iomem pointers for MMIO

[Arnd Bergmann]

On Tuesday 18 September 2012, Simon Horman wrote:
> On Fri, Sep 14, 2012 at 11:34:29PM +0200, Arnd Bergmann wrote:
> > ARM is moving to stricter checks on readl/write functions,
> > so we need to use the correct types everywhere.
> > 
> > This patch is a bit ugly for shmobile, which is the only platform
> > that just uses integer literals all over the place, but I can't
> > see a better way to do this.
> > 
> > Cc: Magnus Damm <magnus.damm@gmail.com>
> > Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> > Cc: Simon Horman <horms@verge.net.au>
> > Cc: Paul Mundt <lethal@linux-sh.org>
> > Cc: linux-sh@vger.kernel.org
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> 
> Wow, thats a lot of chrun, but if we must
> 
> Acked-by: Simon Horman <horms@verge.net.au>
> 

I agree it's not nice to have to do this, but this is largely because
of shmobile doing things differently from all other ARM platforms, on
which the respective patches tend to clean up things and reduce the
number of type casts.

The only alternative I can see is for shmobile to introduce its own
mach/io.h file with the relaxed type checking, but that would only
defer the problem until the point where you want shmobile to be part
of the common multiplatform kernel binary.

	Arnd

Re: [PATCH 01/24] ARM: shmobile: use __iomem pointers for MMIO

[Simon Horman]

On Tue, Sep 18, 2012 at 08:31:06AM +0000, Arnd Bergmann wrote:
> On Tuesday 18 September 2012, Simon Horman wrote:
> > On Fri, Sep 14, 2012 at 11:34:29PM +0200, Arnd Bergmann wrote:
> > > ARM is moving to stricter checks on readl/write functions,
> > > so we need to use the correct types everywhere.
> > > 
> > > This patch is a bit ugly for shmobile, which is the only platform
> > > that just uses integer literals all over the place, but I can't
> > > see a better way to do this.
> > > 
> > > Cc: Magnus Damm <magnus.damm@gmail.com>
> > > Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> > > Cc: Simon Horman <horms@verge.net.au>
> > > Cc: Paul Mundt <lethal@linux-sh.org>
> > > Cc: linux-sh@vger.kernel.org
> > > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> > 
> > Wow, thats a lot of chrun, but if we must
> > 
> > Acked-by: Simon Horman <horms@verge.net.au>
> > 
> 
> I agree it's not nice to have to do this, but this is largely because
> of shmobile doing things differently from all other ARM platforms, on
> which the respective patches tend to clean up things and reduce the
> number of type casts.
> 
> The only alternative I can see is for shmobile to introduce its own
> mach/io.h file with the relaxed type checking, but that would only
> defer the problem until the point where you want shmobile to be part
> of the common multiplatform kernel binary.

If it is needed in the long term, then I'm happy with it going in now.
Could you remove the portion that Paul objected to?

Re: [PATCH 01/24] ARM: shmobile: use __iomem pointers for MMIO

[Arnd Bergmann]

On Tuesday 18 September 2012, Simon Horman wrote:
> > I agree it's not nice to have to do this, but this is largely because
> > of shmobile doing things differently from all other ARM platforms, on
> > which the respective patches tend to clean up things and reduce the
> > number of type casts.
> > 
> > The only alternative I can see is for shmobile to introduce its own
> > mach/io.h file with the relaxed type checking, but that would only
> > defer the problem until the point where you want shmobile to be part
> > of the common multiplatform kernel binary.
> 
> If it is needed in the long term, then I'm happy with it going in now.
> Could you remove the portion that Paul objected to?

Yes, I already did that.

	Arnd

Re: [PATCH 01/24] ARM: shmobile: use __iomem pointers for MMIO

[Simon Horman]

On Tue, Sep 18, 2012 at 04:04:49PM +0000, Arnd Bergmann wrote:
> On Tuesday 18 September 2012, Simon Horman wrote:
> > > I agree it's not nice to have to do this, but this is largely because
> > > of shmobile doing things differently from all other ARM platforms, on
> > > which the respective patches tend to clean up things and reduce the
> > > number of type casts.
> > > 
> > > The only alternative I can see is for shmobile to introduce its own
> > > mach/io.h file with the relaxed type checking, but that would only
> > > defer the problem until the point where you want shmobile to be part
> > > of the common multiplatform kernel binary.
> > 
> > If it is needed in the long term, then I'm happy with it going in now.
> > Could you remove the portion that Paul objected to?
> 
> Yes, I already did that.

Great, thanks.

Re: [PATCH 01/24] ARM: shmobile: use __iomem pointers for MMIO

[Paul Mundt]

On Fri, Sep 14, 2012 at 11:34:29PM +0200, Arnd Bergmann wrote:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
> 
> This patch is a bit ugly for shmobile, which is the only platform
> that just uses integer literals all over the place, but I can't
> see a better way to do this.
> 
If you want to crap up the ARM side with this stuff, that's fine, but
leave sh-sci out of it.

So, NAK on this part:

> diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
> index eb763ad..d323290 100644
> --- a/include/linux/serial_sci.h
> +++ b/include/linux/serial_sci.h
> @@ -150,7 +150,7 @@ struct plat_sci_port {
>  	int		overrun_bit;
>  	unsigned int	error_mask;
>  
> -	int		port_reg;
> +	void __iomem   *port_reg;
>  	unsigned char	regshift;
>  	unsigned char	regtype;
>  
but I don't mind if you cast the callsite in drivers/tty/serial/sh-sci.c

[PATCH 02/24] ARM: at91: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-at91/at91x40.c                 |    2 +-
 arch/arm/mach-at91/at91x40_time.c            |    4 ++--
 arch/arm/mach-at91/include/mach/hardware.h   |    4 ++--
 arch/arm/mach-at91/include/mach/uncompress.h |    6 +++---
 arch/arm/mach-at91/setup.c                   |    4 ++--
 5 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
index 46090e6..6bd7300 100644
--- a/arch/arm/mach-at91/at91x40.c
+++ b/arch/arm/mach-at91/at91x40.c
@@ -47,7 +47,7 @@ static void at91x40_idle(void)
 	 * Disable the processor clock.  The processor will be automatically
 	 * re-enabled by an interrupt or by a reset.
 	 */
-	__raw_writel(AT91_PS_CR_CPU, AT91_PS_CR);
+	__raw_writel(AT91_PS_CR_CPU, AT91_IO_P2V(AT91_PS_CR));
 	cpu_do_idle();
 }
 
diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c
index 6ca680a..ee06d7b 100644
--- a/arch/arm/mach-at91/at91x40_time.c
+++ b/arch/arm/mach-at91/at91x40_time.c
@@ -29,10 +29,10 @@
 #include <mach/at91_tc.h>
 
 #define at91_tc_read(field) \
-	__raw_readl(AT91_TC + field)
+	__raw_readl(AT91_IO_P2V(AT91_TC) + field)
 
 #define at91_tc_write(field, value) \
-	__raw_writel(value, AT91_TC + field);
+	__raw_writel(value, AT91_IO_P2V(AT91_TC) + field);
 
 /*
  *	3 counter/timer units present.
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 09242b6..711a789 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -67,13 +67,13 @@
  * to 0xFEF78000 .. 0xFF000000.  (544Kb)
  */
 #define AT91_IO_PHYS_BASE	0xFFF78000
-#define AT91_IO_VIRT_BASE	(0xFF000000 - AT91_IO_SIZE)
+#define AT91_IO_VIRT_BASE	IOMEM(0xFF000000 - AT91_IO_SIZE)
 #else
 /*
  * Identity mapping for the non MMU case.
  */
 #define AT91_IO_PHYS_BASE	AT91_BASE_SYS
-#define AT91_IO_VIRT_BASE	AT91_IO_PHYS_BASE
+#define AT91_IO_VIRT_BASE	IOMEM(AT91_IO_PHYS_BASE)
 #endif
 
 #define AT91_IO_SIZE		(0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 6f6118d..58c9d5b 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -94,7 +94,7 @@ static const u32 uarts_sam9x5[] = {
 	0,
 };
 
-static inline const u32* decomp_soc_detect(u32 dbgu_base)
+static inline const u32* decomp_soc_detect(void __iomem*dbgu_base)
 {
 	u32 cidr, socid;
 
@@ -142,10 +142,10 @@ static inline void arch_decomp_setup(void)
 	int i = 0;
 	const u32* usarts;
 
-	usarts = decomp_soc_detect(AT91_BASE_DBGU0);
+	usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0);
 
 	if (!usarts)
-		usarts = decomp_soc_detect(AT91_BASE_DBGU1);
+		usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1);
 	if (!usarts) {
 		at91_uart = NULL;
 		return;
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 944bffb..e6f52de 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -73,7 +73,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
 {
 	struct map_desc *desc = &sram_desc[bank];
 
-	desc->virtual = AT91_IO_VIRT_BASE - length;
+	desc->virtual = (unsigned long)AT91_IO_VIRT_BASE - length;
 	if (bank > 0)
 		desc->virtual -= sram_desc[bank - 1].length;
 
@@ -88,7 +88,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
 }
 
 static struct map_desc at91_io_desc __initdata = {
-	.virtual	= AT91_VA_BASE_SYS,
+	.virtual	= (unsigned long)AT91_VA_BASE_SYS,
 	.pfn		= __phys_to_pfn(AT91_BASE_SYS),
 	.length		= SZ_16K,
 	.type		= MT_DEVICE,
-- 
1.7.10

Re: [PATCH 02/24] ARM: at91: use __iomem pointers for MMIO

[Nicolas Ferre]

On 09/14/2012 11:34 PM, Arnd Bergmann :
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
> 
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
>  arch/arm/mach-at91/at91x40.c                 |    2 +-
>  arch/arm/mach-at91/at91x40_time.c            |    4 ++--
>  arch/arm/mach-at91/include/mach/hardware.h   |    4 ++--
>  arch/arm/mach-at91/include/mach/uncompress.h |    6 +++---
>  arch/arm/mach-at91/setup.c                   |    4 ++--
>  5 files changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c
> index 46090e6..6bd7300 100644
> --- a/arch/arm/mach-at91/at91x40.c
> +++ b/arch/arm/mach-at91/at91x40.c
> @@ -47,7 +47,7 @@ static void at91x40_idle(void)
>  	 * Disable the processor clock.  The processor will be automatically
>  	 * re-enabled by an interrupt or by a reset.
>  	 */
> -	__raw_writel(AT91_PS_CR_CPU, AT91_PS_CR);
> +	__raw_writel(AT91_PS_CR_CPU, AT91_IO_P2V(AT91_PS_CR));
>  	cpu_do_idle();
>  }
>  
> diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c
> index 6ca680a..ee06d7b 100644
> --- a/arch/arm/mach-at91/at91x40_time.c
> +++ b/arch/arm/mach-at91/at91x40_time.c
> @@ -29,10 +29,10 @@
>  #include <mach/at91_tc.h>
>  
>  #define at91_tc_read(field) \
> -	__raw_readl(AT91_TC + field)
> +	__raw_readl(AT91_IO_P2V(AT91_TC) + field)
>  
>  #define at91_tc_write(field, value) \
> -	__raw_writel(value, AT91_TC + field);
> +	__raw_writel(value, AT91_IO_P2V(AT91_TC) + field);
>  
>  /*
>   *	3 counter/timer units present.
> diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
> index 09242b6..711a789 100644
> --- a/arch/arm/mach-at91/include/mach/hardware.h
> +++ b/arch/arm/mach-at91/include/mach/hardware.h
> @@ -67,13 +67,13 @@
>   * to 0xFEF78000 .. 0xFF000000.  (544Kb)
>   */
>  #define AT91_IO_PHYS_BASE	0xFFF78000
> -#define AT91_IO_VIRT_BASE	(0xFF000000 - AT91_IO_SIZE)
> +#define AT91_IO_VIRT_BASE	IOMEM(0xFF000000 - AT91_IO_SIZE)
>  #else
>  /*
>   * Identity mapping for the non MMU case.
>   */
>  #define AT91_IO_PHYS_BASE	AT91_BASE_SYS
> -#define AT91_IO_VIRT_BASE	AT91_IO_PHYS_BASE
> +#define AT91_IO_VIRT_BASE	IOMEM(AT91_IO_PHYS_BASE)
>  #endif
>  
>  #define AT91_IO_SIZE		(0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
> diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
> index 6f6118d..58c9d5b 100644
> --- a/arch/arm/mach-at91/include/mach/uncompress.h
> +++ b/arch/arm/mach-at91/include/mach/uncompress.h
> @@ -94,7 +94,7 @@ static const u32 uarts_sam9x5[] = {
>  	0,
>  };
>  
> -static inline const u32* decomp_soc_detect(u32 dbgu_base)
> +static inline const u32* decomp_soc_detect(void __iomem*dbgu_base)

A whitespace is missing before the *, no?

>  {
>  	u32 cidr, socid;
>  
> @@ -142,10 +142,10 @@ static inline void arch_decomp_setup(void)
>  	int i = 0;
>  	const u32* usarts;
>  
> -	usarts = decomp_soc_detect(AT91_BASE_DBGU0);
> +	usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0);
>  
>  	if (!usarts)
> -		usarts = decomp_soc_detect(AT91_BASE_DBGU1);
> +		usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1);
>  	if (!usarts) {
>  		at91_uart = NULL;
>  		return;
> diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
> index 944bffb..e6f52de 100644
> --- a/arch/arm/mach-at91/setup.c
> +++ b/arch/arm/mach-at91/setup.c
> @@ -73,7 +73,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
>  {
>  	struct map_desc *desc = &sram_desc[bank];
>  
> -	desc->virtual = AT91_IO_VIRT_BASE - length;
> +	desc->virtual = (unsigned long)AT91_IO_VIRT_BASE - length;
>  	if (bank > 0)
>  		desc->virtual -= sram_desc[bank - 1].length;
>  
> @@ -88,7 +88,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
>  }
>  
>  static struct map_desc at91_io_desc __initdata = {
> -	.virtual	= AT91_VA_BASE_SYS,
> +	.virtual	= (unsigned long)AT91_VA_BASE_SYS,
>  	.pfn		= __phys_to_pfn(AT91_BASE_SYS),
>  	.length		= SZ_16K,
>  	.type		= MT_DEVICE,
> 

Otherwise, look good.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

You can carry it directly in the arm-soc tree.

Bye,
-- 
Nicolas Ferre

Re: [PATCH 02/24] ARM: at91: use __iomem pointers for MMIO

[Arnd Bergmann]

On Monday 17 September 2012, Nicolas Ferre wrote:
> > @@ -94,7 +94,7 @@ static const u32 uarts_sam9x5[] = {
> >       0,
> >  };
> >  
> > -static inline const u32* decomp_soc_detect(u32 dbgu_base)
> > +static inline const u32* decomp_soc_detect(void __iomem*dbgu_base)
> 
> A whitespace is missing before the *, no?
> 

Fixed now, thanks!

	Arnd

[PATCH 03/24] ARM: ebsa110: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-ebsa110/core.c |    8 ++++----
 arch/arm/mach-ebsa110/core.h |   12 ++++++------
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c
index 6f80686..f0fe6b5 100644
--- a/arch/arm/mach-ebsa110/core.c
+++ b/arch/arm/mach-ebsa110/core.c
@@ -74,22 +74,22 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
 	 * sparse external-decode ISAIO space
 	 */
 	{	/* IRQ_STAT/IRQ_MCLR */
-		.virtual	= IRQ_STAT,
+		.virtual	= (unsigned long)IRQ_STAT,
 		.pfn		= __phys_to_pfn(TRICK4_PHYS),
 		.length		= TRICK4_SIZE,
 		.type		= MT_DEVICE
 	}, {	/* IRQ_MASK/IRQ_MSET */
-		.virtual	= IRQ_MASK,
+		.virtual	= (unsigned long)IRQ_MASK,
 		.pfn		= __phys_to_pfn(TRICK3_PHYS),
 		.length		= TRICK3_SIZE,
 		.type		= MT_DEVICE
 	}, {	/* SOFT_BASE */
-		.virtual	= SOFT_BASE,
+		.virtual	= (unsigned long)SOFT_BASE,
 		.pfn		= __phys_to_pfn(TRICK1_PHYS),
 		.length		= TRICK1_SIZE,
 		.type		= MT_DEVICE
 	}, {	/* PIT_BASE */
-		.virtual	= PIT_BASE,
+		.virtual	= (unsigned long)PIT_BASE,
 		.pfn		= __phys_to_pfn(TRICK0_PHYS),
 		.length		= TRICK0_SIZE,
 		.type		= MT_DEVICE
diff --git a/arch/arm/mach-ebsa110/core.h b/arch/arm/mach-ebsa110/core.h
index c93c9e4..afe137e 100644
--- a/arch/arm/mach-ebsa110/core.h
+++ b/arch/arm/mach-ebsa110/core.h
@@ -31,11 +31,11 @@
 #define TRICK7_PHYS		0xf3c00000
 
 /* Virtual addresses */
-#define PIT_BASE		0xfc000000	/* trick 0 */
-#define SOFT_BASE		0xfd000000	/* trick 1 */
-#define IRQ_MASK		0xfe000000	/* trick 3 - read */
-#define IRQ_MSET		0xfe000000	/* trick 3 - write */
-#define IRQ_STAT		0xff000000	/* trick 4 - read */
-#define IRQ_MCLR		0xff000000	/* trick 4 - write */
+#define PIT_BASE		IOMEM(0xfc000000)	/* trick 0 */
+#define SOFT_BASE		IOMEM(0xfd000000)	/* trick 1 */
+#define IRQ_MASK		IOMEM(0xfe000000)	/* trick 3 - read */
+#define IRQ_MSET		IOMEM(0xfe000000)	/* trick 3 - write */
+#define IRQ_STAT		IOMEM(0xff000000)	/* trick 4 - read */
+#define IRQ_MCLR		IOMEM(0xff000000)	/* trick 4 - write */
 
 #endif
-- 
1.7.10

[PATCH 04/24] ARM: ep93xx: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-ep93xx/include/mach/ts72xx.h |   10 +++++-----
 arch/arm/mach-ep93xx/ts72xx.c              |   10 +++++-----
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
index f1397a1..071feaa 100644
--- a/arch/arm/mach-ep93xx/include/mach/ts72xx.h
+++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
@@ -14,7 +14,7 @@
  */
 
 #define TS72XX_MODEL_PHYS_BASE		0x22000000
-#define TS72XX_MODEL_VIRT_BASE		0xfebff000
+#define TS72XX_MODEL_VIRT_BASE		IOMEM(0xfebff000)
 #define TS72XX_MODEL_SIZE		0x00001000
 
 #define TS72XX_MODEL_TS7200		0x00
@@ -26,7 +26,7 @@
 
 
 #define TS72XX_OPTIONS_PHYS_BASE	0x22400000
-#define TS72XX_OPTIONS_VIRT_BASE	0xfebfe000
+#define TS72XX_OPTIONS_VIRT_BASE	IOMEM(0xfebfe000)
 #define TS72XX_OPTIONS_SIZE		0x00001000
 
 #define TS72XX_OPTIONS_COM2_RS485	0x02
@@ -34,18 +34,18 @@
 
 
 #define TS72XX_OPTIONS2_PHYS_BASE	0x22800000
-#define TS72XX_OPTIONS2_VIRT_BASE	0xfebfd000
+#define TS72XX_OPTIONS2_VIRT_BASE	IOMEM(0xfebfd000)
 #define TS72XX_OPTIONS2_SIZE		0x00001000
 
 #define TS72XX_OPTIONS2_TS9420		0x04
 #define TS72XX_OPTIONS2_TS9420_BOOT	0x02
 
 
-#define TS72XX_RTC_INDEX_VIRT_BASE	0xfebf9000
+#define TS72XX_RTC_INDEX_VIRT_BASE	IOMEM(0xfebf9000)
 #define TS72XX_RTC_INDEX_PHYS_BASE	0x10800000
 #define TS72XX_RTC_INDEX_SIZE		0x00001000
 
-#define TS72XX_RTC_DATA_VIRT_BASE	0xfebf8000
+#define TS72XX_RTC_DATA_VIRT_BASE	IOMEM(0xfebf8000)
 #define TS72XX_RTC_DATA_PHYS_BASE	0x11700000
 #define TS72XX_RTC_DATA_SIZE		0x00001000
 
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 75cab2d..faa5bdd 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -32,27 +32,27 @@
 
 static struct map_desc ts72xx_io_desc[] __initdata = {
 	{
-		.virtual	= TS72XX_MODEL_VIRT_BASE,
+		.virtual	= (unsigned long)TS72XX_MODEL_VIRT_BASE,
 		.pfn		= __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
 		.length		= TS72XX_MODEL_SIZE,
 		.type		= MT_DEVICE,
 	}, {
-		.virtual	= TS72XX_OPTIONS_VIRT_BASE,
+		.virtual	= (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
 		.pfn		= __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
 		.length		= TS72XX_OPTIONS_SIZE,
 		.type		= MT_DEVICE,
 	}, {
-		.virtual	= TS72XX_OPTIONS2_VIRT_BASE,
+		.virtual	= (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
 		.pfn		= __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
 		.length		= TS72XX_OPTIONS2_SIZE,
 		.type		= MT_DEVICE,
 	}, {
-		.virtual	= TS72XX_RTC_INDEX_VIRT_BASE,
+		.virtual	= (unsigned long)TS72XX_RTC_INDEX_VIRT_BASE,
 		.pfn		= __phys_to_pfn(TS72XX_RTC_INDEX_PHYS_BASE),
 		.length		= TS72XX_RTC_INDEX_SIZE,
 		.type		= MT_DEVICE,
 	}, {
-		.virtual	= TS72XX_RTC_DATA_VIRT_BASE,
+		.virtual	= (unsigned long)TS72XX_RTC_DATA_VIRT_BASE,
 		.pfn		= __phys_to_pfn(TS72XX_RTC_DATA_PHYS_BASE),
 		.length		= TS72XX_RTC_DATA_SIZE,
 		.type		= MT_DEVICE,
-- 
1.7.10

Re: [PATCH 04/24] ARM: ep93xx: use __iomem pointers for MMIO

[Ryan Mallon]

On 15/09/12 07:34, Arnd Bergmann wrote:

> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
> 
> Cc: Hartley Sweeten <hsweeten@visionengravers.com>
> Cc: Ryan Mallon <rmallon@gmail.com>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>


Hi Arnd,

Do you want me to queue both this and my patch to move the 
ts72xx.h header into arch/arm/mach-ep93xx on to my ep93xx-fixes
branch? That way you won't have to deal with any conflicts at
your end.

Thanks,
~Ryan

> ---
>  arch/arm/mach-ep93xx/include/mach/ts72xx.h |   10 +++++-----
>  arch/arm/mach-ep93xx/ts72xx.c              |   10 +++++-----
>  2 files changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
> index f1397a1..071feaa 100644
> --- a/arch/arm/mach-ep93xx/include/mach/ts72xx.h
> +++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
> @@ -14,7 +14,7 @@
>   */
>  
>  #define TS72XX_MODEL_PHYS_BASE		0x22000000
> -#define TS72XX_MODEL_VIRT_BASE		0xfebff000
> +#define TS72XX_MODEL_VIRT_BASE		IOMEM(0xfebff000)
>  #define TS72XX_MODEL_SIZE		0x00001000
>  
>  #define TS72XX_MODEL_TS7200		0x00
> @@ -26,7 +26,7 @@
>  
>  
>  #define TS72XX_OPTIONS_PHYS_BASE	0x22400000
> -#define TS72XX_OPTIONS_VIRT_BASE	0xfebfe000
> +#define TS72XX_OPTIONS_VIRT_BASE	IOMEM(0xfebfe000)
>  #define TS72XX_OPTIONS_SIZE		0x00001000
>  
>  #define TS72XX_OPTIONS_COM2_RS485	0x02
> @@ -34,18 +34,18 @@
>  
>  
>  #define TS72XX_OPTIONS2_PHYS_BASE	0x22800000
> -#define TS72XX_OPTIONS2_VIRT_BASE	0xfebfd000
> +#define TS72XX_OPTIONS2_VIRT_BASE	IOMEM(0xfebfd000)
>  #define TS72XX_OPTIONS2_SIZE		0x00001000
>  
>  #define TS72XX_OPTIONS2_TS9420		0x04
>  #define TS72XX_OPTIONS2_TS9420_BOOT	0x02
>  
>  
> -#define TS72XX_RTC_INDEX_VIRT_BASE	0xfebf9000
> +#define TS72XX_RTC_INDEX_VIRT_BASE	IOMEM(0xfebf9000)
>  #define TS72XX_RTC_INDEX_PHYS_BASE	0x10800000
>  #define TS72XX_RTC_INDEX_SIZE		0x00001000
>  
> -#define TS72XX_RTC_DATA_VIRT_BASE	0xfebf8000
> +#define TS72XX_RTC_DATA_VIRT_BASE	IOMEM(0xfebf8000)
>  #define TS72XX_RTC_DATA_PHYS_BASE	0x11700000
>  #define TS72XX_RTC_DATA_SIZE		0x00001000
>  
> diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
> index 75cab2d..faa5bdd 100644
> --- a/arch/arm/mach-ep93xx/ts72xx.c
> +++ b/arch/arm/mach-ep93xx/ts72xx.c
> @@ -32,27 +32,27 @@
>  
>  static struct map_desc ts72xx_io_desc[] __initdata = {
>  	{
> -		.virtual	= TS72XX_MODEL_VIRT_BASE,
> +		.virtual	= (unsigned long)TS72XX_MODEL_VIRT_BASE,
>  		.pfn		= __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
>  		.length		= TS72XX_MODEL_SIZE,
>  		.type		= MT_DEVICE,
>  	}, {
> -		.virtual	= TS72XX_OPTIONS_VIRT_BASE,
> +		.virtual	= (unsigned long)TS72XX_OPTIONS_VIRT_BASE,
>  		.pfn		= __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
>  		.length		= TS72XX_OPTIONS_SIZE,
>  		.type		= MT_DEVICE,
>  	}, {
> -		.virtual	= TS72XX_OPTIONS2_VIRT_BASE,
> +		.virtual	= (unsigned long)TS72XX_OPTIONS2_VIRT_BASE,
>  		.pfn		= __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
>  		.length		= TS72XX_OPTIONS2_SIZE,
>  		.type		= MT_DEVICE,
>  	}, {
> -		.virtual	= TS72XX_RTC_INDEX_VIRT_BASE,
> +		.virtual	= (unsigned long)TS72XX_RTC_INDEX_VIRT_BASE,
>  		.pfn		= __phys_to_pfn(TS72XX_RTC_INDEX_PHYS_BASE),
>  		.length		= TS72XX_RTC_INDEX_SIZE,
>  		.type		= MT_DEVICE,
>  	}, {
> -		.virtual	= TS72XX_RTC_DATA_VIRT_BASE,
> +		.virtual	= (unsigned long)TS72XX_RTC_DATA_VIRT_BASE,
>  		.pfn		= __phys_to_pfn(TS72XX_RTC_DATA_PHYS_BASE),
>  		.length		= TS72XX_RTC_DATA_SIZE,
>  		.type		= MT_DEVICE,

Re: [PATCH 04/24] ARM: ep93xx: use __iomem pointers for MMIO

[Arnd Bergmann]

On Friday 14 September 2012, Ryan Mallon wrote:
> On 15/09/12 07:34, Arnd Bergmann wrote:
> 
> > ARM is moving to stricter checks on readl/write functions,
> > so we need to use the correct types everywhere.
> > 
> > Cc: Hartley Sweeten <hsweeten@visionengravers.com>
> > Cc: Ryan Mallon <rmallon@gmail.com>
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> 
> 
> Hi Arnd,
> 
> Do you want me to queue both this and my patch to move the 
> ts72xx.h header into arch/arm/mach-ep93xx on to my ep93xx-fixes
> branch? That way you won't have to deal with any conflicts at
> your end.
> 

Yes, that would be great, thanks!

	Arnd

[PATCH 05/24] ARM: imx: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

This found a bug in mach-armadillo5x0.c, where we attempt mmio
on the MXC_CCM_RCSR address that is currently defined to 0xc
and consequently causes an illegal address access.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>

---
 arch/arm/mach-imx/mach-armadillo5x0.c |    2 +-
 arch/arm/mach-imx/mach-kzm_arm11_01.c |    4 ++--
 arch/arm/mach-imx/mach-mx31ads.c      |    2 +-
 arch/arm/mach-imx/mach-mx31lite.c     |    2 +-
 arch/arm/plat-mxc/include/mach/mx31.h |    6 +++---
 5 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 2c6ab32..c9a9653 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -526,7 +526,7 @@ static void __init armadillo5x0_init(void)
 	imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
 
 	/* set NAND page size to 2k if not configured via boot mode pins */
-	__raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
+	/* FIXME __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); */
 
 	/* RTC */
 	/* Get RTC IRQ and register the chip */
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c
index 5d08533..4b9b7aa 100644
--- a/arch/arm/mach-imx/mach-kzm_arm11_01.c
+++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c
@@ -259,13 +259,13 @@ static void __init kzm_board_init(void)
  */
 static struct map_desc kzm_io_desc[] __initdata = {
 	{
-		.virtual	= MX31_CS4_BASE_ADDR_VIRT,
+		.virtual	= (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
 		.pfn		= __phys_to_pfn(MX31_CS4_BASE_ADDR),
 		.length		= MX31_CS4_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= MX31_CS5_BASE_ADDR_VIRT,
+		.virtual	= (unsigned long)MX31_CS5_BASE_ADDR_VIRT,
 		.pfn		= __phys_to_pfn(MX31_CS5_BASE_ADDR),
 		.length		= MX31_CS5_SIZE,
 		.type		= MT_DEVICE
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index d37f480..e774b07 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -540,7 +540,7 @@ static void __init mxc_init_audio(void)
  */
 static struct map_desc mx31ads_io_desc[] __initdata = {
 	{
-		.virtual	= MX31_CS4_BASE_ADDR_VIRT,
+		.virtual	= (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
 		.pfn		= __phys_to_pfn(MX31_CS4_BASE_ADDR),
 		.length		= CS4_CS8900_MMIO_START,
 		.type		= MT_DEVICE
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c
index c8785b3..ef57cff 100644
--- a/arch/arm/mach-imx/mach-mx31lite.c
+++ b/arch/arm/mach-imx/mach-mx31lite.c
@@ -207,7 +207,7 @@ static struct platform_device physmap_flash_device = {
  */
 static struct map_desc mx31lite_io_desc[] __initdata = {
 	{
-		.virtual = MX31_CS4_BASE_ADDR_VIRT,
+		.virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
 		.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
 		.length = MX31_CS4_SIZE,
 		.type = MT_DEVICE
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index dbced61..ee9b1f9 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -76,7 +76,7 @@
 #define MX31_RTIC_BASE_ADDR			(MX31_AIPS2_BASE_ADDR + 0xec000)
 
 #define MX31_ROMP_BASE_ADDR		0x60000000
-#define MX31_ROMP_BASE_ADDR_VIRT	0xfc500000
+#define MX31_ROMP_BASE_ADDR_VIRT	IOMEM(0xfc500000)
 #define MX31_ROMP_SIZE			SZ_1M
 
 #define MX31_AVIC_BASE_ADDR		0x68000000
@@ -92,11 +92,11 @@
 #define MX31_CS3_BASE_ADDR		0xb2000000
 
 #define MX31_CS4_BASE_ADDR		0xb4000000
-#define MX31_CS4_BASE_ADDR_VIRT		0xf6000000
+#define MX31_CS4_BASE_ADDR_VIRT		IOMEM(0xf6000000)
 #define MX31_CS4_SIZE			SZ_32M
 
 #define MX31_CS5_BASE_ADDR		0xb6000000
-#define MX31_CS5_BASE_ADDR_VIRT		0xf8000000
+#define MX31_CS5_BASE_ADDR_VIRT		IOMEM(0xf8000000)
 #define MX31_CS5_SIZE			SZ_32M
 
 #define MX31_X_MEMC_BASE_ADDR		0xb8000000
-- 
1.7.10

Re: [PATCH 05/24] ARM: imx: use __iomem pointers for MMIO

[Fabio Estevam]

On Fri, Sep 14, 2012 at 6:34 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
>
> This found a bug in mach-armadillo5x0.c, where we attempt mmio
> on the MXC_CCM_RCSR address that is currently defined to 0xc
> and consequently causes an illegal address access.
...

>         /* set NAND page size to 2k if not configured via boot mode pins */
> -       __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
> +       /* FIXME __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); */

Good catch, the correct access would be:
__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) ...

I will fix this after your series reaches linux-next.

Regards,

Fabio Estevam

Re: [PATCH 05/24] ARM: imx: use __iomem pointers for MMIO

[Arnd Bergmann]

On Friday 14 September 2012, Fabio Estevam wrote:
> On Fri, Sep 14, 2012 at 6:34 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> > ARM is moving to stricter checks on readl/write functions,
> > so we need to use the correct types everywhere.
> >
> > This found a bug in mach-armadillo5x0.c, where we attempt mmio
> > on the MXC_CCM_RCSR address that is currently defined to 0xc
> > and consequently causes an illegal address access.
> ...
> 
> >         /* set NAND page size to 2k if not configured via boot mode pins */
> > -       __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
> > +       /* FIXME __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); */
> 
> Good catch, the correct access would be:
> __raw_readl(mx3_ccm_base + MXC_CCM_RCSR) ...
> 
> I will fix this after your series reaches linux-next.
> 

I think I'd prefer it if you can fix it on the current kernel. This seems to
be a serious bug that we actually want to fix in 3.6 or maybe backport to
the stable series (I don't know when it was introduced). I'll just drop
this hunk from my patch then.

	Arnd

Re: [PATCH 05/24] ARM: imx: use __iomem pointers for MMIO

[Sascha Hauer]

On Sat, Sep 15, 2012 at 05:42:41PM +0000, Arnd Bergmann wrote:
> On Friday 14 September 2012, Fabio Estevam wrote:
> > On Fri, Sep 14, 2012 at 6:34 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> > > ARM is moving to stricter checks on readl/write functions,
> > > so we need to use the correct types everywhere.
> > >
> > > This found a bug in mach-armadillo5x0.c, where we attempt mmio
> > > on the MXC_CCM_RCSR address that is currently defined to 0xc
> > > and consequently causes an illegal address access.
> > ...
> > 
> > >         /* set NAND page size to 2k if not configured via boot mode pins */
> > > -       __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
> > > +       /* FIXME __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); */
> > 
> > Good catch, the correct access would be:
> > __raw_readl(mx3_ccm_base + MXC_CCM_RCSR) ...
> > 
> > I will fix this after your series reaches linux-next.
> > 
> 
> I think I'd prefer it if you can fix it on the current kernel. This seems to
> be a serious bug that we actually want to fix in 3.6 or maybe backport to
> the stable series (I don't know when it was introduced). I'll just drop
> this hunk from my patch then.

This was introduced between 3.4 and 3,5 with:

commit eb92044eb3d59d29c9812e85e3a4bf41f6f38e3a
Author: Sascha Hauer <s.hauer@pengutronix.de>
Date:   Tue Apr 3 12:42:27 2012 +0200

    ARM i.MX3: Make ccm base address a variable
    
    Instead of having a cpu_is_* in each ccm register access it
    is more efficient to make it a variable.
    
    Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>


-- 
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[PATCH 06/24] ARM: integrator: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

This patch has a few small conflicts with stuff in linux-next, which
we have to sort out in arm-soc.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-integrator/core.c          |    4 ++--
 arch/arm/mach-integrator/cpu.c           |    8 ++++----
 arch/arm/mach-integrator/integrator_ap.c |   12 ++++++------
 arch/arm/mach-integrator/integrator_cp.c |    6 +++---
 arch/arm/mach-integrator/pci_v3.c        |   12 ++++++------
 5 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 3fa6c51..a432d43 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -95,8 +95,8 @@ arch_initcall(integrator_init);
  *  UART0  7    6
  *  UART1  5    4
  */
-#define SC_CTRLC	IO_ADDRESS(INTEGRATOR_SC_CTRLC)
-#define SC_CTRLS	IO_ADDRESS(INTEGRATOR_SC_CTRLS)
+#define SC_CTRLC	__io_address(INTEGRATOR_SC_CTRLC)
+#define SC_CTRLS	__io_address(INTEGRATOR_SC_CTRLS)
 
 static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
 {
diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c
index fbb4577..590c192 100644
--- a/arch/arm/mach-integrator/cpu.c
+++ b/arch/arm/mach-integrator/cpu.c
@@ -25,10 +25,10 @@
 
 static struct cpufreq_driver integrator_driver;
 
-#define CM_ID  	IO_ADDRESS(INTEGRATOR_HDR_ID)
-#define CM_OSC	IO_ADDRESS(INTEGRATOR_HDR_OSC)
-#define CM_STAT IO_ADDRESS(INTEGRATOR_HDR_STAT)
-#define CM_LOCK IO_ADDRESS(INTEGRATOR_HDR_LOCK)
+#define CM_ID  	__io_address(INTEGRATOR_HDR_ID)
+#define CM_OSC	__io_address(INTEGRATOR_HDR_OSC)
+#define CM_STAT __io_address(INTEGRATOR_HDR_STAT)
+#define CM_LOCK __io_address(INTEGRATOR_HDR_LOCK)
 
 static const struct icst_params lclk_params = {
 	.ref		= 24000000,
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 3b22675..c8e448e 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -133,17 +133,17 @@ static struct map_desc ap_io_desc[] __initdata = {
 		.length		= SZ_4K,
 		.type		= MT_DEVICE
 	}, {
-		.virtual	= PCI_MEMORY_VADDR,
+		.virtual	= (unsigned long)PCI_MEMORY_VADDR,
 		.pfn		= __phys_to_pfn(PHYS_PCI_MEM_BASE),
 		.length		= SZ_16M,
 		.type		= MT_DEVICE
 	}, {
-		.virtual	= PCI_CONFIG_VADDR,
+		.virtual	= (unsigned long)PCI_CONFIG_VADDR,
 		.pfn		= __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
 		.length		= SZ_16M,
 		.type		= MT_DEVICE
 	}, {
-		.virtual	= PCI_V3_VADDR,
+		.virtual	= (unsigned long)PCI_V3_VADDR,
 		.pfn		= __phys_to_pfn(PHYS_PCI_V3_BASE),
 		.length		= SZ_64K,
 		.type		= MT_DEVICE
@@ -317,9 +317,9 @@ static void __init ap_init(void)
 /*
  * Where is the timer (VA)?
  */
-#define TIMER0_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER0_BASE)
-#define TIMER1_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER1_BASE)
-#define TIMER2_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER2_BASE)
+#define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
+#define TIMER1_VA_BASE __io_address(INTEGRATOR_TIMER1_BASE)
+#define TIMER2_VA_BASE __io_address(INTEGRATOR_TIMER2_BASE)
 
 static unsigned long timer_reload;
 
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 82d5c83..3df5fc3 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -59,7 +59,7 @@
 
 #define INTCP_ETH_SIZE			0x10
 
-#define INTCP_VA_CTRL_BASE		IO_ADDRESS(INTEGRATOR_CP_CTL_BASE)
+#define INTCP_VA_CTRL_BASE		__io_address(INTEGRATOR_CP_CTL_BASE)
 #define INTCP_FLASHPROG			0x04
 #define CINTEGRATOR_FLASHPROG_FLVPPEN	(1 << 0)
 #define CINTEGRATOR_FLASHPROG_FLWREN	(1 << 1)
@@ -265,8 +265,8 @@ static struct platform_device *intcp_devs[] __initdata = {
  */
 static unsigned int mmc_status(struct device *dev)
 {
-	unsigned int status = readl(IO_ADDRESS(0xca000000 + 4));
-	writel(8, IO_ADDRESS(INTEGRATOR_CP_CTL_BASE + 8));
+	unsigned int status = readl(__io_address(0xca000000 + 4));
+	writel(8, __io_address(INTEGRATOR_CP_CTL_BASE + 8));
 
 	return status & 8;
 }
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index b866880..e6145a85 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -181,7 +181,7 @@ static DEFINE_RAW_SPINLOCK(v3_lock);
 #undef V3_LB_BASE_PREFETCH
 #define V3_LB_BASE_PREFETCH 0
 
-static unsigned long v3_open_config_window(struct pci_bus *bus,
+static void __iomem *v3_open_config_window(struct pci_bus *bus,
 					   unsigned int devfn, int offset)
 {
 	unsigned int address, mapaddress, busnr;
@@ -280,7 +280,7 @@ static void v3_close_config_window(void)
 static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 			  int size, u32 *val)
 {
-	unsigned long addr;
+	void __iomem *addr;
 	unsigned long flags;
 	u32 v;
 
@@ -311,7 +311,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
 static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,
 			   int size, u32 val)
 {
-	unsigned long addr;
+	void __iomem *addr;
 	unsigned long flags;
 
 	raw_spin_lock_irqsave(&v3_lock, flags);
@@ -391,9 +391,9 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys)
  * means I can't get additional information on the reason for the pm2fb
  * problems.  I suppose I'll just have to mind-meld with the machine. ;)
  */
-#define SC_PCI     IO_ADDRESS(INTEGRATOR_SC_PCIENABLE)
-#define SC_LBFADDR IO_ADDRESS(INTEGRATOR_SC_BASE + 0x20)
-#define SC_LBFCODE IO_ADDRESS(INTEGRATOR_SC_BASE + 0x24)
+#define SC_PCI     __io_address(INTEGRATOR_SC_PCIENABLE)
+#define SC_LBFADDR __io_address(INTEGRATOR_SC_BASE + 0x20)
+#define SC_LBFCODE __io_address(INTEGRATOR_SC_BASE + 0x24)
 
 static int
 v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
-- 
1.7.10

Re: [PATCH 06/24] ARM: integrator: use __iomem pointers for MMIO

[Linus Walleij]

On Fri, Sep 14, 2012 at 11:34 PM, Arnd Bergmann <arnd@arndb.de> wrote:

> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
>
> This patch has a few small conflicts with stuff in linux-next, which
> we have to sort out in arm-soc.
>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Russell King <linux@arm.linux.org.uk>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Acked-by: Linus Walleij <linus.walleij@linaro.org>

However if Russell applies some of the stuff that is pending
in his tracker (was pending uncertain acceptance of
CONFIG_ATAGS, which is merged now) this will likely
conflict.

Yours,
Linus Walleij

Re: [PATCH 06/24] ARM: integrator: use __iomem pointers for MMIO

[Russell King - ARM Linux]

On Mon, Sep 17, 2012 at 12:19:11AM +0200, Linus Walleij wrote:
> On Fri, Sep 14, 2012 at 11:34 PM, Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > ARM is moving to stricter checks on readl/write functions,
> > so we need to use the correct types everywhere.
> >
> > This patch has a few small conflicts with stuff in linux-next, which
> > we have to sort out in arm-soc.
> >
> > Cc: Linus Walleij <linus.walleij@linaro.org>
> > Cc: Russell King <linux@arm.linux.org.uk>
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> 
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> 
> However if Russell applies some of the stuff that is pending
> in his tracker (was pending uncertain acceptance of
> CONFIG_ATAGS, which is merged now) this will likely
> conflict.

I'm actually a little confused... 7514/1 apparantly has a comment from
me on it, but I don't remember making any comments against it - and the
comment is definitely crap for the patch.  I certainly wasn't processing
patches at 20:38 on Friday 7th, so, I'm wondering what's going on there.

Re: [PATCH 06/24] ARM: integrator: use __iomem pointers for MMIO

[Linus Walleij]

On Mon, Sep 17, 2012 at 12:35 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
> On Mon, Sep 17, 2012 at 12:19:11AM +0200, Linus Walleij wrote:
>>
>> However if Russell applies some of the stuff that is pending
>> in his tracker (was pending uncertain acceptance of
>> CONFIG_ATAGS, which is merged now) this will likely
>> conflict.
>
> I'm actually a little confused... 7514/1 apparantly has a comment from
> me on it, but I don't remember making any comments against it - and the
> comment is definitely crap for the patch.  I certainly wasn't processing
> patches at 20:38 on Friday 7th, so, I'm wondering what's going on there.

I'm as confused as you are :-(

On some of the other patches I added a changelog, but this
one doesn't have one, and I don't remember seeing that comment
until now.

Do you want me to resubmit it as 7514/2?

Yours,
Linus Walleij

Re: [PATCH 06/24] ARM: integrator: use __iomem pointers for MMIO

[Russell King - ARM Linux]

On Mon, Sep 17, 2012 at 12:46:21AM +0200, Linus Walleij wrote:
> On Mon, Sep 17, 2012 at 12:35 AM, Russell King - ARM Linux
> <linux@arm.linux.org.uk> wrote:
> > On Mon, Sep 17, 2012 at 12:19:11AM +0200, Linus Walleij wrote:
> >>
> >> However if Russell applies some of the stuff that is pending
> >> in his tracker (was pending uncertain acceptance of
> >> CONFIG_ATAGS, which is merged now) this will likely
> >> conflict.
> >
> > I'm actually a little confused... 7514/1 apparantly has a comment from
> > me on it, but I don't remember making any comments against it - and the
> > comment is definitely crap for the patch.  I certainly wasn't processing
> > patches at 20:38 on Friday 7th, so, I'm wondering what's going on there.
> 
> I'm as confused as you are :-(
> 
> On some of the other patches I added a changelog, but this
> one doesn't have one, and I don't remember seeing that comment
> until now.
> 
> Do you want me to resubmit it as 7514/2?

No, I'll delete the comment and just apply it as is.

[PATCH 07/24] ARM: iop13xx: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-iop13xx/include/mach/iop13xx.h |   20 +++++++++-----------
 arch/arm/mach-iop13xx/include/mach/memory.h  |   14 +++++++-------
 arch/arm/mach-iop13xx/io.c                   |   12 ++++++------
 arch/arm/mach-iop13xx/pci.c                  |   16 +++++++---------
 arch/arm/mach-iop13xx/pci.h                  |    4 ++--
 arch/arm/mach-iop13xx/setup.c                |   10 +++++-----
 6 files changed, 36 insertions(+), 40 deletions(-)

diff --git a/arch/arm/mach-iop13xx/include/mach/iop13xx.h b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
index e190dcd..01b41ab 100644
--- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h
+++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h
@@ -148,18 +148,16 @@ extern unsigned long get_iop_tick_rate(void);
  * IOP13XX chipset registers
  */
 #define IOP13XX_PMMR_PHYS_MEM_BASE	   0xffd80000UL  /* PMMR phys. address */
-#define IOP13XX_PMMR_VIRT_MEM_BASE	   0xfee80000UL  /* PMMR phys. address */
+#define IOP13XX_PMMR_VIRT_MEM_BASE	   (void __iomem *)(0xfee80000UL)  /* PMMR phys. address */
 #define IOP13XX_PMMR_MEM_WINDOW_SIZE	   0x80000
 #define IOP13XX_PMMR_UPPER_MEM_VA	   (IOP13XX_PMMR_VIRT_MEM_BASE +\
 					   IOP13XX_PMMR_MEM_WINDOW_SIZE - 1)
 #define IOP13XX_PMMR_UPPER_MEM_PA	   (IOP13XX_PMMR_PHYS_MEM_BASE +\
 					   IOP13XX_PMMR_MEM_WINDOW_SIZE - 1)
-#define IOP13XX_PMMR_VIRT_TO_PHYS(addr)   (u32) ((u32) addr +\
-					   (IOP13XX_PMMR_PHYS_MEM_BASE\
-					   - IOP13XX_PMMR_VIRT_MEM_BASE))
-#define IOP13XX_PMMR_PHYS_TO_VIRT(addr)   (u32) ((u32) addr -\
-					   (IOP13XX_PMMR_PHYS_MEM_BASE\
-					   - IOP13XX_PMMR_VIRT_MEM_BASE))
+#define IOP13XX_PMMR_VIRT_TO_PHYS(addr)   (((addr) - IOP13XX_PMMR_VIRT_MEM_BASE)\
+					   + IOP13XX_PMMR_PHYS_MEM_BASE)
+#define IOP13XX_PMMR_PHYS_TO_VIRT(addr)   (((addr) - IOP13XX_PMMR_PHYS_MEM_BASE)\
+					   + IOP13XX_PMMR_VIRT_MEM_BASE)
 #define IOP13XX_REG_ADDR32(reg)     	   (IOP13XX_PMMR_VIRT_MEM_BASE + (reg))
 #define IOP13XX_REG_ADDR16(reg)     	   (IOP13XX_PMMR_VIRT_MEM_BASE + (reg))
 #define IOP13XX_REG_ADDR8(reg)      	   (IOP13XX_PMMR_VIRT_MEM_BASE + (reg))
@@ -169,10 +167,10 @@ extern unsigned long get_iop_tick_rate(void);
 #define IOP13XX_PMMR_SIZE		   0x00080000
 
 /*=================== Defines for Platform Devices =====================*/
-#define IOP13XX_UART0_PHYS  (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002300)
-#define IOP13XX_UART1_PHYS  (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002340)
-#define IOP13XX_UART0_VIRT  (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002300)
-#define IOP13XX_UART1_VIRT  (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002340)
+#define IOP13XX_UART0_PHYS  (IOP13XX_PMMR_PHYS_MEM_BASE + 0x00002300)
+#define IOP13XX_UART1_PHYS  (IOP13XX_PMMR_PHYS_MEM_BASE + 0x00002340)
+#define IOP13XX_UART0_VIRT  (IOP13XX_PMMR_VIRT_MEM_BASE + 0x00002300)
+#define IOP13XX_UART1_VIRT  (IOP13XX_PMMR_VIRT_MEM_BASE + 0x00002340)
 
 #define IOP13XX_I2C0_PHYS   (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002500)
 #define IOP13XX_I2C1_PHYS   (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002520)
diff --git a/arch/arm/mach-iop13xx/include/mach/memory.h b/arch/arm/mach-iop13xx/include/mach/memory.h
index 1afa99e..7c032d0 100644
--- a/arch/arm/mach-iop13xx/include/mach/memory.h
+++ b/arch/arm/mach-iop13xx/include/mach/memory.h
@@ -16,12 +16,12 @@
 #define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE)
 #define IOP13XX_PMMR_P_END   (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE)
 
-static inline dma_addr_t __virt_to_lbus(unsigned long x)
+static inline dma_addr_t __virt_to_lbus(void __iomem *x)
 {
 	return x + IOP13XX_PMMR_PHYS_MEM_BASE - IOP13XX_PMMR_VIRT_MEM_BASE;
 }
 
-static inline unsigned long __lbus_to_virt(dma_addr_t x)
+static inline void __iomem *__lbus_to_virt(dma_addr_t x)
 {
 	return x + IOP13XX_PMMR_VIRT_MEM_BASE - IOP13XX_PMMR_PHYS_MEM_BASE;
 }
@@ -38,23 +38,23 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
 
 #define __arch_dma_to_virt(dev, addr)					\
 	({								\
-		unsigned long __virt;					\
+		void * __virt;						\
 		dma_addr_t __dma = addr;				\
 		if (is_lbus_device(dev) && __is_lbus_dma(__dma))	\
 			__virt = __lbus_to_virt(__dma);			\
 		else							\
-			__virt = __phys_to_virt(__dma);			\
-		(void *)__virt;						\
+			__virt = (void *)__phys_to_virt(__dma);		\
+		__virt;							\
 	})
 
 #define __arch_virt_to_dma(dev, addr)					\
 	({								\
-		unsigned long __virt = (unsigned long)addr;		\
+		void * __virt = addr;					\
 		dma_addr_t __dma;					\
 		if (is_lbus_device(dev) && __is_lbus_virt(__virt))	\
 			__dma = __virt_to_lbus(__virt);			\
 		else							\
-			__dma = __virt_to_phys(__virt);			\
+			__dma = __virt_to_phys((unsigned long)__virt);	\
 		__dma;							\
 	})
 
diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c
index 3c36419..b651af9 100644
--- a/arch/arm/mach-iop13xx/io.c
+++ b/arch/arm/mach-iop13xx/io.c
@@ -52,14 +52,14 @@ static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
 		if (unlikely(!iop13xx_atux_mem_base))
 			retval = NULL;
 		else
-			retval = (void *)(iop13xx_atux_mem_base +
+			retval = (iop13xx_atux_mem_base +
 			         (cookie - IOP13XX_PCIX_LOWER_MEM_RA));
 		break;
 	case IOP13XX_PCIE_LOWER_MEM_RA ... IOP13XX_PCIE_UPPER_MEM_RA:
 		if (unlikely(!iop13xx_atue_mem_base))
 			retval = NULL;
 		else
-			retval = (void *)(iop13xx_atue_mem_base +
+			retval = (iop13xx_atue_mem_base +
 			         (cookie - IOP13XX_PCIE_LOWER_MEM_RA));
 		break;
 	case IOP13XX_PBI_LOWER_MEM_RA ... IOP13XX_PBI_UPPER_MEM_RA:
@@ -74,7 +74,7 @@ static void __iomem *__iop13xx_ioremap_caller(unsigned long cookie,
 		retval = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(cookie);
 		break;
 	case IOP13XX_PMMR_PHYS_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_PA:
-		retval = (void *) IOP13XX_PMMR_PHYS_TO_VIRT(cookie);
+		retval = IOP13XX_PMMR_PHYS_TO_VIRT(cookie);
 		break;
 	default:
 		retval = __arm_ioremap_caller(cookie, size, mtype,
@@ -99,9 +99,9 @@ static void __iop13xx_iounmap(volatile void __iomem *addr)
 		    goto skip;
 
 	switch ((u32) addr) {
-	case IOP13XX_PCIE_LOWER_IO_VA ... IOP13XX_PCIE_UPPER_IO_VA:
-	case IOP13XX_PCIX_LOWER_IO_VA ... IOP13XX_PCIX_UPPER_IO_VA:
-	case IOP13XX_PMMR_VIRT_MEM_BASE ... IOP13XX_PMMR_UPPER_MEM_VA:
+	case (u32)IOP13XX_PCIE_LOWER_IO_VA ... (u32)IOP13XX_PCIE_UPPER_IO_VA:
+	case (u32)IOP13XX_PCIX_LOWER_IO_VA ... (u32)IOP13XX_PCIX_UPPER_IO_VA:
+	case (u32)IOP13XX_PMMR_VIRT_MEM_BASE ... (u32)IOP13XX_PMMR_UPPER_MEM_VA:
 		goto skip;
 	}
 	__iounmap(addr);
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 861cb12..b38e97c 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -36,8 +36,8 @@ u32 iop13xx_atux_pmmr_offset; /* This offset can change based on strapping */
 u32 iop13xx_atue_pmmr_offset; /* This offset can change based on strapping */
 static struct pci_bus *pci_bus_atux = 0;
 static struct pci_bus *pci_bus_atue = 0;
-u32 iop13xx_atue_mem_base;
-u32 iop13xx_atux_mem_base;
+void __iomem *iop13xx_atue_mem_base;
+void __iomem *iop13xx_atux_mem_base;
 size_t iop13xx_atue_mem_size;
 size_t iop13xx_atux_mem_size;
 
@@ -88,8 +88,7 @@ void iop13xx_map_pci_memory(void)
 				}
 
 				if (end) {
-					iop13xx_atux_mem_base =
-					(u32) __arm_ioremap_pfn(
+					iop13xx_atux_mem_base = __arm_ioremap_pfn(
 					__phys_to_pfn(IOP13XX_PCIX_LOWER_MEM_PA)
 					, 0, iop13xx_atux_mem_size, MT_DEVICE);
 					if (!iop13xx_atux_mem_base) {
@@ -99,7 +98,7 @@ void iop13xx_map_pci_memory(void)
 					}
 				} else
 					iop13xx_atux_mem_size = 0;
-				PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
+				PRINTK("%s: atu: %d bus_size: %d mem_base: %p\n",
 				__func__, atu, iop13xx_atux_mem_size,
 				iop13xx_atux_mem_base);
 				break;
@@ -114,8 +113,7 @@ void iop13xx_map_pci_memory(void)
 				}
 
 				if (end) {
-					iop13xx_atue_mem_base =
-					(u32) __arm_ioremap_pfn(
+					iop13xx_atue_mem_base = __arm_ioremap_pfn(
 					__phys_to_pfn(IOP13XX_PCIE_LOWER_MEM_PA)
 					, 0, iop13xx_atue_mem_size, MT_DEVICE);
 					if (!iop13xx_atue_mem_base) {
@@ -125,13 +123,13 @@ void iop13xx_map_pci_memory(void)
 					}
 				} else
 					iop13xx_atue_mem_size = 0;
-				PRINTK("%s: atu: %d bus_size: %d mem_base: %x\n",
+				PRINTK("%s: atu: %d bus_size: %d mem_base: %p\n",
 				__func__, atu, iop13xx_atue_mem_size,
 				iop13xx_atue_mem_base);
 				break;
 			}
 
-			printk("%s: Initialized (%uM @ resource/virtual: %08lx/%08x)\n",
+			printk("%s: Initialized (%uM @ resource/virtual: %08lx/%p)\n",
 			atu ? "ATUE" : "ATUX",
 			(atu ? iop13xx_atue_mem_size : iop13xx_atux_mem_size) /
 			SZ_1M,
diff --git a/arch/arm/mach-iop13xx/pci.h b/arch/arm/mach-iop13xx/pci.h
index c70cf5b..d45a80b 100644
--- a/arch/arm/mach-iop13xx/pci.h
+++ b/arch/arm/mach-iop13xx/pci.h
@@ -1,6 +1,6 @@
 #include <linux/types.h>
 
-extern u32 iop13xx_atue_mem_base;
-extern u32 iop13xx_atux_mem_base;
+extern void __iomem *iop13xx_atue_mem_base;
+extern void __iomem *iop13xx_atux_mem_base;
 extern size_t iop13xx_atue_mem_size;
 extern size_t iop13xx_atux_mem_size;
diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c
index daabb1f..f5c2a22 100644
--- a/arch/arm/mach-iop13xx/setup.c
+++ b/arch/arm/mach-iop13xx/setup.c
@@ -36,7 +36,7 @@
  */
 static struct map_desc iop13xx_std_desc[] __initdata = {
 	{    /* mem mapped registers */
-		.virtual = IOP13XX_PMMR_VIRT_MEM_BASE,
+		.virtual = (unsigned long)IOP13XX_PMMR_VIRT_MEM_BASE,
 		.pfn 	 = __phys_to_pfn(IOP13XX_PMMR_PHYS_MEM_BASE),
 		.length  = IOP13XX_PMMR_SIZE,
 		.type	 = MT_DEVICE,
@@ -81,8 +81,8 @@ static struct resource iop13xx_uart1_resources[] = {
 
 static struct plat_serial8250_port iop13xx_uart0_data[] = {
 	{
-       .membase     = (char*)(IOP13XX_UART0_VIRT),
-       .mapbase     = (IOP13XX_UART0_PHYS),
+       .membase     = IOP13XX_UART0_VIRT,
+       .mapbase     = IOP13XX_UART0_PHYS,
        .irq         = IRQ_IOP13XX_UART0,
        .uartclk     = IOP13XX_UART_XTAL,
        .regshift    = 2,
@@ -94,8 +94,8 @@ static struct plat_serial8250_port iop13xx_uart0_data[] = {
 
 static struct plat_serial8250_port iop13xx_uart1_data[] = {
 	{
-       .membase     = (char*)(IOP13XX_UART1_VIRT),
-       .mapbase     = (IOP13XX_UART1_PHYS),
+       .membase     = IOP13XX_UART1_VIRT,
+       .mapbase     = IOP13XX_UART1_PHYS,
        .irq         = IRQ_IOP13XX_UART1,
        .uartclk     = IOP13XX_UART_XTAL,
        .regshift    = 2,
-- 
1.7.10

[PATCH 08/24] ARM: iop32x: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-iop32x/glantank.c                 |    2 +-
 arch/arm/mach-ixp4xx/common.c                   |    6 +++---
 arch/arm/mach-ixp4xx/include/mach/cpu.h         |    5 +++--
 arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h |    2 +-
 4 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index c15a100..02e20c3 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -183,7 +183,7 @@ static struct i2c_board_info __initdata glantank_i2c_devices[] = {
 
 static void glantank_power_off(void)
 {
-	__raw_writeb(0x01, 0xfe8d0004);
+	__raw_writeb(0x01, IOMEM(0xfe8d0004));
 
 	while (1)
 		;
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index a9f8094..8c9cd5d 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -53,17 +53,17 @@ static struct clock_event_device clockevent_ixp4xx;
  *************************************************************************/
 static struct map_desc ixp4xx_io_desc[] __initdata = {
 	{	/* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */
-		.virtual	= IXP4XX_PERIPHERAL_BASE_VIRT,
+		.virtual	= (unsigned long)IXP4XX_PERIPHERAL_BASE_VIRT,
 		.pfn		= __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS),
 		.length		= IXP4XX_PERIPHERAL_REGION_SIZE,
 		.type		= MT_DEVICE
 	}, {	/* Expansion Bus Config Registers */
-		.virtual	= IXP4XX_EXP_CFG_BASE_VIRT,
+		.virtual	= (unsigned long)IXP4XX_EXP_CFG_BASE_VIRT,
 		.pfn		= __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS),
 		.length		= IXP4XX_EXP_CFG_REGION_SIZE,
 		.type		= MT_DEVICE
 	}, {	/* PCI Registers */
-		.virtual	= IXP4XX_PCI_CFG_BASE_VIRT,
+		.virtual	= (unsigned long)IXP4XX_PCI_CFG_BASE_VIRT,
 		.pfn		= __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
 		.length		= IXP4XX_PCI_CFG_REGION_SIZE,
 		.type		= MT_DEVICE
diff --git a/arch/arm/mach-ixp4xx/include/mach/cpu.h b/arch/arm/mach-ixp4xx/include/mach/cpu.h
index b2ef65d..e3d5a2e 100644
--- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
+++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
@@ -14,6 +14,7 @@
 #ifndef __ASM_ARCH_CPU_H__
 #define __ASM_ARCH_CPU_H__
 
+#include <linux/io.h>
 #include <asm/cputype.h>
 
 /* Processor id value in CP15 Register 0 */
@@ -37,7 +38,7 @@
 
 static inline u32 ixp4xx_read_feature_bits(void)
 {
-	u32 val = ~*IXP4XX_EXP_CFG2;
+	u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
 
 	if (cpu_is_ixp42x_rev_a0())
 		return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP |
@@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
 
 static inline void ixp4xx_write_feature_bits(u32 value)
 {
-	*IXP4XX_EXP_CFG2 = ~value;
+	__raw_writel(~cpu_to_le32(value), IXP4XX_EXP_CFG2);
 }
 
 #endif  /* _ASM_ARCH_CPU_H */
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index 97c530f..2272f5a 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -92,7 +92,7 @@
 /*
  * Expansion Bus Controller registers.
  */
-#define IXP4XX_EXP_REG(x) ((volatile u32 *)(IXP4XX_EXP_CFG_BASE_VIRT+(x)))
+#define IXP4XX_EXP_REG(x) ((volatile u32 __iomem *)(IXP4XX_EXP_CFG_BASE_VIRT+(x)))
 
 #define IXP4XX_EXP_CS0      IXP4XX_EXP_REG(IXP4XX_EXP_CS0_OFFSET)
 #define IXP4XX_EXP_CS1      IXP4XX_EXP_REG(IXP4XX_EXP_CS1_OFFSET)
-- 
1.7.10

[PATCH 09/24] ARM: ixp4xx: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

At the moment, this patch conflicts with other patches in linux-next,
need to sort this out.

Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-ixp4xx/common.c                   |    2 +-
 arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h |    8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 8c9cd5d..fdf91a1 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -70,7 +70,7 @@ static struct map_desc ixp4xx_io_desc[] __initdata = {
 	},
 #ifdef CONFIG_DEBUG_LL
 	{	/* Debug UART mapping */
-		.virtual	= IXP4XX_DEBUG_UART_BASE_VIRT,
+		.virtual	= (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT,
 		.pfn		= __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
 		.length		= IXP4XX_DEBUG_UART_REGION_SIZE,
 		.type		= MT_DEVICE
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index 2272f5a..eb68b61 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -49,21 +49,21 @@
  * Expansion BUS Configuration registers
  */
 #define IXP4XX_EXP_CFG_BASE_PHYS	(0xC4000000)
-#define IXP4XX_EXP_CFG_BASE_VIRT	(0xFFBFE000)
+#define IXP4XX_EXP_CFG_BASE_VIRT	IOMEM(0xFFBFE000)
 #define IXP4XX_EXP_CFG_REGION_SIZE	(0x00001000)
 
 /*
  * PCI Config registers
  */
 #define IXP4XX_PCI_CFG_BASE_PHYS	(0xC0000000)
-#define	IXP4XX_PCI_CFG_BASE_VIRT	(0xFFBFF000)
+#define	IXP4XX_PCI_CFG_BASE_VIRT	IOMEM(0xFFBFF000)
 #define IXP4XX_PCI_CFG_REGION_SIZE	(0x00001000)
 
 /*
  * Peripheral space
  */
 #define IXP4XX_PERIPHERAL_BASE_PHYS	(0xC8000000)
-#define IXP4XX_PERIPHERAL_BASE_VIRT	(0xFFBEB000)
+#define IXP4XX_PERIPHERAL_BASE_VIRT	IOMEM(0xFFBEB000)
 #define IXP4XX_PERIPHERAL_REGION_SIZE	(0x00013000)
 
 /*
@@ -73,7 +73,7 @@
  * aligned so that it * can be used with the low-level debug code.
  */
 #define	IXP4XX_DEBUG_UART_BASE_PHYS	(0xC8000000)
-#define	IXP4XX_DEBUG_UART_BASE_VIRT	(0xffb00000)
+#define	IXP4XX_DEBUG_UART_BASE_VIRT	IOMEM(0xffb00000)
 #define	IXP4XX_DEBUG_UART_REGION_SIZE	(0x00001000)
 
 #define IXP4XX_EXP_CS0_OFFSET	0x00
-- 
1.7.10

Re: [PATCH 09/24] ARM: ixp4xx: use __iomem pointers for MMIO

[Krzysztof Halasa]

Arnd Bergmann <arnd@arndb.de> writes:

> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
>
> At the moment, this patch conflicts with other patches in linux-next,
> need to sort this out.

Very nice, I will take care of these 3 patches.
-- 
Krzysztof Halasa

Re: [PATCH 09/24] ARM: ixp4xx: use __iomem pointers for MMIO

[Krzysztof Halasa]

Krzysztof Halasa <khc@pm.waw.pl> writes:

>> At the moment, this patch conflicts with other patches in linux-next,
>> need to sort this out.
>
> Very nice, I will take care of these 3 patches.

I mean, just this one IXP4xx patch :-)
-- 
Krzysztof Halasa

Re: [PATCH 09/24] ARM: ixp4xx: use __iomem pointers for MMIO

[Arnd Bergmann]

On Tuesday 18 September 2012, Krzysztof Halasa wrote:
> Krzysztof Halasa <khc@pm.waw.pl> writes:
> 
> >> At the moment, this patch conflicts with other patches in linux-next,
> >> need to sort this out.
> >
> > Very nice, I will take care of these 3 patches.
> 
> I mean, just this one IXP4xx patch :-)

Ok. I just noticed that I made a mistake in splitting up the changes between
iop32x and ixp4xx. I've corrected this in my tree now and fixed the bug you
pointed out, see the new version below. I'm not completely sure how to
proceed with this. I noticed you have some patches in linux-next but haven't
sent any pull requests yet. The merge window is getting closer, so I'd
like to come to a conclusion with this.

	Arnd

8<----
>From 13ec32f47cb42cecc9cd262c307ef9377c601007 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Fri, 14 Sep 2012 20:19:40 +0000
Subject: [PATCH] ARM: ixp4xx: use __iomem pointers for MMIO

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

At the moment, this patch conflicts with other patches in linux-next,
need to sort this out.

Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index a9f8094..fdf91a1 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -53,24 +53,24 @@ static struct clock_event_device clockevent_ixp4xx;
  *************************************************************************/
 static struct map_desc ixp4xx_io_desc[] __initdata = {
 	{	/* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */
-		.virtual	= IXP4XX_PERIPHERAL_BASE_VIRT,
+		.virtual	= (unsigned long)IXP4XX_PERIPHERAL_BASE_VIRT,
 		.pfn		= __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS),
 		.length		= IXP4XX_PERIPHERAL_REGION_SIZE,
 		.type		= MT_DEVICE
 	}, {	/* Expansion Bus Config Registers */
-		.virtual	= IXP4XX_EXP_CFG_BASE_VIRT,
+		.virtual	= (unsigned long)IXP4XX_EXP_CFG_BASE_VIRT,
 		.pfn		= __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS),
 		.length		= IXP4XX_EXP_CFG_REGION_SIZE,
 		.type		= MT_DEVICE
 	}, {	/* PCI Registers */
-		.virtual	= IXP4XX_PCI_CFG_BASE_VIRT,
+		.virtual	= (unsigned long)IXP4XX_PCI_CFG_BASE_VIRT,
 		.pfn		= __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS),
 		.length		= IXP4XX_PCI_CFG_REGION_SIZE,
 		.type		= MT_DEVICE
 	},
 #ifdef CONFIG_DEBUG_LL
 	{	/* Debug UART mapping */
-		.virtual	= IXP4XX_DEBUG_UART_BASE_VIRT,
+		.virtual	= (unsigned long)IXP4XX_DEBUG_UART_BASE_VIRT,
 		.pfn		= __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS),
 		.length		= IXP4XX_DEBUG_UART_REGION_SIZE,
 		.type		= MT_DEVICE
diff --git a/arch/arm/mach-ixp4xx/include/mach/cpu.h b/arch/arm/mach-ixp4xx/include/mach/cpu.h
index b2ef65d..ebc0ba3 100644
--- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
+++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
@@ -14,6 +14,7 @@
 #ifndef __ASM_ARCH_CPU_H__
 #define __ASM_ARCH_CPU_H__
 
+#include <linux/io.h>
 #include <asm/cputype.h>
 
 /* Processor id value in CP15 Register 0 */
@@ -37,7 +38,7 @@
 
 static inline u32 ixp4xx_read_feature_bits(void)
 {
-	u32 val = ~*IXP4XX_EXP_CFG2;
+	u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
 
 	if (cpu_is_ixp42x_rev_a0())
 		return IXP42X_FEATURE_MASK & ~(IXP4XX_FEATURE_RCOMP |
@@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
 
 static inline void ixp4xx_write_feature_bits(u32 value)
 {
-	*IXP4XX_EXP_CFG2 = ~value;
+	__raw_writel(~value, IXP4XX_EXP_CFG2);
 }
 
 #endif  /* _ASM_ARCH_CPU_H */
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
index 97c530f..eb68b61 100644
--- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h
@@ -49,21 +49,21 @@
  * Expansion BUS Configuration registers
  */
 #define IXP4XX_EXP_CFG_BASE_PHYS	(0xC4000000)
-#define IXP4XX_EXP_CFG_BASE_VIRT	(0xFFBFE000)
+#define IXP4XX_EXP_CFG_BASE_VIRT	IOMEM(0xFFBFE000)
 #define IXP4XX_EXP_CFG_REGION_SIZE	(0x00001000)
 
 /*
  * PCI Config registers
  */
 #define IXP4XX_PCI_CFG_BASE_PHYS	(0xC0000000)
-#define	IXP4XX_PCI_CFG_BASE_VIRT	(0xFFBFF000)
+#define	IXP4XX_PCI_CFG_BASE_VIRT	IOMEM(0xFFBFF000)
 #define IXP4XX_PCI_CFG_REGION_SIZE	(0x00001000)
 
 /*
  * Peripheral space
  */
 #define IXP4XX_PERIPHERAL_BASE_PHYS	(0xC8000000)
-#define IXP4XX_PERIPHERAL_BASE_VIRT	(0xFFBEB000)
+#define IXP4XX_PERIPHERAL_BASE_VIRT	IOMEM(0xFFBEB000)
 #define IXP4XX_PERIPHERAL_REGION_SIZE	(0x00013000)
 
 /*
@@ -73,7 +73,7 @@
  * aligned so that it * can be used with the low-level debug code.
  */
 #define	IXP4XX_DEBUG_UART_BASE_PHYS	(0xC8000000)
-#define	IXP4XX_DEBUG_UART_BASE_VIRT	(0xffb00000)
+#define	IXP4XX_DEBUG_UART_BASE_VIRT	IOMEM(0xffb00000)
 #define	IXP4XX_DEBUG_UART_REGION_SIZE	(0x00001000)
 
 #define IXP4XX_EXP_CS0_OFFSET	0x00
@@ -92,7 +92,7 @@
 /*
  * Expansion Bus Controller registers.
  */
-#define IXP4XX_EXP_REG(x) ((volatile u32 *)(IXP4XX_EXP_CFG_BASE_VIRT+(x)))
+#define IXP4XX_EXP_REG(x) ((volatile u32 __iomem *)(IXP4XX_EXP_CFG_BASE_VIRT+(x)))
 
 #define IXP4XX_EXP_CS0      IXP4XX_EXP_REG(IXP4XX_EXP_CS0_OFFSET)
 #define IXP4XX_EXP_CS1      IXP4XX_EXP_REG(IXP4XX_EXP_CS1_OFFSET)

Re: [PATCH 08+09/24] ARM: ixp4xx: use __iomem pointers for MMIO

[Krzysztof Halasa]

Actually, there are some minor problems here (both patches merged,
ixp4xx only):

Arnd Bergmann <arnd@arndb.de> writes:

> --- a/arch/arm/mach-ixp4xx/include/mach/cpu.h
> +++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h
> @@ -37,7 +38,7 @@
>  
>  static inline u32 ixp4xx_read_feature_bits(void)
>  {
> -	u32 val = ~*IXP4XX_EXP_CFG2;
> +	u32 val = ~__raw_readl(IXP4XX_EXP_CFG2);
>  

This is all fine, but

> @@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
>  
>  static inline void ixp4xx_write_feature_bits(u32 value)
>  {
> -	*IXP4XX_EXP_CFG2 = ~value;
> +	__raw_writel(~cpu_to_le32(value), IXP4XX_EXP_CFG2);
>  }

The EXP_CFG2 register is already in host order, no need for
cpu_to_le32() as the replaced code clearly shows.

Can you merge both IXP4xx parts (in the two patches) and fix the above,
please? Thanks.
-- 
Krzysztof Halasa

Re: [PATCH 08+09/24] ARM: ixp4xx: use __iomem pointers for MMIO

[Arnd Bergmann]

On Tuesday 18 September 2012, Krzysztof Halasa wrote:
> > @@ -51,7 +52,7 @@ static inline u32 ixp4xx_read_feature_bits(void)
> >  
> >  static inline void ixp4xx_write_feature_bits(u32 value)
> >  {
> > -     *IXP4XX_EXP_CFG2 = ~value;
> > +     __raw_writel(~cpu_to_le32(value), IXP4XX_EXP_CFG2);
> >  }
> 
> The EXP_CFG2 register is already in host order, no need for
> cpu_to_le32() as the replaced code clearly shows.
> 
> Can you merge both IXP4xx parts (in the two patches) and fix the above,
> please? Thanks.

Thanks for pointing this out, that was a mistake on my end, because I first
tried to convert to writel, with byteswap and then made up my mind and used
__raw_writel instead because it seemed silly to do two byteswaps.

	Arnd

[PATCH 10/24] ARM: ks8695: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Krzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-ks8695/cpu.c                     |    2 +-
 arch/arm/mach-ks8695/include/mach/hardware.h   |    2 +-
 arch/arm/mach-ks8695/include/mach/uncompress.h |    6 +++---
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-ks8695/cpu.c b/arch/arm/mach-ks8695/cpu.c
index 7f3f240..ddb2422 100644
--- a/arch/arm/mach-ks8695/cpu.c
+++ b/arch/arm/mach-ks8695/cpu.c
@@ -36,7 +36,7 @@
 
 static struct __initdata map_desc ks8695_io_desc[] = {
 	{
-		.virtual	= KS8695_IO_VA,
+		.virtual	= (unsigned long)KS8695_IO_VA,
 		.pfn		= __phys_to_pfn(KS8695_IO_PA),
 		.length		= KS8695_IO_SIZE,
 		.type		= MT_DEVICE,
diff --git a/arch/arm/mach-ks8695/include/mach/hardware.h b/arch/arm/mach-ks8695/include/mach/hardware.h
index 5e0c388..5090338 100644
--- a/arch/arm/mach-ks8695/include/mach/hardware.h
+++ b/arch/arm/mach-ks8695/include/mach/hardware.h
@@ -33,7 +33,7 @@
  * head debug code as the initial MMU setup only deals in L1 sections.
  */
 #define KS8695_IO_PA		0x03F00000
-#define KS8695_IO_VA		0xF0000000
+#define KS8695_IO_VA		IOMEM(0xF0000000)
 #define KS8695_IO_SIZE		SZ_1M
 
 #define KS8695_PCIMEM_PA	0x60000000
diff --git a/arch/arm/mach-ks8695/include/mach/uncompress.h b/arch/arm/mach-ks8695/include/mach/uncompress.h
index 9495cb4..8879d61 100644
--- a/arch/arm/mach-ks8695/include/mach/uncompress.h
+++ b/arch/arm/mach-ks8695/include/mach/uncompress.h
@@ -19,15 +19,15 @@
 
 static void putc(char c)
 {
-	while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE))
+	while (!(__raw_readl((void __iomem*)KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE))
 		barrier();
 
-	__raw_writel(c, KS8695_UART_PA + KS8695_URTH);
+	__raw_writel(c, (void __iomem*)KS8695_UART_PA + KS8695_URTH);
 }
 
 static inline void flush(void)
 {
-	while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTE))
+	while (!(__raw_readl((void __iomem*)KS8695_UART_PA + KS8695_URLS) & URLS_URTE))
 		barrier();
 }
 
-- 
1.7.10

[PATCH 11/24] ARM: lpc32xx: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Roland Stigge <stigge@antcom.de>
Cc: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-lpc32xx/common.c                |    8 ++++----
 arch/arm/mach-lpc32xx/include/mach/hardware.h |    2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-lpc32xx/common.c b/arch/arm/mach-lpc32xx/common.c
index a48dc2d..0d4db8c 100644
--- a/arch/arm/mach-lpc32xx/common.c
+++ b/arch/arm/mach-lpc32xx/common.c
@@ -177,25 +177,25 @@ u32 clk_get_pclk_div(void)
 
 static struct map_desc lpc32xx_io_desc[] __initdata = {
 	{
-		.virtual	= IO_ADDRESS(LPC32XX_AHB0_START),
+		.virtual	= (unsigned long)IO_ADDRESS(LPC32XX_AHB0_START),
 		.pfn		= __phys_to_pfn(LPC32XX_AHB0_START),
 		.length		= LPC32XX_AHB0_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= IO_ADDRESS(LPC32XX_AHB1_START),
+		.virtual	= (unsigned long)IO_ADDRESS(LPC32XX_AHB1_START),
 		.pfn		= __phys_to_pfn(LPC32XX_AHB1_START),
 		.length		= LPC32XX_AHB1_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= IO_ADDRESS(LPC32XX_FABAPB_START),
+		.virtual	= (unsigned long)IO_ADDRESS(LPC32XX_FABAPB_START),
 		.pfn		= __phys_to_pfn(LPC32XX_FABAPB_START),
 		.length		= LPC32XX_FABAPB_SIZE,
 		.type		= MT_DEVICE
 	},
 	{
-		.virtual	= IO_ADDRESS(LPC32XX_IRAM_BASE),
+		.virtual	= (unsigned long)IO_ADDRESS(LPC32XX_IRAM_BASE),
 		.pfn		= __phys_to_pfn(LPC32XX_IRAM_BASE),
 		.length		= (LPC32XX_IRAM_BANK_SIZE * 2),
 		.type		= MT_DEVICE
diff --git a/arch/arm/mach-lpc32xx/include/mach/hardware.h b/arch/arm/mach-lpc32xx/include/mach/hardware.h
index 33e1dde..69065de 100644
--- a/arch/arm/mach-lpc32xx/include/mach/hardware.h
+++ b/arch/arm/mach-lpc32xx/include/mach/hardware.h
@@ -25,7 +25,7 @@
 /*
  * This macro relies on fact that for all HW i/o addresses bits 20-23 are 0
  */
-#define IO_ADDRESS(x)	(((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\
+#define IO_ADDRESS(x)	IOMEM(((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) |\
 			 IO_BASE)
 
 #define io_p2v(x)	((void __iomem *) (unsigned long) IO_ADDRESS(x))
-- 
1.7.10

[PATCH 12/24] ARM: msm: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-msm/smd.c |   19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c
index 657be73..f4e475c 100644
--- a/arch/arm/mach-msm/smd.c
+++ b/arch/arm/mach-msm/smd.c
@@ -52,13 +52,14 @@ static int msm_smd_debug_mask;
 
 struct shared_info {
 	int ready;
-	unsigned state;
+	void __iomem *state;
 };
 
 static unsigned dummy_state[SMSM_STATE_COUNT];
 
 static struct shared_info smd_info = {
-	.state = (unsigned) &dummy_state,
+	/* FIXME: not a real __iomem pointer */
+	.state = &dummy_state,
 };
 
 module_param_named(debug_mask, msm_smd_debug_mask,
@@ -796,22 +797,22 @@ void *smem_alloc(unsigned id, unsigned size)
 	return smem_find(id, size);
 }
 
-void *smem_item(unsigned id, unsigned *size)
+void __iomem *smem_item(unsigned id, unsigned *size)
 {
 	struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE;
 	struct smem_heap_entry *toc = shared->heap_toc;
 
 	if (id >= SMEM_NUM_ITEMS)
-		return 0;
+		return NULL;
 
 	if (toc[id].allocated) {
 		*size = toc[id].size;
-		return (void *) (MSM_SHARED_RAM_BASE + toc[id].offset);
+		return (MSM_SHARED_RAM_BASE + toc[id].offset);
 	} else {
 		*size = 0;
 	}
 
-	return 0;
+	return NULL;
 }
 
 void *smem_find(unsigned id, unsigned size_in)
@@ -857,7 +858,7 @@ static irqreturn_t smsm_irq_handler(int irq, void *data)
 int smsm_change_state(enum smsm_state_item item,
 		      uint32_t clear_mask, uint32_t set_mask)
 {
-	unsigned long addr = smd_info.state + item * 4;
+	void __iomem *addr = smd_info.state + item * 4;
 	unsigned long flags;
 	unsigned state;
 
@@ -943,10 +944,10 @@ int smd_core_init(void)
 	/* wait for essential items to be initialized */
 	for (;;) {
 		unsigned size;
-		void *state;
+		void __iomem *state;
 		state = smem_item(SMEM_SMSM_SHARED_STATE, &size);
 		if (size == SMSM_V1_SIZE || size == SMSM_V2_SIZE) {
-			smd_info.state = (unsigned)state;
+			smd_info.state = state;
 			break;
 		}
 	}
-- 
1.7.10

Re: [PATCH 12/24] ARM: msm: use __iomem pointers for MMIO

[Stephen Boyd]

On 09/14/12 14:34, Arnd Bergmann wrote:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

I was going to send this patch out today. Thanks.

Acked-by: Stephen Boyd <sboyd@codeaurora.org>

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation

Re: [PATCH 12/24] ARM: msm: use __iomem pointers for MMIO

[David Brown]

On Fri, Sep 14, 2012 at 03:38:01PM -0700, Stephen Boyd wrote:
> On 09/14/12 14:34, Arnd Bergmann wrote:
> > ARM is moving to stricter checks on readl/write functions,
> > so we need to use the correct types everywhere.
> >
> > Cc: David Brown <davidb@codeaurora.org>
> > Cc: Daniel Walker <dwalker@fifo99.com>
> > Cc: Bryan Huntsman <bryanh@codeaurora.org>
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> 
> I was going to send this patch out today. Thanks.
> 
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>

Acked-by: David Brown <davidb@codeaurora.org>

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

[PATCH 13/24] ARM: nomadik: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Alessandro Rubini <rubini@unipv.it>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: STEricsson <STEricsson_nomadik_linux@list.st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-nomadik/board-nhk8815.c           |    3 +--
 arch/arm/mach-nomadik/include/mach/hardware.h   |    2 +-
 arch/arm/mach-nomadik/include/mach/uncompress.h |    8 ++++----
 3 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index f4535a7..c3841a9 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -112,8 +112,7 @@ static struct mtd_partition nhk8815_partitions[] = {
 static struct nomadik_nand_platform_data nhk8815_nand_data = {
 	.parts		= nhk8815_partitions,
 	.nparts		= ARRAY_SIZE(nhk8815_partitions),
-	.options	= NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING \
-			| NAND_NO_READRDY,
+	.options	= NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING,
 	.init		= nhk8815_nand_init,
 };
 
diff --git a/arch/arm/mach-nomadik/include/mach/hardware.h b/arch/arm/mach-nomadik/include/mach/hardware.h
index 6316dba..02035e4 100644
--- a/arch/arm/mach-nomadik/include/mach/hardware.h
+++ b/arch/arm/mach-nomadik/include/mach/hardware.h
@@ -30,7 +30,7 @@
 			- NOMADIK_IO_VIRTUAL + NOMADIK_IO_PHYSICAL)
 
 /* used in asm code, so no casts */
-#define IO_ADDRESS(x) ((x) - NOMADIK_IO_PHYSICAL + NOMADIK_IO_VIRTUAL)
+#define IO_ADDRESS(x) IOMEM((x) - NOMADIK_IO_PHYSICAL + NOMADIK_IO_VIRTUAL)
 
 /*
  *   Base address defination for Nomadik Onchip Logic Block
diff --git a/arch/arm/mach-nomadik/include/mach/uncompress.h b/arch/arm/mach-nomadik/include/mach/uncompress.h
index 071003b..7d4687e 100644
--- a/arch/arm/mach-nomadik/include/mach/uncompress.h
+++ b/arch/arm/mach-nomadik/include/mach/uncompress.h
@@ -27,10 +27,10 @@
 struct amba_device;
 #include <linux/amba/serial.h>
 
-#define NOMADIK_UART_DR		0x101FB000
-#define NOMADIK_UART_LCRH	0x101FB02c
-#define NOMADIK_UART_CR		0x101FB030
-#define NOMADIK_UART_FR		0x101FB018
+#define NOMADIK_UART_DR		(void __iomem *)0x101FB000
+#define NOMADIK_UART_LCRH	(void __iomem *)0x101FB02c
+#define NOMADIK_UART_CR		(void __iomem *)0x101FB030
+#define NOMADIK_UART_FR		(void __iomem *)0x101FB018
 
 static void putc(const char c)
 {
-- 
1.7.10

Re: [PATCH 13/24] ARM: nomadik: use __iomem pointers for MMIO

[Linus Walleij]

On Fri, Sep 14, 2012 at 11:34 PM, Arnd Bergmann <arnd@arndb.de> wrote:

> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
>
> Cc: Alessandro Rubini <rubini@unipv.it>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: STEricsson <STEricsson_nomadik_linux@list.st.com>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
>  arch/arm/mach-nomadik/board-nhk8815.c           |    3 +--
>  arch/arm/mach-nomadik/include/mach/hardware.h   |    2 +-
>  arch/arm/mach-nomadik/include/mach/uncompress.h |    8 ++++----
>  3 files changed, 6 insertions(+), 7 deletions(-)

Looks good to me, thanks!
Acked-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

[PATCH 14/24] ARM: prima2: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Barry Song <baohua.song@csr.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-prima2/include/mach/uncompress.h |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-prima2/include/mach/uncompress.h b/arch/arm/mach-prima2/include/mach/uncompress.h
index 83125c6..0c898fc 100644
--- a/arch/arm/mach-prima2/include/mach/uncompress.h
+++ b/arch/arm/mach-prima2/include/mach/uncompress.h
@@ -25,11 +25,11 @@ static __inline__ void putc(char c)
 	 * during kernel decompression, all mappings are flat:
 	 *  virt_addr == phys_addr
 	 */
-	while (__raw_readl(SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_STATUS)
+	while (__raw_readl((void __iomem *)SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_STATUS)
 		& SIRFSOC_UART1_TXFIFO_FULL)
 		barrier();
 
-	__raw_writel(c, SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_DATA);
+	__raw_writel(c, (void __iomem *)SIRFSOC_UART1_PA_BASE + SIRFSOC_UART_TXFIFO_DATA);
 }
 
 static inline void flush(void)
-- 
1.7.10

[PATCH 15/24] ARM: sa1100: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Jochen Friedrich <jochen@scram.de>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-sa1100/include/mach/simpad.h |    2 +-
 arch/arm/mach-sa1100/simpad.c              |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h
index cdea671..ac2ea76 100644
--- a/arch/arm/mach-sa1100/include/mach/simpad.h
+++ b/arch/arm/mach-sa1100/include/mach/simpad.h
@@ -87,7 +87,7 @@
 #define SIMPAD_CS3_PCMCIA_SHORT		(SIMPAD_CS3_GPIO_BASE + 22)
 #define SIMPAD_CS3_GPIO_23		(SIMPAD_CS3_GPIO_BASE + 23)
 
-#define CS3_BASE        0xf1000000
+#define CS3_BASE        IOMEM(0xf1000000)
 
 long simpad_get_cs3_ro(void);
 long simpad_get_cs3_shadow(void);
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index fbd5359..6ca92d0 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -124,7 +124,7 @@ static struct map_desc simpad_io_desc[] __initdata = {
 		.length		= 0x00800000,
 		.type		= MT_DEVICE
 	}, {	/* Simpad CS3 */
-		.virtual	= CS3_BASE,
+		.virtual	= (unsigned long)CS3_BASE,
 		.pfn		= __phys_to_pfn(SA1100_CS3_PHYS),
 		.length		= 0x00100000,
 		.type		= MT_DEVICE
-- 
1.7.10

[PATCH 16/24] ARM: spear13xx: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: spear-devel@list.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-spear13xx/include/mach/spear.h |   14 +++++++-------
 arch/arm/mach-spear13xx/spear13xx.c          |    6 +++---
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h
index 65f27de..07d90ac 100644
--- a/arch/arm/mach-spear13xx/include/mach/spear.h
+++ b/arch/arm/mach-spear13xx/include/mach/spear.h
@@ -17,26 +17,26 @@
 #include <asm/memory.h>
 
 #define PERIP_GRP2_BASE				UL(0xB3000000)
-#define VA_PERIP_GRP2_BASE			UL(0xFE000000)
+#define VA_PERIP_GRP2_BASE			IOMEM(0xFE000000)
 #define MCIF_SDHCI_BASE				UL(0xB3000000)
 #define SYSRAM0_BASE				UL(0xB3800000)
-#define VA_SYSRAM0_BASE				UL(0xFE800000)
+#define VA_SYSRAM0_BASE				IOMEM(0xFE800000)
 #define SYS_LOCATION				(VA_SYSRAM0_BASE + 0x600)
 
 #define PERIP_GRP1_BASE				UL(0xE0000000)
-#define VA_PERIP_GRP1_BASE			UL(0xFD000000)
+#define VA_PERIP_GRP1_BASE			IOMEM(0xFD000000)
 #define UART_BASE				UL(0xE0000000)
-#define VA_UART_BASE				UL(0xFD000000)
+#define VA_UART_BASE				IOMEM(0xFD000000)
 #define SSP_BASE				UL(0xE0100000)
 #define MISC_BASE				UL(0xE0700000)
-#define VA_MISC_BASE				IOMEM(UL(0xFD700000))
+#define VA_MISC_BASE				IOMEM(0xFD700000)
 
 #define A9SM_AND_MPMC_BASE			UL(0xEC000000)
-#define VA_A9SM_AND_MPMC_BASE			UL(0xFC000000)
+#define VA_A9SM_AND_MPMC_BASE			IOMEM(0xFC000000)
 
 /* A9SM peripheral offsets */
 #define A9SM_PERIP_BASE				UL(0xEC800000)
-#define VA_A9SM_PERIP_BASE			UL(0xFC800000)
+#define VA_A9SM_PERIP_BASE			IOMEM(0xFC800000)
 #define VA_SCU_BASE				(VA_A9SM_PERIP_BASE + 0x00)
 
 #define L2CC_BASE				UL(0xED000000)
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index cf936b1..e106488 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -114,17 +114,17 @@ void __init spear13xx_l2x0_init(void)
  */
 struct map_desc spear13xx_io_desc[] __initdata = {
 	{
-		.virtual	= VA_PERIP_GRP2_BASE,
+		.virtual	= (unsigned long)VA_PERIP_GRP2_BASE,
 		.pfn		= __phys_to_pfn(PERIP_GRP2_BASE),
 		.length		= SZ_16M,
 		.type		= MT_DEVICE
 	}, {
-		.virtual	= VA_PERIP_GRP1_BASE,
+		.virtual	= (unsigned long)VA_PERIP_GRP1_BASE,
 		.pfn		= __phys_to_pfn(PERIP_GRP1_BASE),
 		.length		= SZ_16M,
 		.type		= MT_DEVICE
 	}, {
-		.virtual	= VA_A9SM_AND_MPMC_BASE,
+		.virtual	= (unsigned long)VA_A9SM_AND_MPMC_BASE,
 		.pfn		= __phys_to_pfn(A9SM_AND_MPMC_BASE),
 		.length		= SZ_16M,
 		.type		= MT_DEVICE
-- 
1.7.10

[PATCH 17/24] ARM: OMAP: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/plat-omap/include/plat/hardware.h |   18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index ddbde38..2518f6c 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -56,9 +56,9 @@
  * Timers
  * ----------------------------------------------------------------------------
  */
-#define OMAP_MPU_TIMER1_BASE	(0xfffec500)
-#define OMAP_MPU_TIMER2_BASE	(0xfffec600)
-#define OMAP_MPU_TIMER3_BASE	(0xfffec700)
+#define OMAP_MPU_TIMER1_BASE	IOMEM(0xfffec500)
+#define OMAP_MPU_TIMER2_BASE	IOMEM(0xfffec600)
+#define OMAP_MPU_TIMER3_BASE	IOMEM(0xfffec700)
 #define MPU_TIMER_FREE		(1 << 6)
 #define MPU_TIMER_CLOCK_ENABLE	(1 << 5)
 #define MPU_TIMER_AR		(1 << 1)
@@ -69,7 +69,7 @@
  * Clocks
  * ----------------------------------------------------------------------------
  */
-#define CLKGEN_REG_BASE		(0xfffece00)
+#define CLKGEN_REG_BASE		IOMEM(0xfffece00)
 #define ARM_CKCTL		(CLKGEN_REG_BASE + 0x0)
 #define ARM_IDLECT1		(CLKGEN_REG_BASE + 0x4)
 #define ARM_IDLECT2		(CLKGEN_REG_BASE + 0x8)
@@ -86,7 +86,7 @@
 #define SETARM_IDLE_SHIFT
 
 /* DPLL control registers */
-#define DPLL_CTL		(0xfffecf00)
+#define DPLL_CTL		IOMEM(0xfffecf00)
 
 /* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
 #define DSP_CONFIG_REG_BASE     IOMEM(0xe1008000)
@@ -100,7 +100,7 @@
  * UPLD
  * ---------------------------------------------------------------------------
  */
-#define ULPD_REG_BASE		(0xfffe0800)
+#define ULPD_REG_BASE		IOMEM(0xfffe0800)
 #define ULPD_IT_STATUS		(ULPD_REG_BASE + 0x14)
 #define ULPD_SETUP_ANALOG_CELL_3	(ULPD_REG_BASE + 0x24)
 #define ULPD_CLOCK_CTRL		(ULPD_REG_BASE + 0x30)
@@ -131,7 +131,7 @@
  */
 
 /* Watchdog timer within the OMAP3.2 gigacell */
-#define OMAP_MPU_WATCHDOG_BASE	(0xfffec800)
+#define OMAP_MPU_WATCHDOG_BASE	IOMEM(0xfffec800)
 #define OMAP_WDT_TIMER		(OMAP_MPU_WATCHDOG_BASE + 0x0)
 #define OMAP_WDT_LOAD_TIM	(OMAP_MPU_WATCHDOG_BASE + 0x4)
 #define OMAP_WDT_READ_TIM	(OMAP_MPU_WATCHDOG_BASE + 0x4)
@@ -149,8 +149,8 @@
  * or something similar.. -- PFM.
  */
 
-#define OMAP_IH1_BASE		0xfffecb00
-#define OMAP_IH2_BASE		0xfffe0000
+#define OMAP_IH1_BASE		IOMEM(0xfffecb00)
+#define OMAP_IH2_BASE		IOMEM(0xfffe0000)
 
 #define OMAP_IH1_ITR		(OMAP_IH1_BASE + 0x00)
 #define OMAP_IH1_MIR		(OMAP_IH1_BASE + 0x04)
-- 
1.7.10

Re: [PATCH 17/24] ARM: OMAP: use __iomem pointers for MMIO

[Tony Lindgren]

* Arnd Bergmann <arnd@arndb.de> [120914 14:36]:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
> 
> Cc: Tony Lindgren <tony@atomide.com>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
>  arch/arm/plat-omap/include/plat/hardware.h |   18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
> index ddbde38..2518f6c 100644
> --- a/arch/arm/plat-omap/include/plat/hardware.h
> +++ b/arch/arm/plat-omap/include/plat/hardware.h

With my patches, this is now all omap1 specific and
moved to arch/arm/mach-omap1/include/mach/hardware.h.
It's probably easiest to just update this patch on
top of the hardware.h changes I've done.

Regards,

Tony

Re: [PATCH 17/24] ARM: OMAP: use __iomem pointers for MMIO

[Arnd Bergmann]

On Saturday 15 September 2012, Tony Lindgren wrote:
> With my patches, this is now all omap1 specific and
> moved to arch/arm/mach-omap1/include/mach/hardware.h.
> It's probably easiest to just update this patch on
> top of the hardware.h changes I've done.

Yes, sounds good. Do you want to send a patch for that
and let me drop this one then?

	Arnd

Re: [PATCH 17/24] ARM: OMAP: use __iomem pointers for MMIO

[Tony Lindgren]

* Arnd Bergmann <arnd@arndb.de> [120915 13:15]:
> On Saturday 15 September 2012, Tony Lindgren wrote:
> > With my patches, this is now all omap1 specific and
> > moved to arch/arm/mach-omap1/include/mach/hardware.h.
> > It's probably easiest to just update this patch on
> > top of the hardware.h changes I've done.
> 
> Yes, sounds good. Do you want to send a patch for that
> and let me drop this one then?

Yes I can pick this one and update it against one of my
branches to avoid merge conflicts.

Regards,

Tony

Re: [PATCH 17/24] ARM: OMAP: use __iomem pointers for MMIO

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [120916 13:39]:
> * Arnd Bergmann <arnd@arndb.de> [120915 13:15]:
> > On Saturday 15 September 2012, Tony Lindgren wrote:
> > > With my patches, this is now all omap1 specific and
> > > moved to arch/arm/mach-omap1/include/mach/hardware.h.
> > > It's probably easiest to just update this patch on
> > > top of the hardware.h changes I've done.
> > 
> > Yes, sounds good. Do you want to send a patch for that
> > and let me drop this one then?
> 
> Yes I can pick this one and update it against one of my
> branches to avoid merge conflicts.

This applies against mach-omap1/include/mach/hardware.h
with some fuzz so no issues there.

But I think we should not apply it as these are physical
addresses, not virtual addresses for omap1.

We have IOMEM already in use for omap_read/write because of:

#define OMAP1_IO_ADDRESS(pa)	IOMEM((pa) - OMAP1_IO_OFFSET)

I think the right solution is to eventually get rid of
omap_read/write for omap1 also and replace them with ioremap
+ readl/writel.

Or am I missing something?

Regards,

Tony

Re: [PATCH 17/24] ARM: OMAP: use __iomem pointers for MMIO

[Arnd Bergmann]

On Monday 17 September 2012, Tony Lindgren wrote:
> * Tony Lindgren <tony@atomide.com> [120916 13:39]:
> > * Arnd Bergmann <arnd@arndb.de> [120915 13:15]:
> > > On Saturday 15 September 2012, Tony Lindgren wrote:
> > > > With my patches, this is now all omap1 specific and
> > > > moved to arch/arm/mach-omap1/include/mach/hardware.h.
> > > > It's probably easiest to just update this patch on
> > > > top of the hardware.h changes I've done.
> > > 
> > > Yes, sounds good. Do you want to send a patch for that
> > > and let me drop this one then?
> > 
> > Yes I can pick this one and update it against one of my
> > branches to avoid merge conflicts.
> 
> This applies against mach-omap1/include/mach/hardware.h
> with some fuzz so no issues there.
> 
> But I think we should not apply it as these are physical
> addresses, not virtual addresses for omap1.

Right, I misread what is actually going on here because the
only driver I looked at treated the address as a virtual
address pointer.

> We have IOMEM already in use for omap_read/write because of:
> 
> #define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
> 
> I think the right solution is to eventually get rid of
> omap_read/write for omap1 also and replace them with ioremap
> + readl/writel.

Agreed.

> Or am I missing something?

I did not see any new warnings for omap1, but I did see this
on omap2plus_defconfig:

drivers/watchdog/omap_wdt.c: In function 'omap_wdt_ioctl':
drivers/watchdog/omap_wdt.c:222:4: error: passing argument 1 of '__raw_readw' makes pointer from integer without a cast [-Werror]
arch/arm/include/asm/io.h:71:90: note: expected 'const volatile void *' but argument is of type 'unsigned int'

It seems I misinterpreted this, and it's actually a bug in the watchdog
driver that should be fixed using this patch instead (and backport it
to stable)

diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index fceec4f..7b45802 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -218,9 +218,11 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
 	case WDIOC_GETSTATUS:
 		return put_user(0, (int __user *)arg);
 	case WDIOC_GETBOOTSTATUS:
+#ifdef CONFIG_ARCH_OMAP1
 		if (cpu_is_omap16xx())
-			return put_user(__raw_readw(ARM_SYSST),
+			return put_user(omap_readw(ARM_SYSST),
 					(int __user *)arg);
+#endif
 		if (cpu_is_omap24xx())
 			return put_user(omap_prcm_get_reset_sources(),
 					(int __user *)arg);

This bug seems to have been introduced in 2008 by 9f69e3b0c "[WATCHDOG]
omap_wdt.c: another ioremap() fix" without anyone ever noticing and now
got caught. Of course it should be replaced by something better when
omap_read/write is finally getting removed.

I'll drop my omap patch for now, because it's obviously wrong, and let
you guys figure out what to do about the watchdog driver.

	Arnd

Re: [PATCH 17/24] ARM: OMAP: use __iomem pointers for MMIO

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 2722 bytes --]

On Wed, Sep 19, 2012 at 01:35:47PM +0000, Arnd Bergmann wrote:
> On Monday 17 September 2012, Tony Lindgren wrote:
> > * Tony Lindgren <tony@atomide.com> [120916 13:39]:
> > > * Arnd Bergmann <arnd@arndb.de> [120915 13:15]:
> > > > On Saturday 15 September 2012, Tony Lindgren wrote:
> > > > > With my patches, this is now all omap1 specific and
> > > > > moved to arch/arm/mach-omap1/include/mach/hardware.h.
> > > > > It's probably easiest to just update this patch on
> > > > > top of the hardware.h changes I've done.
> > > > 
> > > > Yes, sounds good. Do you want to send a patch for that
> > > > and let me drop this one then?
> > > 
> > > Yes I can pick this one and update it against one of my
> > > branches to avoid merge conflicts.
> > 
> > This applies against mach-omap1/include/mach/hardware.h
> > with some fuzz so no issues there.
> > 
> > But I think we should not apply it as these are physical
> > addresses, not virtual addresses for omap1.
> 
> Right, I misread what is actually going on here because the
> only driver I looked at treated the address as a virtual
> address pointer.
> 
> > We have IOMEM already in use for omap_read/write because of:
> > 
> > #define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
> > 
> > I think the right solution is to eventually get rid of
> > omap_read/write for omap1 also and replace them with ioremap
> > + readl/writel.
> 
> Agreed.
> 
> > Or am I missing something?
> 
> I did not see any new warnings for omap1, but I did see this
> on omap2plus_defconfig:
> 
> drivers/watchdog/omap_wdt.c: In function 'omap_wdt_ioctl':
> drivers/watchdog/omap_wdt.c:222:4: error: passing argument 1 of '__raw_readw' makes pointer from integer without a cast [-Werror]
> arch/arm/include/asm/io.h:71:90: note: expected 'const volatile void *' but argument is of type 'unsigned int'
> 
> It seems I misinterpreted this, and it's actually a bug in the watchdog
> driver that should be fixed using this patch instead (and backport it
> to stable)
> 
> diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
> index fceec4f..7b45802 100644
> --- a/drivers/watchdog/omap_wdt.c
> +++ b/drivers/watchdog/omap_wdt.c
> @@ -218,9 +218,11 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
>  	case WDIOC_GETSTATUS:
>  		return put_user(0, (int __user *)arg);
>  	case WDIOC_GETBOOTSTATUS:
> +#ifdef CONFIG_ARCH_OMAP1
>  		if (cpu_is_omap16xx())
> -			return put_user(__raw_readw(ARM_SYSST),
> +			return put_user(omap_readw(ARM_SYSST),
>  					(int __user *)arg);
> +#endif

indeed... my bad. I agree this should be changed by something better
though.

cheers

-- 
balbi

[-- Attachment #2: Digital signature --]
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Re: [PATCH 17/24] ARM: OMAP: use __iomem pointers for MMIO

[Tony Lindgren]

* Felipe Balbi <balbi@ti.com> [120919 06:42]:
> On Wed, Sep 19, 2012 at 01:35:47PM +0000, Arnd Bergmann wrote:
> > On Monday 17 September 2012, Tony Lindgren wrote:
> > > * Tony Lindgren <tony@atomide.com> [120916 13:39]:
> > > > * Arnd Bergmann <arnd@arndb.de> [120915 13:15]:
> > > > > On Saturday 15 September 2012, Tony Lindgren wrote:
> > > > > > With my patches, this is now all omap1 specific and
> > > > > > moved to arch/arm/mach-omap1/include/mach/hardware.h.
> > > > > > It's probably easiest to just update this patch on
> > > > > > top of the hardware.h changes I've done.
> > > > > 
> > > > > Yes, sounds good. Do you want to send a patch for that
> > > > > and let me drop this one then?
> > > > 
> > > > Yes I can pick this one and update it against one of my
> > > > branches to avoid merge conflicts.
> > > 
> > > This applies against mach-omap1/include/mach/hardware.h
> > > with some fuzz so no issues there.
> > > 
> > > But I think we should not apply it as these are physical
> > > addresses, not virtual addresses for omap1.
> > 
> > Right, I misread what is actually going on here because the
> > only driver I looked at treated the address as a virtual
> > address pointer.
> > 
> > > We have IOMEM already in use for omap_read/write because of:
> > > 
> > > #define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
> > > 
> > > I think the right solution is to eventually get rid of
> > > omap_read/write for omap1 also and replace them with ioremap
> > > + readl/writel.
> > 
> > Agreed.

OK.
 
> > > Or am I missing something?
> > 
> > I did not see any new warnings for omap1, but I did see this
> > on omap2plus_defconfig:
> > 
> > drivers/watchdog/omap_wdt.c: In function 'omap_wdt_ioctl':
> > drivers/watchdog/omap_wdt.c:222:4: error: passing argument 1 of '__raw_readw' makes pointer from integer without a cast [-Werror]
> > arch/arm/include/asm/io.h:71:90: note: expected 'const volatile void *' but argument is of type 'unsigned int'
> > 
> > It seems I misinterpreted this, and it's actually a bug in the watchdog
> > driver that should be fixed using this patch instead (and backport it
> > to stable)
> > 
> > diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
> > index fceec4f..7b45802 100644
> > --- a/drivers/watchdog/omap_wdt.c
> > +++ b/drivers/watchdog/omap_wdt.c
> > @@ -218,9 +218,11 @@ static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
> >  	case WDIOC_GETSTATUS:
> >  		return put_user(0, (int __user *)arg);
> >  	case WDIOC_GETBOOTSTATUS:
> > +#ifdef CONFIG_ARCH_OMAP1
> >  		if (cpu_is_omap16xx())
> > -			return put_user(__raw_readw(ARM_SYSST),
> > +			return put_user(omap_readw(ARM_SYSST),
> >  					(int __user *)arg);
> > +#endif
> 
> indeed... my bad. I agree this should be changed by something better
> though.

Yes that's wrong.

Regards,

Tony

[PATCH 18/24] ARM: samsung: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/plat-samsung/s5p-irq-gpioint.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/plat-samsung/s5p-irq-gpioint.c b/arch/arm/plat-samsung/s5p-irq-gpioint.c
index f9431fe..23557d3 100644
--- a/arch/arm/plat-samsung/s5p-irq-gpioint.c
+++ b/arch/arm/plat-samsung/s5p-irq-gpioint.c
@@ -24,7 +24,7 @@
 
 #include <asm/mach/irq.h>
 
-#define GPIO_BASE(chip)		(((unsigned long)(chip)->base) & 0xFFFFF000u)
+#define GPIO_BASE(chip)		((void __iomem *)((unsigned long)((chip)->base) & 0xFFFFF000u))
 
 #define CON_OFFSET		0x700
 #define MASK_OFFSET		0x900
@@ -153,7 +153,7 @@ static __init int s5p_gpioint_add(struct samsung_gpio_chip *chip)
 	bank->chips[group - bank->start] = chip;
 
 	gc = irq_alloc_generic_chip("s5p_gpioint", 1, chip->irq_base,
-				    (void __iomem *)GPIO_BASE(chip),
+				    GPIO_BASE(chip),
 				    handle_level_irq);
 	if (!gc)
 		return -ENOMEM;
-- 
1.7.10

[PATCH 19/24] sh: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

I'm not completely sure about this patch, and it will
probably require some arch/sh changes to go along with it,
but it's clear that something has to be done to avoid
getting hundreds of new warnings on each shmobile build
in v3.7.
Please see this as a prototype.

Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: linux-sh@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/sh/intc/access.c    |   56 +++++++++++++++++++++----------------------
 drivers/sh/intc/chip.c      |    8 +++----
 drivers/sh/intc/core.c      |    6 +++--
 drivers/sh/intc/handle.c    |    6 ++---
 drivers/sh/intc/internals.h |   18 +++++++-------
 drivers/sh/intc/virq.c      |    3 ++-
 include/linux/sh_clk.h      |    4 ++--
 7 files changed, 52 insertions(+), 49 deletions(-)

diff --git a/drivers/sh/intc/access.c b/drivers/sh/intc/access.c
index f892ae1..5bd0a56 100644
--- a/drivers/sh/intc/access.c
+++ b/drivers/sh/intc/access.c
@@ -11,7 +11,7 @@
 #include <linux/io.h>
 #include "internals.h"
 
-unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address)
+void __iomem *intc_phys_to_virt(struct intc_desc_int *d, unsigned long address)
 {
 	struct intc_window *window;
 	int k;
@@ -27,23 +27,23 @@ unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address)
 			continue;
 
 		address -= window->phys;
-		address += (unsigned long)window->virt;
 
-		return address;
+		return window->virt + address;
 	}
 
 	/* no windows defined, register must be 1:1 mapped virt:phys */
-	return address;
+	return (void __iomem *)address;
 }
 
 unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address)
 {
 	unsigned int k;
+	void __iomem *virt;
 
-	address = intc_phys_to_virt(d, address);
+	virt = intc_phys_to_virt(d, address);
 
 	for (k = 0; k < d->nr_reg; k++) {
-		if (d->reg[k] == address)
+		if (d->reg[k] == virt)
 			return k;
 	}
 
@@ -72,25 +72,25 @@ unsigned long intc_get_field_from_handle(unsigned int value, unsigned int handle
 	return (value & mask) >> shift;
 }
 
-static unsigned long test_8(unsigned long addr, unsigned long h,
+static unsigned long test_8(void __iomem * addr, unsigned long h,
 			    unsigned long ignore)
 {
 	return intc_get_field_from_handle(__raw_readb(addr), h);
 }
 
-static unsigned long test_16(unsigned long addr, unsigned long h,
+static unsigned long test_16(void __iomem * addr, unsigned long h,
 			     unsigned long ignore)
 {
 	return intc_get_field_from_handle(__raw_readw(addr), h);
 }
 
-static unsigned long test_32(unsigned long addr, unsigned long h,
+static unsigned long test_32(void __iomem * addr, unsigned long h,
 			     unsigned long ignore)
 {
 	return intc_get_field_from_handle(__raw_readl(addr), h);
 }
 
-static unsigned long write_8(unsigned long addr, unsigned long h,
+static unsigned long write_8(void __iomem * addr, unsigned long h,
 			     unsigned long data)
 {
 	__raw_writeb(intc_set_field_from_handle(0, data, h), addr);
@@ -98,7 +98,7 @@ static unsigned long write_8(unsigned long addr, unsigned long h,
 	return 0;
 }
 
-static unsigned long write_16(unsigned long addr, unsigned long h,
+static unsigned long write_16(void __iomem * addr, unsigned long h,
 			      unsigned long data)
 {
 	__raw_writew(intc_set_field_from_handle(0, data, h), addr);
@@ -106,7 +106,7 @@ static unsigned long write_16(unsigned long addr, unsigned long h,
 	return 0;
 }
 
-static unsigned long write_32(unsigned long addr, unsigned long h,
+static unsigned long write_32(void __iomem * addr, unsigned long h,
 			      unsigned long data)
 {
 	__raw_writel(intc_set_field_from_handle(0, data, h), addr);
@@ -114,7 +114,7 @@ static unsigned long write_32(unsigned long addr, unsigned long h,
 	return 0;
 }
 
-static unsigned long modify_8(unsigned long addr, unsigned long h,
+static unsigned long modify_8(void __iomem * addr, unsigned long h,
 			      unsigned long data)
 {
 	unsigned long flags;
@@ -127,7 +127,7 @@ static unsigned long modify_8(unsigned long addr, unsigned long h,
 	return 0;
 }
 
-static unsigned long modify_16(unsigned long addr, unsigned long h,
+static unsigned long modify_16(void __iomem * addr, unsigned long h,
 			       unsigned long data)
 {
 	unsigned long flags;
@@ -140,7 +140,7 @@ static unsigned long modify_16(unsigned long addr, unsigned long h,
 	return 0;
 }
 
-static unsigned long modify_32(unsigned long addr, unsigned long h,
+static unsigned long modify_32(void __iomem * addr, unsigned long h,
 			       unsigned long data)
 {
 	unsigned long flags;
@@ -153,9 +153,9 @@ static unsigned long modify_32(unsigned long addr, unsigned long h,
 	return 0;
 }
 
-static unsigned long intc_mode_field(unsigned long addr,
+static unsigned long intc_mode_field(void __iomem * addr,
 				     unsigned long handle,
-				     unsigned long (*fn)(unsigned long,
+				     unsigned long (*fn)(void __iomem *addr,
 						unsigned long,
 						unsigned long),
 				     unsigned int irq)
@@ -163,9 +163,9 @@ static unsigned long intc_mode_field(unsigned long addr,
 	return fn(addr, handle, ((1 << _INTC_WIDTH(handle)) - 1));
 }
 
-static unsigned long intc_mode_zero(unsigned long addr,
+static unsigned long intc_mode_zero(void __iomem * addr,
 				    unsigned long handle,
-				    unsigned long (*fn)(unsigned long,
+				    unsigned long (*fn)(void __iomem *addr,
 					       unsigned long,
 					       unsigned long),
 				    unsigned int irq)
@@ -173,9 +173,9 @@ static unsigned long intc_mode_zero(unsigned long addr,
 	return fn(addr, handle, 0);
 }
 
-static unsigned long intc_mode_prio(unsigned long addr,
+static unsigned long intc_mode_prio(void __iomem * addr,
 				    unsigned long handle,
-				    unsigned long (*fn)(unsigned long,
+				    unsigned long (*fn)(void __iomem *addr,
 					       unsigned long,
 					       unsigned long),
 				    unsigned int irq)
@@ -183,7 +183,7 @@ static unsigned long intc_mode_prio(unsigned long addr,
 	return fn(addr, handle, intc_get_prio_level(irq));
 }
 
-unsigned long (*intc_reg_fns[])(unsigned long addr,
+unsigned long (*intc_reg_fns[])(void __iomem * addr,
 				unsigned long h,
 				unsigned long data) = {
 	[REG_FN_TEST_BASE + 0] = test_8,
@@ -197,9 +197,9 @@ unsigned long (*intc_reg_fns[])(unsigned long addr,
 	[REG_FN_MODIFY_BASE + 3] = modify_32,
 };
 
-unsigned long (*intc_enable_fns[])(unsigned long addr,
+unsigned long (*intc_enable_fns[])(void __iomem * addr,
 				   unsigned long handle,
-				   unsigned long (*fn)(unsigned long,
+				   unsigned long (*fn)(void __iomem *,
 					    unsigned long,
 					    unsigned long),
 				   unsigned int irq) = {
@@ -210,9 +210,9 @@ unsigned long (*intc_enable_fns[])(unsigned long addr,
 	[MODE_PCLR_REG] = intc_mode_prio,
 };
 
-unsigned long (*intc_disable_fns[])(unsigned long addr,
+unsigned long (*intc_disable_fns[])(void __iomem * addr,
 				    unsigned long handle,
-				    unsigned long (*fn)(unsigned long,
+				    unsigned long (*fn)(void __iomem *,
 					     unsigned long,
 					     unsigned long),
 				    unsigned int irq) = {
@@ -223,9 +223,9 @@ unsigned long (*intc_disable_fns[])(unsigned long addr,
 	[MODE_PCLR_REG] = intc_mode_field,
 };
 
-unsigned long (*intc_enable_noprio_fns[])(unsigned long addr,
+unsigned long (*intc_enable_noprio_fns[])(void __iomem * addr,
 					  unsigned long handle,
-					  unsigned long (*fn)(unsigned long,
+					  unsigned long (*fn)(void __iomem *,
 						unsigned long,
 						unsigned long),
 					  unsigned int irq) = {
diff --git a/drivers/sh/intc/chip.c b/drivers/sh/intc/chip.c
index 012df26..2928264 100644
--- a/drivers/sh/intc/chip.c
+++ b/drivers/sh/intc/chip.c
@@ -17,7 +17,7 @@ void _intc_enable(struct irq_data *data, unsigned long handle)
 {
 	unsigned int irq = data->irq;
 	struct intc_desc_int *d = get_intc_desc(irq);
-	unsigned long addr;
+	void __iomem *addr;
 	unsigned int cpu;
 
 	for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) {
@@ -43,7 +43,7 @@ static void intc_disable(struct irq_data *data)
 	unsigned int irq = data->irq;
 	struct intc_desc_int *d = get_intc_desc(irq);
 	unsigned long handle = (unsigned long)irq_data_get_irq_chip_data(data);
-	unsigned long addr;
+	void __iomem *addr;
 	unsigned int cpu;
 
 	intc_balancing_disable(irq);
@@ -83,7 +83,7 @@ static void intc_mask_ack(struct irq_data *data)
 	unsigned int irq = data->irq;
 	struct intc_desc_int *d = get_intc_desc(irq);
 	unsigned long handle = intc_get_ack_handle(irq);
-	unsigned long addr;
+	void __iomem * addr;
 
 	intc_disable(data);
 
@@ -177,7 +177,7 @@ static int intc_set_type(struct irq_data *data, unsigned int type)
 	struct intc_desc_int *d = get_intc_desc(irq);
 	unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK];
 	struct intc_handle_int *ihp;
-	unsigned long addr;
+	void __iomem *addr;
 
 	if (!value)
 		return -EINVAL;
diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
index 32c26d7..1ddbba0 100644
--- a/drivers/sh/intc/core.c
+++ b/drivers/sh/intc/core.c
@@ -172,10 +172,12 @@ static unsigned int __init save_reg(struct intc_desc_int *d,
 				    unsigned long value,
 				    unsigned int smp)
 {
+	void __iomem *virt;
+
 	if (value) {
-		value = intc_phys_to_virt(d, value);
+		virt = intc_phys_to_virt(d, value);
 
-		d->reg[cnt] = value;
+		d->reg[cnt] = virt;
 #ifdef CONFIG_SMP
 		d->smp[cnt] = smp;
 #endif
diff --git a/drivers/sh/intc/handle.c b/drivers/sh/intc/handle.c
index 7863a44..1971ef1 100644
--- a/drivers/sh/intc/handle.c
+++ b/drivers/sh/intc/handle.c
@@ -206,10 +206,10 @@ static unsigned int intc_ack_data(struct intc_desc *desc,
 static void intc_enable_disable(struct intc_desc_int *d,
 				unsigned long handle, int do_enable)
 {
-	unsigned long addr;
+	void __iomem *addr;
 	unsigned int cpu;
-	unsigned long (*fn)(unsigned long, unsigned long,
-		   unsigned long (*)(unsigned long, unsigned long,
+	unsigned long(*fn)(void __iomem *, unsigned long,
+		   unsigned long (*)(void __iomem *, unsigned long,
 				     unsigned long),
 		   unsigned int);
 
diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
index 7dff08e..29e4299 100644
--- a/drivers/sh/intc/internals.h
+++ b/drivers/sh/intc/internals.h
@@ -56,7 +56,7 @@ struct intc_desc_int {
 	struct radix_tree_root tree;
 	raw_spinlock_t lock;
 	unsigned int index;
-	unsigned long *reg;
+	void * __iomem *reg;
 #ifdef CONFIG_SMP
 	unsigned long *smp;
 #endif
@@ -120,25 +120,25 @@ static inline int intc_handle_int_cmp(const void *a, const void *b)
 
 /* access.c */
 extern unsigned long
-(*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data);
+(*intc_reg_fns[])(void __iomem * addr, unsigned long h, unsigned long data);
 
 extern unsigned long
-(*intc_enable_fns[])(unsigned long addr, unsigned long handle,
-		     unsigned long (*fn)(unsigned long,
+(*intc_enable_fns[])(void __iomem * addr, unsigned long handle,
+		     unsigned long (*fn)(void __iomem *,
 				unsigned long, unsigned long),
 		     unsigned int irq);
 extern unsigned long
-(*intc_disable_fns[])(unsigned long addr, unsigned long handle,
-		      unsigned long (*fn)(unsigned long,
+(*intc_disable_fns[])(void __iomem * addr, unsigned long handle,
+		      unsigned long (*fn)(void __iomem *,
 				unsigned long, unsigned long),
 		      unsigned int irq);
 extern unsigned long
-(*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle,
-		            unsigned long (*fn)(unsigned long,
+(*intc_enable_noprio_fns[])(void __iomem * addr, unsigned long handle,
+		            unsigned long (*fn)(void __iomem *,
 				unsigned long, unsigned long),
 			    unsigned int irq);
 
-unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
+void __iomem * intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
 unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address);
 unsigned int intc_set_field_from_handle(unsigned int value,
 			    unsigned int field_value,
diff --git a/drivers/sh/intc/virq.c b/drivers/sh/intc/virq.c
index f30ac93..d45cfcd 100644
--- a/drivers/sh/intc/virq.c
+++ b/drivers/sh/intc/virq.c
@@ -117,7 +117,8 @@ static void intc_virq_handler(unsigned int irq, struct irq_desc *desc)
 	chip->irq_mask_ack(data);
 
 	for_each_virq(entry, vlist) {
-		unsigned long addr, handle;
+		void __iomem *addr;
+		unsigned long handle;
 
 		handle = (unsigned long)irq_get_handler_data(entry->irq);
 		addr = INTC_REG(d, _INTC_ADDR_E(handle), 0);
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index 5091091..6579041 100644
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -173,7 +173,7 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
 #define SH_CLK_DIV6_EXT(_reg, _flags, _parents,			\
 			_num_parents, _src_shift, _src_width)	\
 {								\
-	.enable_reg = (void __iomem *)_reg,			\
+	.enable_reg = _reg,					\
 	.enable_bit = 0, /* unused */				\
 	.flags = _flags | CLK_MASK_DIV_ON_DISABLE,		\
 	.div_mask = SH_CLK_DIV6_MSK,				\
@@ -186,7 +186,7 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
 #define SH_CLK_DIV6(_parent, _reg, _flags)			\
 {								\
 	.parent		= _parent,				\
-	.enable_reg	= (void __iomem *)_reg,			\
+	.enable_reg	= _reg,					\
 	.enable_bit	= 0,	/* unused */			\
 	.div_mask	= SH_CLK_DIV6_MSK,			\
 	.flags		= _flags | CLK_MASK_DIV_ON_DISABLE,	\
-- 
1.7.10

Re: [PATCH 19/24] sh: use __iomem pointers for MMIO

[Paul Mundt]

On Fri, Sep 14, 2012 at 11:34:47PM +0200, Arnd Bergmann wrote:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
> 
> I'm not completely sure about this patch, and it will
> probably require some arch/sh changes to go along with it,
> but it's clear that something has to be done to avoid
> getting hundreds of new warnings on each shmobile build
> in v3.7.
> Please see this as a prototype.
> 
I have no intention of making this change for arch/sh.

The __raw variants already accept both __iomem pointers and integer
addresses, which was largely intentional. New code could use the __iomem
annotations while older code could continue to use the integer addresses
without issue. If you wish to go through the kernel and audit every
single __raw user, you're certainly welcome to, but until then such a
change is premature.

Re: [PATCH 19/24] sh: use __iomem pointers for MMIO

[Arnd Bergmann]

On Tuesday 18 September 2012, Paul Mundt wrote:
> On Fri, Sep 14, 2012 at 11:34:47PM +0200, Arnd Bergmann wrote:
> > ARM is moving to stricter checks on readl/write functions,
> > so we need to use the correct types everywhere.
> > 
> > I'm not completely sure about this patch, and it will
> > probably require some arch/sh changes to go along with it,
> > but it's clear that something has to be done to avoid
> > getting hundreds of new warnings on each shmobile build
> > in v3.7.
> > Please see this as a prototype.
> > 
> I have no intention of making this change for arch/sh.
> 
> The __raw variants already accept both __iomem pointers and integer
> addresses, which was largely intentional. New code could use the __iomem
> annotations while older code could continue to use the integer addresses
> without issue.

Ok, I'm dropping this patch from the series then.

> If you wish to go through the kernel and audit every
> single __raw user, you're certainly welcome to, but until then such a
> change is premature.

I've done it for all the defconfig files for now, which probably covers
most of the drivers that are relevant on ARM. I still have a backlog
of unrelated warning fixes from that. Once I'm done with those, I'm planning
to do another round of randconfig builds, which hopefully catches the
rest. I'll just exclude drivers/sh from those builds for now.

	Arnd

[PATCH 20/24] input: rpcmouse: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: linux-input@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/input/mouse/rpcmouse.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/input/mouse/rpcmouse.c b/drivers/input/mouse/rpcmouse.c
index 272dedd..21c60fe 100644
--- a/drivers/input/mouse/rpcmouse.c
+++ b/drivers/input/mouse/rpcmouse.c
@@ -42,7 +42,7 @@ static irqreturn_t rpcmouse_irq(int irq, void *dev_id)
 
 	x = (short) iomd_readl(IOMD_MOUSEX);
 	y = (short) iomd_readl(IOMD_MOUSEY);
-	b = (short) (__raw_readl(0xe0310000) ^ 0x70);
+	b = (short) (__raw_readl(IOMEM(0xe0310000)) ^ 0x70);
 
 	dx = x - rpcmouse_lastx;
 	dy = y - rpcmouse_lasty;
-- 
1.7.10

Re: [PATCH 20/24] input: rpcmouse: use __iomem pointers for MMIO

[Dmitry Torokhov]

On Fri, Sep 14, 2012 at 11:34:48PM +0200, Arnd Bergmann wrote:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
> 
> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
> Cc: linux-input@vger.kernel.org
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>

> ---
>  drivers/input/mouse/rpcmouse.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/input/mouse/rpcmouse.c b/drivers/input/mouse/rpcmouse.c
> index 272dedd..21c60fe 100644
> --- a/drivers/input/mouse/rpcmouse.c
> +++ b/drivers/input/mouse/rpcmouse.c
> @@ -42,7 +42,7 @@ static irqreturn_t rpcmouse_irq(int irq, void *dev_id)
>  
>  	x = (short) iomd_readl(IOMD_MOUSEX);
>  	y = (short) iomd_readl(IOMD_MOUSEY);
> -	b = (short) (__raw_readl(0xe0310000) ^ 0x70);
> +	b = (short) (__raw_readl(IOMEM(0xe0310000)) ^ 0x70);
>  
>  	dx = x - rpcmouse_lastx;
>  	dy = y - rpcmouse_lasty;
> -- 
> 1.7.10
> 

-- 
Dmitry

[PATCH 21/24] serial: ks8695: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Alan Cox <alan@linux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/tty/serial/serial_ks8695.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/serial_ks8695.c b/drivers/tty/serial/serial_ks8695.c
index 7c13639..9bd004f 100644
--- a/drivers/tty/serial/serial_ks8695.c
+++ b/drivers/tty/serial/serial_ks8695.c
@@ -548,8 +548,8 @@ static struct uart_ops ks8695uart_pops = {
 
 static struct uart_port ks8695uart_ports[SERIAL_KS8695_NR] = {
 	{
-		.membase	= (void *) KS8695_UART_VA,
-		.mapbase	= KS8695_UART_VA,
+		.membase	= KS8695_UART_VA,
+		.mapbase	= KS8695_UART_PA,
 		.iotype		= SERIAL_IO_MEM,
 		.irq		= KS8695_IRQ_UART_TX,
 		.uartclk	= KS8695_CLOCK_RATE * 16,
-- 
1.7.10

Re: [PATCH 21/24] serial: ks8695: use __iomem pointers for MMIO

[Greg Kroah-Hartman]

On Fri, Sep 14, 2012 at 11:34:49PM +0200, Arnd Bergmann wrote:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.
> 
> Cc: Alan Cox <alan@linux.intel.com>
> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

[PATCH 22/24] scsi: eesox: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: "James E.J. Bottomley" <JBottomley@parallels.com>
Cc: linux-scsi@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/scsi/arm/eesox.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/scsi/arm/eesox.c b/drivers/scsi/arm/eesox.c
index edfd12b..968d083 100644
--- a/drivers/scsi/arm/eesox.c
+++ b/drivers/scsi/arm/eesox.c
@@ -273,7 +273,7 @@ static void eesoxscsi_buffer_out(void *buf, int length, void __iomem *base)
 {
 	const void __iomem *reg_fas = base + EESOX_FAS216_OFFSET;
 	const void __iomem *reg_dmastat = base + EESOX_DMASTAT;
-	const void __iomem *reg_dmadata = base + EESOX_DMADATA;
+	void __iomem *reg_dmadata = base + EESOX_DMADATA;
 
 	do {
 		unsigned int status;
-- 
1.7.10

Re: [PATCH 22/24] scsi: eesox: use __iomem pointers for MMIO

[Russell King - ARM Linux]

On Fri, Sep 14, 2012 at 11:34:50PM +0200, Arnd Bergmann wrote:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.

There's nothing wrong with const iomem pointers.  If you think
otherwise, patch x86 not to use const in its accessor implementation
and watch the reaction:

#define build_mmio_read(name, size, type, reg, barrier) \
static inline type name(const volatile void __iomem *addr) \
{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \
:"m" (*(volatile type __force *)addr) barrier); return ret; }

build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
build_mmio_read(readl, "l", unsigned int, "=r", :"memory")

Re: [PATCH 22/24] scsi: eesox: use __iomem pointers for MMIO

[Arnd Bergmann]

On Friday 14 September 2012, Russell King - ARM Linux wrote:
> On Fri, Sep 14, 2012 at 11:34:50PM +0200, Arnd Bergmann wrote:
> > ARM is moving to stricter checks on readl/write functions,
> > so we need to use the correct types everywhere.
> 
> There's nothing wrong with const iomem pointers.  If you think
> otherwise, patch x86 not to use const in its accessor implementation
> and watch the reaction:
> 
> #define build_mmio_read(name, size, type, reg, barrier) \
> static inline type name(const volatile void __iomem *addr) \
> { type ret; asm volatile("mov" size " %1,%0":reg (ret) \
> :"m" (*(volatile type __force *)addr) barrier); return ret; }
> 
> build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
> build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
> build_mmio_read(readl, "l", unsigned int, "=r", :"memory")

Ok, fair enough. Can you fold the patch below into 
"ARM: 7500/1: io: avoid writeback addressing modes for __raw_
accessors", or apply on top then?

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 35c1ed8..4c5f708 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -39,9 +39,9 @@
  * Generic IO read/write.  These perform native-endian accesses.  Note
  * that some architectures will want to re-define __raw_{read,write}w.
  */
-extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
-extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
-extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
+extern void __raw_writesb(const void __iomem *addr, const void *data, int bytelen);
+extern void __raw_writesw(const void __iomem *addr, const void *data, int wordlen);
+extern void __raw_writesl(const void __iomem *addr, const void *data, int longlen);
 
 extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
 extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
@@ -61,7 +61,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
  * writeback addressing modes as these incur a significant performance
  * overhead (the address generation must be emulated in software).
  */
-static inline void __raw_writew(u16 val, volatile void __iomem *addr)
+static inline void __raw_writew(u16 val, const volatile void __iomem *addr)
 {
 	asm volatile("strh %1, %0"
 		     : "+Qo" (*(volatile u16 __force *)addr)
@@ -78,14 +78,14 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
 }
 #endif
 
-static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
+static inline void __raw_writeb(u8 val, const volatile void __iomem *addr)
 {
 	asm volatile("strb %1, %0"
 		     : "+Qo" (*(volatile u8 __force *)addr)
 		     : "r" (val));
 }
 
-static inline void __raw_writel(u32 val, volatile void __iomem *addr)
+static inline void __raw_writel(u32 val, const volatile void __iomem *addr)
 {
 	asm volatile("str %1, %0"
 		     : "+Qo" (*(volatile u32 __force *)addr)

Re: [PATCH 22/24] scsi: eesox: use __iomem pointers for MMIO

[Russell King - ARM Linux]

On Sat, Sep 15, 2012 at 08:00:35AM +0000, Arnd Bergmann wrote:
> On Friday 14 September 2012, Russell King - ARM Linux wrote:
> > On Fri, Sep 14, 2012 at 11:34:50PM +0200, Arnd Bergmann wrote:
> > > ARM is moving to stricter checks on readl/write functions,
> > > so we need to use the correct types everywhere.
> > 
> > There's nothing wrong with const iomem pointers.  If you think
> > otherwise, patch x86 not to use const in its accessor implementation
> > and watch the reaction:
> > 
> > #define build_mmio_read(name, size, type, reg, barrier) \
> > static inline type name(const volatile void __iomem *addr) \
> > { type ret; asm volatile("mov" size " %1,%0":reg (ret) \
> > :"m" (*(volatile type __force *)addr) barrier); return ret; }
> > 
> > build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
> > build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
> > build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
> 
> Ok, fair enough. Can you fold the patch below into 
> "ARM: 7500/1: io: avoid writeback addressing modes for __raw_
> accessors", or apply on top then?

No - const is not appropriate for the write accessors.  Again, this puts
us at odds with x86:

#define build_mmio_write(name, size, type, reg, barrier) \
static inline void name(type val, volatile void __iomem *addr) \
{ asm volatile("mov" size " %0,%1": :reg (val), \
"m" (*(volatile type __force *)addr) barrier); }

build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
build_mmio_write(writew, "w", unsigned short, "r", :"memory")
build_mmio_write(writel, "l", unsigned int, "r", :"memory")

So, readl etc are all const volatile void __iomem *, but writel etc are
all volatile void __iomem *.

How they're defined on ARM after 7500/1 copies how they're defined on
x86.

Re: [PATCH 22/24] scsi: eesox: use __iomem pointers for MMIO

[Arnd Bergmann]

On Saturday 15 September 2012, Russell King - ARM Linux wrote:
> On Sat, Sep 15, 2012 at 08:00:35AM +0000, Arnd Bergmann wrote:
> > On Friday 14 September 2012, Russell King - ARM Linux wrote:
> > > On Fri, Sep 14, 2012 at 11:34:50PM +0200, Arnd Bergmann wrote:
> > > > ARM is moving to stricter checks on readl/write functions,
> > > > so we need to use the correct types everywhere.
> > > 
> > > There's nothing wrong with const iomem pointers.  If you think
> > > otherwise, patch x86 not to use const in its accessor implementation
> > > and watch the reaction:
> > > 
> > > #define build_mmio_read(name, size, type, reg, barrier) \
> > > static inline type name(const volatile void __iomem *addr) \
> > > { type ret; asm volatile("mov" size " %1,%0":reg (ret) \
> > > :"m" (*(volatile type __force *)addr) barrier); return ret; }
> > > 
> > > build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
> > > build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
> > > build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
> > 
> > Ok, fair enough. Can you fold the patch below into 
> > "ARM: 7500/1: io: avoid writeback addressing modes for __raw_
> > accessors", or apply on top then?
> 
> No - const is not appropriate for the write accessors.  Again, this puts
> us at odds with x86:
> 
> #define build_mmio_write(name, size, type, reg, barrier) \
> static inline void name(type val, volatile void __iomem *addr) \
> { asm volatile("mov" size " %0,%1": :reg (val), \
> "m" (*(volatile type __force *)addr) barrier); }
> 
> build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
> build_mmio_write(writew, "w", unsigned short, "r", :"memory")
> build_mmio_write(writel, "l", unsigned int, "r", :"memory")
> 
> So, readl etc are all const volatile void __iomem *, but writel etc are
> all volatile void __iomem *.
> 
> How they're defined on ARM after 7500/1 copies how they're defined on
> x86.

Well, you have to make up your mind what you want. Right now, we get these
warnings in rpc_defconfig:

  Generating include/generated/mach-types.h
/home/arnd/linux-arm/drivers/net/ethernet/seeq/ether3.c: In function 'ether3_outb':
/home/arnd/linux-arm/drivers/net/ethernet/seeq/ether3.c:104:2: error: passing argument 2 of '__raw_writeb' discards 'const' qualifier from pointer target type [-Werror]
/home/arnd/linux-arm/arch/arm/include/asm/io.h:81:91: note: expected 'volatile void *' but argument is of type 'const void *'
/home/arnd/linux-arm/drivers/scsi/arm/eesox.c: In function 'eesoxscsi_buffer_out':
/home/arnd/linux-arm/drivers/scsi/arm/eesox.c:310:4: error: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [-Werror]
/home/arnd/linux-arm/arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const void *'
/home/arnd/linux-arm/drivers/scsi/arm/eesox.c:324:4: error: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [-Werror]
/home/arnd/linux-arm/arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const void *'
/home/arnd/linux-arm/drivers/scsi/arm/eesox.c:325:4: error: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [-Werror]
/home/arnd/linux-arm/arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const void *'

Either we allow drivers to write to const __iomem pointers or we don't. I
don't care which way we do it, but just saying both patches are wrong is
not very helpful.

	Arnd

Re: [PATCH 22/24] scsi: eesox: use __iomem pointers for MMIO

[Russell King - ARM Linux]

On Sat, Sep 15, 2012 at 10:30:43AM +0000, Arnd Bergmann wrote:
> On Saturday 15 September 2012, Russell King - ARM Linux wrote:
> > On Sat, Sep 15, 2012 at 08:00:35AM +0000, Arnd Bergmann wrote:
> > > On Friday 14 September 2012, Russell King - ARM Linux wrote:
> > > > On Fri, Sep 14, 2012 at 11:34:50PM +0200, Arnd Bergmann wrote:
> > > > > ARM is moving to stricter checks on readl/write functions,
> > > > > so we need to use the correct types everywhere.
> > > > 
> > > > There's nothing wrong with const iomem pointers.  If you think
> > > > otherwise, patch x86 not to use const in its accessor implementation
> > > > and watch the reaction:
> > > > 
> > > > #define build_mmio_read(name, size, type, reg, barrier) \
> > > > static inline type name(const volatile void __iomem *addr) \
> > > > { type ret; asm volatile("mov" size " %1,%0":reg (ret) \
> > > > :"m" (*(volatile type __force *)addr) barrier); return ret; }
> > > > 
> > > > build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
> > > > build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
> > > > build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
> > > 
> > > Ok, fair enough. Can you fold the patch below into 
> > > "ARM: 7500/1: io: avoid writeback addressing modes for __raw_
> > > accessors", or apply on top then?
> > 
> > No - const is not appropriate for the write accessors.  Again, this puts
> > us at odds with x86:
> > 
> > #define build_mmio_write(name, size, type, reg, barrier) \
> > static inline void name(type val, volatile void __iomem *addr) \
> > { asm volatile("mov" size " %0,%1": :reg (val), \
> > "m" (*(volatile type __force *)addr) barrier); }
> > 
> > build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
> > build_mmio_write(writew, "w", unsigned short, "r", :"memory")
> > build_mmio_write(writel, "l", unsigned int, "r", :"memory")
> > 
> > So, readl etc are all const volatile void __iomem *, but writel etc are
> > all volatile void __iomem *.
> > 
> > How they're defined on ARM after 7500/1 copies how they're defined on
> > x86.
> 
> Well, you have to make up your mind what you want. Right now, we get these
> warnings in rpc_defconfig:
> 
>   Generating include/generated/mach-types.h
> /home/arnd/linux-arm/drivers/net/ethernet/seeq/ether3.c: In function 'ether3_outb':
> /home/arnd/linux-arm/drivers/net/ethernet/seeq/ether3.c:104:2: error: passing argument 2 of '__raw_writeb' discards 'const' qualifier from pointer target type [-Werror]
> /home/arnd/linux-arm/arch/arm/include/asm/io.h:81:91: note: expected 'volatile void *' but argument is of type 'const void *'
> /home/arnd/linux-arm/drivers/scsi/arm/eesox.c: In function 'eesoxscsi_buffer_out':
> /home/arnd/linux-arm/drivers/scsi/arm/eesox.c:310:4: error: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [-Werror]
> /home/arnd/linux-arm/arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const void *'
> /home/arnd/linux-arm/drivers/scsi/arm/eesox.c:324:4: error: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [-Werror]
> /home/arnd/linux-arm/arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const void *'
> /home/arnd/linux-arm/drivers/scsi/arm/eesox.c:325:4: error: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [-Werror]
> /home/arnd/linux-arm/arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const void *'
> 
> Either we allow drivers to write to const __iomem pointers or we don't. I
> don't care which way we do it, but just saying both patches are wrong is
> not very helpful.

In both of my replies, I've said "as x86 does".  We need to follow
x86's behaviour here, which is as I've quoted - it's not a matter
that "I need to make up my mind" - my mind is already well made up.
That is, we need to follow x86 here.

That is, const volatile void __iomem * for reads, and volatile void
__iomem * for writes.

Re: [PATCH 22/24] scsi: eesox: use __iomem pointers for MMIO

[Arnd Bergmann]

On Monday 17 September 2012, Russell King - ARM Linux wrote:
> In both of my replies, I've said "as x86 does".  We need to follow
> x86's behaviour here, which is as I've quoted - it's not a matter
> that "I need to make up my mind" - my mind is already well made up.
> That is, we need to follow x86 here.
> 
> That is, const volatile void __iomem * for reads, and volatile void
> __iomem * for writes.

Ok, I'll keep the patch in the series then, as it only changes the
pointer that we do an MMIO write on, not the ones for MMIO read.

	Arnd

[PATCH 23/24] video: da8xx-fb: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: linux-fbdev@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/video/da8xx-fb.c |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 7ae9d53..113d43a 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -131,7 +131,7 @@
 #define UPPER_MARGIN	32
 #define LOWER_MARGIN	32
 
-static resource_size_t da8xx_fb_reg_base;
+static void __iomem *da8xx_fb_reg_base;
 static struct resource *lcdc_regs;
 static unsigned int lcd_revision;
 static irq_handler_t lcdc_irq_handler;
@@ -951,7 +951,7 @@ static int __devexit fb_remove(struct platform_device *dev)
 		clk_disable(par->lcdc_clk);
 		clk_put(par->lcdc_clk);
 		framebuffer_release(info);
-		iounmap((void __iomem *)da8xx_fb_reg_base);
+		iounmap(da8xx_fb_reg_base);
 		release_mem_region(lcdc_regs->start, resource_size(lcdc_regs));
 
 	}
@@ -1171,7 +1171,7 @@ static int __devinit fb_probe(struct platform_device *device)
 	if (!lcdc_regs)
 		return -EBUSY;
 
-	da8xx_fb_reg_base = (resource_size_t)ioremap(lcdc_regs->start, len);
+	da8xx_fb_reg_base = ioremap(lcdc_regs->start, len);
 	if (!da8xx_fb_reg_base) {
 		ret = -EBUSY;
 		goto err_request_mem;
@@ -1392,7 +1392,7 @@ err_clk_put:
 	clk_put(fb_clk);
 
 err_ioremap:
-	iounmap((void __iomem *)da8xx_fb_reg_base);
+	iounmap(da8xx_fb_reg_base);
 
 err_request_mem:
 	release_mem_region(lcdc_regs->start, len);
-- 
1.7.10

[PATCH 24/24] net: seeq: use __iomem pointers for MMIO

[Arnd Bergmann]

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

Cc: netdev@vger.kernel.org
Cc: "David S. Miller" <davem@davemloft.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/net/ethernet/seeq/ether3.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/seeq/ether3.c b/drivers/net/ethernet/seeq/ether3.c
index df808ac..6a40dd0 100644
--- a/drivers/net/ethernet/seeq/ether3.c
+++ b/drivers/net/ethernet/seeq/ether3.c
@@ -99,13 +99,13 @@ typedef enum {
  * The SEEQ8005 doesn't like us writing to its registers
  * too quickly.
  */
-static inline void ether3_outb(int v, const void __iomem *r)
+static inline void ether3_outb(int v, void __iomem *r)
 {
 	writeb(v, r);
 	udelay(1);
 }
 
-static inline void ether3_outw(int v, const void __iomem *r)
+static inline void ether3_outw(int v, void __iomem *r)
 {
 	writew(v, r);
 	udelay(1);
-- 
1.7.10

Re: [PATCH 24/24] net: seeq: use __iomem pointers for MMIO

[Russell King - ARM Linux]

On Fri, Sep 14, 2012 at 11:34:52PM +0200, Arnd Bergmann wrote:
> ARM is moving to stricter checks on readl/write functions,
> so we need to use the correct types everywhere.

Same comment as for eesox.  const void __iomem * is not a problem on
x86, so it should not be a problem on ARM.

Re: [PATCH 24/24] net: seeq: use __iomem pointers for MMIO

[David Miller]

From: Russell King - ARM Linux <linux@arm.linux.org.uk>
Date: Sat, 15 Sep 2012 00:56:07 +0100

> On Fri, Sep 14, 2012 at 11:34:52PM +0200, Arnd Bergmann wrote:
>> ARM is moving to stricter checks on readl/write functions,
>> so we need to use the correct types everywhere.
> 
> Same comment as for eesox.  const void __iomem * is not a problem on
> x86, so it should not be a problem on ARM.

Agreed.

Re: [PATCH 24/24] net: seeq: use __iomem pointers for MMIO

[Arnd Bergmann]

On Saturday 15 September 2012, David Miller wrote:
> From: Russell King - ARM Linux <linux@arm.linux.org.uk>
> Date: Sat, 15 Sep 2012 00:56:07 +0100
> 
> > On Fri, Sep 14, 2012 at 11:34:52PM +0200, Arnd Bergmann wrote:
> >> ARM is moving to stricter checks on readl/write functions,
> >> so we need to use the correct types everywhere.
> > 
> > Same comment as for eesox.  const void __iomem * is not a problem on
> > x86, so it should not be a problem on ARM.
> 
> Agreed.

As discussed in the thread for the same patch on the scsi eesox driver,
x86 allows reads on const __iomem pointers, but not writes, and the patch
to asm/io.h that Russell has queued up changes ARM to do the same.

My patch on seeq/ether3.c is still needed to avoid this warning in
linux-next:

drivers/net/ethernet/seeq/ether3.c: In function 'ether3_outb':
drivers/net/ethernet/seeq/ether3.c:104:2: error: passing argument 2 of '__raw_writeb' discards 'const' qualifier from pointer target type
arch/arm/include/asm/io.h:81:91: note: expected 'volatile void *' but argument is of type 'const void *'

	Arnd

Re: [PATCH 13/24] ARM: nomadik: use __iomem pointers for MMIO

[Alessandro Rubini]

> -	.options	= NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING \
> -			| NAND_NO_READRDY,
> +	.options	= NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING,

This is not clear to me, and it looks unrelated. But I admit I haven't
studied what happened to NAND_NO_READRDY lately.

If this hunk is desired and not just something else
that slipped in, then

  Acked-by: Alessandro Rubini <rubini@unipv.it>

Re: [PATCH 13/24] ARM: nomadik: use __iomem pointers for MMIO

[Arnd Bergmann]

On Saturday 15 September 2012, Alessandro Rubini wrote:
> > -     .options        = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING \
> > -                     | NAND_NO_READRDY,
> > +     .options        = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING,
> 
> This is not clear to me, and it looks unrelated. But I admit I haven't
> studied what happened to NAND_NO_READRDY lately.
> 
> If this hunk is desired and not just something else
> that slipped in, then
> 
>   Acked-by: Alessandro Rubini <rubini@unipv.it>

I've added the patch below to the next/fixes-non-critical branch now,
to avoid the build error in linux-next.

	Arnd

>From 06f8ab806e9e180966e812f6e47a0735bba638d8 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Sun, 23 Sep 2012 22:57:22 +0000
Subject: [PATCH] ARM: nomadik: remove NAND_NO_READRDY use

The nhk8815 board files uses NAND_NO_READRDY in its platform data, but
this macro is getting removed because it was not being used anywhere.

Without this patch, building nhk8815_defconfig results in:

arch/arm/mach-nomadik/board-nhk8815.c:118:6: error: 'NAND_NO_READRDY' undeclared here (not in a function)

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Alessandro Rubini <rubini@unipv.it>
Cc: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 381c080..92a0026 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -112,8 +112,7 @@ static struct mtd_partition nhk8815_partitions[] = {
 static struct nomadik_nand_platform_data nhk8815_nand_data = {
 	.parts		= nhk8815_partitions,
 	.nparts		= ARRAY_SIZE(nhk8815_partitions),
-	.options	= NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING \
-			| NAND_NO_READRDY,
+	.options	= NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING,
 	.init		= nhk8815_nand_init,
 };