[RFC/PATCH 00/11] arm: omap: counter32k rework

[RFC/PATCH 00/11] arm: omap: counter32k rework

[Felipe Balbi]

Hi,

the following patches de-obfuscate arch/arm/mach-omap2/timer.c
and start moving code to drivers/clocksource. So far only counter32k
has been moved over.

Note that we can't get rid of all the code (yet) because there are
still platforms relying to legacy boot and because of the strong
coupling with OMAP's hwmod layer.

This is, for now, an RFC and has be written on top of [1]. Boot tested
with AM335x and AM437x.

[1] http://marc.info/?l=linux-omap&m=144354336924308&w=2

ps: if anybody has a good idea on how to get rid of
register_persistent_clock(), please let me know

Felipe Balbi (11):
  arm: omap2: timer: get rid of obfuscating macros
  arm: omap2: timer: add a gptimer argument to sync32k_timer_init()
  arm: omap2: timer: remove __omap_gptimer_init()
  arm: omap2: timer: provide generic sync32k_timer_init function
  arm: omap2: timer: move realtime_counter_init() around
  arm: omap2: timer: always call clocksource_of_init() when DT
  arm: omap2: timer: remove omap4_local_timer_init
  arm: omap2: timer: rename omap_sync32k_timer_init()
  clocksource: add TI 32.768 Hz counter driver
  arm: omap2: timer: limit hwmod usage to non-DT boots
  arm: boot: dts: omap: add missing default status for 32k counter

 arch/arm/boot/dts/am4372.dtsi         |   1 +
 arch/arm/boot/dts/am437x-gp-evm.dts   |   4 +
 arch/arm/boot/dts/am437x-idk-evm.dts  |   4 +
 arch/arm/boot/dts/am437x-sk-evm.dts   |   4 +
 arch/arm/boot/dts/am43x-epos-evm.dts  |   4 +
 arch/arm/boot/dts/dra7.dtsi           |   1 +
 arch/arm/boot/dts/omap2420-h4.dts     |   4 +
 arch/arm/boot/dts/omap2420.dtsi       |   1 +
 arch/arm/boot/dts/omap2430.dtsi       |   1 +
 arch/arm/boot/dts/omap3-beagle-xm.dts |   4 +
 arch/arm/boot/dts/omap3-beagle.dts    |   4 +
 arch/arm/boot/dts/omap3-ldp.dts       |   4 +
 arch/arm/boot/dts/omap3-n900.dts      |   4 +
 arch/arm/boot/dts/omap3.dtsi          |   1 +
 arch/arm/boot/dts/omap3430-sdp.dts    |   4 +
 arch/arm/boot/dts/omap4-sdp.dts       |   4 +
 arch/arm/boot/dts/omap4.dtsi          |   1 +
 arch/arm/boot/dts/omap5-cm-t54.dts    |   4 +
 arch/arm/boot/dts/omap5-uevm.dts      |   4 +
 arch/arm/boot/dts/omap5.dtsi          |   1 +
 arch/arm/mach-omap2/board-generic.c   |  14 ++--
 arch/arm/mach-omap2/board-ldp.c       |   2 +-
 arch/arm/mach-omap2/board-rx51.c      |   2 +-
 arch/arm/mach-omap2/common.h          |   4 +-
 arch/arm/mach-omap2/timer.c           | 138 ++++++++++++++--------------------
 drivers/clocksource/Kconfig           |   8 ++
 drivers/clocksource/Makefile          |   1 +
 drivers/clocksource/timer-ti-32k.c    | 121 +++++++++++++++++++++++++++++
 28 files changed, 255 insertions(+), 94 deletions(-)
 create mode 100644 drivers/clocksource/timer-ti-32k.c

-- 
2.5.3

[RFC/PATCH 01/11] arm: omap2: timer: get rid of obfuscating macros

[Felipe Balbi]

those macros just make it a lot more difficult
to grep around and actually find similarities.

In this patch, we will simply remove them and
replace with actual functions and later commits
will come to further clean this up.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/timer.c | 70 ++++++++++++++++++++++++++++-----------------
 1 file changed, 43 insertions(+), 27 deletions(-)

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 3ebe16cd645e..1f6532bd104e 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -596,53 +596,69 @@ static inline void __init realtime_counter_init(void)
 {}
 #endif
 
-#define OMAP_SYS_GP_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,	\
-			       clksrc_nr, clksrc_src, clksrc_prop)	\
-void __init omap##name##_gptimer_timer_init(void)			\
-{									\
-	omap_clk_init();					\
-	omap_dmtimer_init();						\
-	omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);	\
-	omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src,		\
-					clksrc_prop);			\
+static void __init __omap_gptimer_init(int clkev_nr, const char *clkev_src,
+		const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
+		const char *clksrc_prop)
+{
+	omap_clk_init();
+	omap_dmtimer_init();
+	omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop);
+	omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src, clksrc_prop);
 }
 
-#define OMAP_SYS_32K_TIMER_INIT(name, clkev_nr, clkev_src, clkev_prop,	\
-				clksrc_nr, clksrc_src, clksrc_prop)	\
-void __init omap##name##_sync32k_timer_init(void)		\
-{									\
-	omap_clk_init();					\
-	omap_dmtimer_init();						\
-	omap2_gp_clockevent_init((clkev_nr), clkev_src, clkev_prop);	\
-	/* Enable the use of clocksource="gp_timer" kernel parameter */	\
-	if (use_gptimer_clksrc)						\
-		omap2_gptimer_clocksource_init((clksrc_nr), clksrc_src,	\
-						clksrc_prop);		\
-	else								\
-		omap2_sync32k_clocksource_init();			\
+static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src,
+		const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
+		const char *clksrc_prop)
+{
+	omap_clk_init();
+	omap_dmtimer_init();
+	omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop);
+
+	/* Enable the use of clocksource="gp_timer" kernel parameter */
+	if (use_gptimer_clksrc)
+		omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src,
+						clksrc_prop);
+	else
+		omap2_sync32k_clocksource_init();
 }
 
 #ifdef CONFIG_ARCH_OMAP2
-OMAP_SYS_32K_TIMER_INIT(2, 1, "timer_32k_ck", "ti,timer-alwon",
+void __init omap2_sync32k_timer_init(void)
+{
+	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
 			2, "timer_sys_ck", NULL);
+}
 #endif /* CONFIG_ARCH_OMAP2 */
 
 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
-OMAP_SYS_32K_TIMER_INIT(3, 1, "timer_32k_ck", "ti,timer-alwon",
+void __init omap3_sync32k_timer_init(void)
+{
+	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
 			2, "timer_sys_ck", NULL);
-OMAP_SYS_32K_TIMER_INIT(3_secure, 12, "secure_32k_fck", "ti,timer-secure",
+}
+
+void __init omap3_secure_sync32k_timer_init(void)
+{
+	__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
 			2, "timer_sys_ck", NULL);
+}
 #endif /* CONFIG_ARCH_OMAP3 */
 
 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
-OMAP_SYS_GP_TIMER_INIT(3, 2, "timer_sys_ck", NULL,
+void __init omap3_gptimer_timer_init(void)
+{
+	__omap_gptimer_init(2, "timer_sys_ck", NULL,
 		       1, "timer_sys_ck", "ti,timer-alwon");
+}
 #endif
 
 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
 	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
-static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon",
+static void __init omap4_sync32k_timer_init(void)
+{
+	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
 			       2, "sys_clkin_ck", NULL);
+}
 
 void __init omap4_local_timer_init(void)
 {
-- 
2.5.3

[RFC/PATCH 02/11] arm: omap2: timer: add a gptimer argument to sync32k_timer_init()

[Felipe Balbi]

as it turns out, __omap_gptimer_init() and
__omap_sync32k_timer_init() are essentially
the same thing, but __omap_gptimer_init() wants
to always use gptimer.

Instead of forcing all those devices to pass
a use_gptimer cmdline argument, we add a new
function argument to __omap_sync32k_timer_init()
in preparation to deleting __omap_gptimer_init().

On a follow-up patch, we will remove uses of
__omap_gptimer_init() and replace them with
__omap_sync32k_timer_init() and pass the last
argument as true.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/timer.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 1f6532bd104e..4f9cd4b2e6b0 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -608,14 +608,14 @@ static void __init __omap_gptimer_init(int clkev_nr, const char *clkev_src,
 
 static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src,
 		const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
-		const char *clksrc_prop)
+		const char *clksrc_prop, bool gptimer)
 {
 	omap_clk_init();
 	omap_dmtimer_init();
 	omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop);
 
 	/* Enable the use of clocksource="gp_timer" kernel parameter */
-	if (use_gptimer_clksrc)
+	if (use_gptimer_clksrc || gptimer)
 		omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src,
 						clksrc_prop);
 	else
@@ -626,7 +626,7 @@ static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src
 void __init omap2_sync32k_timer_init(void)
 {
 	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
-			2, "timer_sys_ck", NULL);
+			2, "timer_sys_ck", NULL, false);
 }
 #endif /* CONFIG_ARCH_OMAP2 */
 
@@ -634,13 +634,13 @@ void __init omap2_sync32k_timer_init(void)
 void __init omap3_sync32k_timer_init(void)
 {
 	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
-			2, "timer_sys_ck", NULL);
+			2, "timer_sys_ck", NULL, false);
 }
 
 void __init omap3_secure_sync32k_timer_init(void)
 {
 	__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
-			2, "timer_sys_ck", NULL);
+			2, "timer_sys_ck", NULL, false);
 }
 #endif /* CONFIG_ARCH_OMAP3 */
 
@@ -657,7 +657,7 @@ void __init omap3_gptimer_timer_init(void)
 static void __init omap4_sync32k_timer_init(void)
 {
 	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
-			       2, "sys_clkin_ck", NULL);
+			2, "sys_clkin_ck", NULL, false);
 }
 
 void __init omap4_local_timer_init(void)
-- 
2.5.3

[RFC/PATCH 03/11] arm: omap2: timer: remove __omap_gptimer_init()

[Felipe Balbi]

since now we can reuse __omap_sync32k_timer_init()
for OMAP3-like devices, we can safely remove
__omap_gptimer_init().

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/timer.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 4f9cd4b2e6b0..44db46ccd474 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -596,16 +596,6 @@ static inline void __init realtime_counter_init(void)
 {}
 #endif
 
-static void __init __omap_gptimer_init(int clkev_nr, const char *clkev_src,
-		const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
-		const char *clksrc_prop)
-{
-	omap_clk_init();
-	omap_dmtimer_init();
-	omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop);
-	omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src, clksrc_prop);
-}
-
 static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src,
 		const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
 		const char *clksrc_prop, bool gptimer)
@@ -647,8 +637,8 @@ void __init omap3_secure_sync32k_timer_init(void)
 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
 void __init omap3_gptimer_timer_init(void)
 {
-	__omap_gptimer_init(2, "timer_sys_ck", NULL,
-		       1, "timer_sys_ck", "ti,timer-alwon");
+	__omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
+			1, "timer_sys_ck", "ti,timer-alwon", true);
 }
 #endif
 
-- 
2.5.3

Re: [RFC/PATCH 03/11] arm: omap2: timer: remove __omap_gptimer_init()

[Tony Lindgren]

* Felipe Balbi <balbi@ti.com> [150929 13:48]:
> since now we can reuse __omap_sync32k_timer_init()
> for OMAP3-like devices, we can safely remove
> __omap_gptimer_init().

There are tons of boards out there that need to use the
high frequency ocillator source with gptimer because of the
beagleboard B4 and earlier issue #7. So we need to provide
both options for the boards. Using the high frequency
oscillator source blocks deeper idle states in hardware
so those devices are usable.

Regads,

Tony

Re: [RFC/PATCH 03/11] arm: omap2: timer: remove __omap_gptimer_init()

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 640 bytes --]

On Mon, Oct 05, 2015 at 04:01:45AM -0700, Tony Lindgren wrote:
> * Felipe Balbi <balbi@ti.com> [150929 13:48]:
> > since now we can reuse __omap_sync32k_timer_init()
> > for OMAP3-like devices, we can safely remove
> > __omap_gptimer_init().
> 
> There are tons of boards out there that need to use the
> high frequency ocillator source with gptimer because of the
> beagleboard B4 and earlier issue #7. So we need to provide
> both options for the boards. Using the high frequency
> oscillator source blocks deeper idle states in hardware
> so those devices are usable.

have a closer look, that hasn't changed

-- 
balbi

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Re: [RFC/PATCH 03/11] arm: omap2: timer: remove __omap_gptimer_init()

[Tony Lindgren]

* Felipe Balbi <balbi@ti.com> [151005 08:29]:
> On Mon, Oct 05, 2015 at 04:01:45AM -0700, Tony Lindgren wrote:
> > * Felipe Balbi <balbi@ti.com> [150929 13:48]:
> > > since now we can reuse __omap_sync32k_timer_init()
> > > for OMAP3-like devices, we can safely remove
> > > __omap_gptimer_init().
> > 
> > There are tons of boards out there that need to use the
> > high frequency ocillator source with gptimer because of the
> > beagleboard B4 and earlier issue #7. So we need to provide
> > both options for the boards. Using the high frequency
> > oscillator source blocks deeper idle states in hardware
> > so those devices are usable.
> 
> have a closer look, that hasn't changed

Oh right, you added the argument in the previous patch.
Maybe update the description a bit to make that clear?
I understood that we can only use the sync32k source now..

The __omap_sync32k_timer_init should not be called
"sync32k" as that's TRM name for the always-on counter :)

Regards,

Tony

Re: [RFC/PATCH 03/11] arm: omap2: timer: remove __omap_gptimer_init()

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 1159 bytes --]

On Mon, Oct 05, 2015 at 09:02:25AM -0700, Tony Lindgren wrote:
> * Felipe Balbi <balbi@ti.com> [151005 08:29]:
> > On Mon, Oct 05, 2015 at 04:01:45AM -0700, Tony Lindgren wrote:
> > > * Felipe Balbi <balbi@ti.com> [150929 13:48]:
> > > > since now we can reuse __omap_sync32k_timer_init()
> > > > for OMAP3-like devices, we can safely remove
> > > > __omap_gptimer_init().
> > > 
> > > There are tons of boards out there that need to use the
> > > high frequency ocillator source with gptimer because of the
> > > beagleboard B4 and earlier issue #7. So we need to provide
> > > both options for the boards. Using the high frequency
> > > oscillator source blocks deeper idle states in hardware
> > > so those devices are usable.
> > 
> > have a closer look, that hasn't changed
> 
> Oh right, you added the argument in the previous patch.
> Maybe update the description a bit to make that clear?
> I understood that we can only use the sync32k source now..
> 
> The __omap_sync32k_timer_init should not be called
> "sync32k" as that's TRM name for the always-on counter :)

that's renamed on a follow-up patch, too ;-)

-- 
balbi

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Re: [RFC/PATCH 03/11] arm: omap2: timer: remove __omap_gptimer_init()

[Tony Lindgren]

* Felipe Balbi <balbi@ti.com> [151005 09:13]:
> On Mon, Oct 05, 2015 at 09:02:25AM -0700, Tony Lindgren wrote:
> > * Felipe Balbi <balbi@ti.com> [151005 08:29]:
> > > On Mon, Oct 05, 2015 at 04:01:45AM -0700, Tony Lindgren wrote:
> > > > * Felipe Balbi <balbi@ti.com> [150929 13:48]:
> > > > > since now we can reuse __omap_sync32k_timer_init()
> > > > > for OMAP3-like devices, we can safely remove
> > > > > __omap_gptimer_init().
> > > > 
> > > > There are tons of boards out there that need to use the
> > > > high frequency ocillator source with gptimer because of the
> > > > beagleboard B4 and earlier issue #7. So we need to provide
> > > > both options for the boards. Using the high frequency
> > > > oscillator source blocks deeper idle states in hardware
> > > > so those devices are usable.
> > > 
> > > have a closer look, that hasn't changed
> > 
> > Oh right, you added the argument in the previous patch.
> > Maybe update the description a bit to make that clear?
> > I understood that we can only use the sync32k source now..
> > 
> > The __omap_sync32k_timer_init should not be called
> > "sync32k" as that's TRM name for the always-on counter :)
> 
> that's renamed on a follow-up patch, too ;-)

OK so then I suggest updating the description with something
like "With __omap_sync32k_timer_init() now taking the clock
source as a parameter, we no longer need __omap_gptimer_init().
Note that __omap_sync32k_timer_init() gets renamed in the
later patches as it's no longer 32k source specific".

Regards,

Tony

[RFC/PATCH 04/11] arm: omap2: timer: provide generic sync32k_timer_init function

[Felipe Balbi]

instead of constantly defining a small wrapper
around __omap_sync32k_timer_init(), let's define
a generic one which can be used by all OMAPs.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/board-generic.c | 10 +++++-----
 arch/arm/mach-omap2/board-ldp.c     |  2 +-
 arch/arm/mach-omap2/board-rx51.c    |  2 +-
 arch/arm/mach-omap2/common.h        |  3 +--
 arch/arm/mach-omap2/timer.c         | 20 +++-----------------
 5 files changed, 11 insertions(+), 26 deletions(-)

diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 89bf39663d61..d08191ffabd9 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -53,7 +53,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
 	.map_io		= omap242x_map_io,
 	.init_early	= omap2420_init_early,
 	.init_machine	= omap_generic_init,
-	.init_time	= omap2_sync32k_timer_init,
+	.init_time	= omap_sync32k_timer_init,
 	.dt_compat	= omap242x_boards_compat,
 	.restart	= omap2xxx_restart,
 MACHINE_END
@@ -70,7 +70,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
 	.map_io		= omap243x_map_io,
 	.init_early	= omap2430_init_early,
 	.init_machine	= omap_generic_init,
-	.init_time	= omap2_sync32k_timer_init,
+	.init_time	= omap_sync32k_timer_init,
 	.dt_compat	= omap243x_boards_compat,
 	.restart	= omap2xxx_restart,
 MACHINE_END
@@ -89,7 +89,7 @@ DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
 	.init_early	= omap3430_init_early,
 	.init_machine	= omap_generic_init,
 	.init_late	= omap3_init_late,
-	.init_time	= omap3_sync32k_timer_init,
+	.init_time	= omap_sync32k_timer_init,
 	.dt_compat	= n900_boards_compat,
 	.restart	= omap3xxx_restart,
 MACHINE_END
@@ -107,7 +107,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
 	.init_early	= omap3430_init_early,
 	.init_machine	= omap_generic_init,
 	.init_late	= omap3_init_late,
-	.init_time	= omap3_sync32k_timer_init,
+	.init_time	= omap_sync32k_timer_init,
 	.dt_compat	= omap3_boards_compat,
 	.restart	= omap3xxx_restart,
 MACHINE_END
@@ -123,7 +123,7 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
 	.init_early	= omap3630_init_early,
 	.init_machine	= omap_generic_init,
 	.init_late	= omap3_init_late,
-	.init_time	= omap3_sync32k_timer_init,
+	.init_time	= omap_sync32k_timer_init,
 	.dt_compat	= omap36xx_boards_compat,
 	.restart	= omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index c2975af4cd5d..0d3a57c6931f 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -424,6 +424,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
 	.init_irq	= omap3_init_irq,
 	.init_machine	= omap_ldp_init,
 	.init_late	= omap3430_init_late,
-	.init_time	= omap3_sync32k_timer_init,
+	.init_time	= omap_sync32k_timer_init,
 	.restart	= omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 2d1e5a6beb85..830256c434ec 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -136,6 +136,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
 	.init_irq	= omap3_init_irq,
 	.init_machine	= rx51_init,
 	.init_late	= omap3430_init_late,
-	.init_time	= omap3_sync32k_timer_init,
+	.init_time	= omap_sync32k_timer_init,
 	.restart	= omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 92e92cfc2775..844ad031f7f0 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -88,8 +88,7 @@ static inline int omap_mux_late_init(void)
 
 extern void omap2_init_common_infrastructure(void);
 
-extern void omap2_sync32k_timer_init(void);
-extern void omap3_sync32k_timer_init(void);
+extern void omap_sync32k_timer_init(void);
 extern void omap3_secure_sync32k_timer_init(void);
 extern void omap3_gptimer_timer_init(void);
 extern void omap4_local_timer_init(void);
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 44db46ccd474..a416bcb38f2c 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -612,21 +612,13 @@ static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src
 		omap2_sync32k_clocksource_init();
 }
 
-#ifdef CONFIG_ARCH_OMAP2
-void __init omap2_sync32k_timer_init(void)
+void __init omap_sync32k_timer_init(void)
 {
 	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
 			2, "timer_sys_ck", NULL, false);
 }
-#endif /* CONFIG_ARCH_OMAP2 */
 
 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
-void __init omap3_sync32k_timer_init(void)
-{
-	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
-			2, "timer_sys_ck", NULL, false);
-}
-
 void __init omap3_secure_sync32k_timer_init(void)
 {
 	__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
@@ -644,15 +636,9 @@ void __init omap3_gptimer_timer_init(void)
 
 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
 	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
-static void __init omap4_sync32k_timer_init(void)
-{
-	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
-			2, "sys_clkin_ck", NULL, false);
-}
-
 void __init omap4_local_timer_init(void)
 {
-	omap4_sync32k_timer_init();
+	omap_sync32k_timer_init();
 	clocksource_of_init();
 }
 #endif
@@ -660,7 +646,7 @@ void __init omap4_local_timer_init(void)
 #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
 void __init omap5_realtime_timer_init(void)
 {
-	omap4_sync32k_timer_init();
+	omap_sync32k_timer_init();
 	realtime_counter_init();
 
 	clocksource_of_init();
-- 
2.5.3

[RFC/PATCH 05/11] arm: omap2: timer: move realtime_counter_init() around

[Felipe Balbi]

no functional changes, just moving that function
closer to its calling location.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/timer.c | 102 ++++++++++++++++++++++----------------------
 1 file changed, 50 insertions(+), 52 deletions(-)

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index a416bcb38f2c..deccec2d6ed8 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -480,7 +480,55 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
 			clocksource_gpt.name, clksrc.rate);
 }
 
-#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
+static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src,
+		const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
+		const char *clksrc_prop, bool gptimer)
+{
+	omap_clk_init();
+	omap_dmtimer_init();
+	omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop);
+
+	/* Enable the use of clocksource="gp_timer" kernel parameter */
+	if (use_gptimer_clksrc || gptimer)
+		omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src,
+						clksrc_prop);
+	else
+		omap2_sync32k_clocksource_init();
+}
+
+void __init omap_sync32k_timer_init(void)
+{
+	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
+			2, "timer_sys_ck", NULL, false);
+}
+
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
+void __init omap3_secure_sync32k_timer_init(void)
+{
+	__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
+			2, "timer_sys_ck", NULL, false);
+}
+#endif /* CONFIG_ARCH_OMAP3 */
+
+#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
+void __init omap3_gptimer_timer_init(void)
+{
+	__omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
+			1, "timer_sys_ck", "ti,timer-alwon", true);
+}
+#endif
+
+#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
+	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
+void __init omap4_local_timer_init(void)
+{
+	omap_sync32k_timer_init();
+	clocksource_of_init();
+}
+#endif
+
+#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
+
 /*
  * The realtime counter also called master counter, is a free-running
  * counter, which is related to real time. It produces the count used
@@ -492,6 +540,7 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
  */
 static void __init realtime_counter_init(void)
 {
+#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
 	void __iomem *base;
 	static struct clk *sys_clk;
 	unsigned long rate;
@@ -590,60 +639,9 @@ sysclk1_based:
 	set_cntfreq();
 
 	iounmap(base);
-}
-#else
-static inline void __init realtime_counter_init(void)
-{}
 #endif
-
-static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src,
-		const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
-		const char *clksrc_prop, bool gptimer)
-{
-	omap_clk_init();
-	omap_dmtimer_init();
-	omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop);
-
-	/* Enable the use of clocksource="gp_timer" kernel parameter */
-	if (use_gptimer_clksrc || gptimer)
-		omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src,
-						clksrc_prop);
-	else
-		omap2_sync32k_clocksource_init();
-}
-
-void __init omap_sync32k_timer_init(void)
-{
-	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
-			2, "timer_sys_ck", NULL, false);
 }
 
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
-void __init omap3_secure_sync32k_timer_init(void)
-{
-	__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
-			2, "timer_sys_ck", NULL, false);
-}
-#endif /* CONFIG_ARCH_OMAP3 */
-
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX)
-void __init omap3_gptimer_timer_init(void)
-{
-	__omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
-			1, "timer_sys_ck", "ti,timer-alwon", true);
-}
-#endif
-
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
-	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
-void __init omap4_local_timer_init(void)
-{
-	omap_sync32k_timer_init();
-	clocksource_of_init();
-}
-#endif
-
-#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
 void __init omap5_realtime_timer_init(void)
 {
 	omap_sync32k_timer_init();
-- 
2.5.3

[RFC/PATCH 06/11] arm: omap2: timer: always call clocksource_of_init() when DT

[Felipe Balbi]

If booting with DT, let's make sure to always
call clocksource_of_init() as this will make
it easier to move timer code to drivers/clocksource
in the future.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/timer.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index deccec2d6ed8..1ae563736b12 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -500,6 +500,9 @@ void __init omap_sync32k_timer_init(void)
 {
 	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
 			2, "timer_sys_ck", NULL, false);
+
+	if (of_have_populated_dt())
+		clocksource_of_init();
 }
 
 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
@@ -523,7 +526,6 @@ void __init omap3_gptimer_timer_init(void)
 void __init omap4_local_timer_init(void)
 {
 	omap_sync32k_timer_init();
-	clocksource_of_init();
 }
 #endif
 
@@ -644,10 +646,8 @@ sysclk1_based:
 
 void __init omap5_realtime_timer_init(void)
 {
-	omap_sync32k_timer_init();
 	realtime_counter_init();
-
-	clocksource_of_init();
+	omap_sync32k_timer_init();
 }
 #endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */
 
-- 
2.5.3

[RFC/PATCH 07/11] arm: omap2: timer: remove omap4_local_timer_init

[Felipe Balbi]

We're now always calling clocksource_of_init()
whenever booting with DT, so we can use the
generic omap_sync32k_timer_init() (which will
be renamed in a follow-up patch) for OMAP4
as well.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/board-generic.c | 4 ++--
 arch/arm/mach-omap2/common.h        | 1 -
 arch/arm/mach-omap2/timer.c         | 8 --------
 3 files changed, 2 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index d08191ffabd9..13f7df92baf4 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -235,7 +235,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
 	.init_irq	= omap_gic_of_init,
 	.init_machine	= omap_generic_init,
 	.init_late	= omap4430_init_late,
-	.init_time	= omap4_local_timer_init,
+	.init_time	= omap_sync32k_timer_init,
 	.dt_compat	= omap4_boards_compat,
 	.restart	= omap44xx_restart,
 MACHINE_END
@@ -279,7 +279,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
 	.init_late	= am43xx_init_late,
 	.init_irq	= omap_gic_of_init,
 	.init_machine	= omap_generic_init,
-	.init_time	= omap4_local_timer_init,
+	.init_time	= omap_sync32k_timer_init,
 	.dt_compat	= am43_boards_compat,
 	.restart	= omap44xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 844ad031f7f0..bf42fc4e78f4 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -91,7 +91,6 @@ extern void omap2_init_common_infrastructure(void);
 extern void omap_sync32k_timer_init(void);
 extern void omap3_secure_sync32k_timer_init(void);
 extern void omap3_gptimer_timer_init(void);
-extern void omap4_local_timer_init(void);
 #ifdef CONFIG_CACHE_L2X0
 int omap_l2_cache_init(void);
 #define OMAP_L2C_AUX_CTRL	(L2C_AUX_CTRL_SHARED_OVERRIDE | \
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 1ae563736b12..86c726ba2dd9 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -521,14 +521,6 @@ void __init omap3_gptimer_timer_init(void)
 }
 #endif
 
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
-	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
-void __init omap4_local_timer_init(void)
-{
-	omap_sync32k_timer_init();
-}
-#endif
-
 #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
 
 /*
-- 
2.5.3

[RFC/PATCH 08/11] arm: omap2: timer: rename omap_sync32k_timer_init()

[Felipe Balbi]

this function is not only about the 32k sync
timer, it's OMAP's generic init_time implementation.

Let's rename it to make that detail easier to
notice.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/board-generic.c | 14 +++++++-------
 arch/arm/mach-omap2/board-ldp.c     |  2 +-
 arch/arm/mach-omap2/board-rx51.c    |  2 +-
 arch/arm/mach-omap2/common.h        |  2 +-
 arch/arm/mach-omap2/timer.c         |  4 ++--
 5 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 13f7df92baf4..0052cfa18a8d 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -53,7 +53,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
 	.map_io		= omap242x_map_io,
 	.init_early	= omap2420_init_early,
 	.init_machine	= omap_generic_init,
-	.init_time	= omap_sync32k_timer_init,
+	.init_time	= omap_init_time,
 	.dt_compat	= omap242x_boards_compat,
 	.restart	= omap2xxx_restart,
 MACHINE_END
@@ -70,7 +70,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
 	.map_io		= omap243x_map_io,
 	.init_early	= omap2430_init_early,
 	.init_machine	= omap_generic_init,
-	.init_time	= omap_sync32k_timer_init,
+	.init_time	= omap_init_time,
 	.dt_compat	= omap243x_boards_compat,
 	.restart	= omap2xxx_restart,
 MACHINE_END
@@ -89,7 +89,7 @@ DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
 	.init_early	= omap3430_init_early,
 	.init_machine	= omap_generic_init,
 	.init_late	= omap3_init_late,
-	.init_time	= omap_sync32k_timer_init,
+	.init_time	= omap_init_time,
 	.dt_compat	= n900_boards_compat,
 	.restart	= omap3xxx_restart,
 MACHINE_END
@@ -107,7 +107,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
 	.init_early	= omap3430_init_early,
 	.init_machine	= omap_generic_init,
 	.init_late	= omap3_init_late,
-	.init_time	= omap_sync32k_timer_init,
+	.init_time	= omap_init_time,
 	.dt_compat	= omap3_boards_compat,
 	.restart	= omap3xxx_restart,
 MACHINE_END
@@ -123,7 +123,7 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
 	.init_early	= omap3630_init_early,
 	.init_machine	= omap_generic_init,
 	.init_late	= omap3_init_late,
-	.init_time	= omap_sync32k_timer_init,
+	.init_time	= omap_init_time,
 	.dt_compat	= omap36xx_boards_compat,
 	.restart	= omap3xxx_restart,
 MACHINE_END
@@ -235,7 +235,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
 	.init_irq	= omap_gic_of_init,
 	.init_machine	= omap_generic_init,
 	.init_late	= omap4430_init_late,
-	.init_time	= omap_sync32k_timer_init,
+	.init_time	= omap_init_time,
 	.dt_compat	= omap4_boards_compat,
 	.restart	= omap44xx_restart,
 MACHINE_END
@@ -279,7 +279,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
 	.init_late	= am43xx_init_late,
 	.init_irq	= omap_gic_of_init,
 	.init_machine	= omap_generic_init,
-	.init_time	= omap_sync32k_timer_init,
+	.init_time	= omap_init_time,
 	.dt_compat	= am43_boards_compat,
 	.restart	= omap44xx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 0d3a57c6931f..d9c3ffc39329 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -424,6 +424,6 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
 	.init_irq	= omap3_init_irq,
 	.init_machine	= omap_ldp_init,
 	.init_late	= omap3430_init_late,
-	.init_time	= omap_sync32k_timer_init,
+	.init_time	= omap_init_time,
 	.restart	= omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 830256c434ec..41161ca97d74 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -136,6 +136,6 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
 	.init_irq	= omap3_init_irq,
 	.init_machine	= rx51_init,
 	.init_late	= omap3430_init_late,
-	.init_time	= omap_sync32k_timer_init,
+	.init_time	= omap_init_time,
 	.restart	= omap3xxx_restart,
 MACHINE_END
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index bf42fc4e78f4..e1e274334290 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -88,7 +88,7 @@ static inline int omap_mux_late_init(void)
 
 extern void omap2_init_common_infrastructure(void);
 
-extern void omap_sync32k_timer_init(void);
+extern void omap_init_time(void);
 extern void omap3_secure_sync32k_timer_init(void);
 extern void omap3_gptimer_timer_init(void);
 #ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 86c726ba2dd9..8b3ac8d5d38b 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -496,7 +496,7 @@ static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src
 		omap2_sync32k_clocksource_init();
 }
 
-void __init omap_sync32k_timer_init(void)
+void __init omap_init_time(void)
 {
 	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
 			2, "timer_sys_ck", NULL, false);
@@ -639,7 +639,7 @@ sysclk1_based:
 void __init omap5_realtime_timer_init(void)
 {
 	realtime_counter_init();
-	omap_sync32k_timer_init();
+	omap_init_time();
 }
 #endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */
 
-- 
2.5.3

[RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

[Felipe Balbi]

Introduce a new clocksource driver for Texas
Instruments 32.768 Hz device which is available
on most OMAP-like devices.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 drivers/clocksource/Kconfig        |   8 +++
 drivers/clocksource/Makefile       |   1 +
 drivers/clocksource/timer-ti-32k.c | 121 +++++++++++++++++++++++++++++++++++++
 3 files changed, 130 insertions(+)
 create mode 100644 drivers/clocksource/timer-ti-32k.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a7726db13abb..0ccfd12a00a3 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -115,6 +115,14 @@ config CLKSRC_PISTACHIO
 	bool
 	select CLKSRC_OF
 
+config CLKSRC_TI_32K
+	bool "Texas Instruments 32.768 Hz Clocksource"
+	depends on OF && ARCH_OMAP2PLUS
+	select CLKSRC_OF
+	help
+	  This option enables support for Texas Instruments 32.768 Hz clocksource
+	  available on many OMAP-like platforms.
+
 config CLKSRC_STM32
 	bool "Clocksource for STM32 SoCs" if !ARCH_STM32
 	depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 5c00863c3e33..749abc3665b3 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER)	+= vf_pit_timer.o
 obj-$(CONFIG_CLKSRC_QCOM)	+= qcom-timer.o
 obj-$(CONFIG_MTK_TIMER)		+= mtk_timer.o
 obj-$(CONFIG_CLKSRC_PISTACHIO)	+= time-pistachio.o
+obj-$(CONFIG_CLKSRC_TI_32K)	+= timer-ti-32k.o
 
 obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o
 obj-$(CONFIG_ARM_GLOBAL_TIMER)		+= arm_global_timer.o
diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c
new file mode 100644
index 000000000000..10ccce2eb645
--- /dev/null
+++ b/drivers/clocksource/timer-ti-32k.c
@@ -0,0 +1,121 @@
+/**
+ * timer-ti-32k.c - OMAP2 32k Timer Support
+ *
+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2  of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/init.h>
+#include <linux/time.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/irq.h>
+#include <linux/sched_clock.h>
+#include <linux/clocksource.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#include <asm/mach/time.h>
+
+/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
+#define OMAP2_32KSYNCNT_REV_OFF		0x0
+#define OMAP2_32KSYNCNT_REV_SCHEME	(0x3 << 30)
+#define OMAP2_32KSYNCNT_CR_OFF_LOW	0x10
+#define OMAP2_32KSYNCNT_CR_OFF_HIGH	0x30
+
+/*
+ * 32KHz clocksource ... always available, on pretty most chips except
+ * OMAP 730 and 1510.  Other timers could be used as clocksources, with
+ * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
+ * but systems won't necessarily want to spend resources that way.
+ */
+static void __iomem *sync32k_cnt_reg;
+
+/**
+ * omap_read_persistent_clock64 -  Return time from a persistent clock.
+ *
+ * Reads the time from a source which isn't disabled during PM, the
+ * 32k sync timer.  Convert the cycles elapsed since last read into
+ * nsecs and adds to a monotonically increasing timespec64.
+ */
+static struct timespec64 persistent_ts;
+static cycles_t cycles;
+static unsigned int persistent_mult, persistent_shift;
+
+static u64 notrace omap_32k_read_sched_clock(void)
+{
+	return readl_relaxed(sync32k_cnt_reg);
+}
+
+static void omap_read_persistent_clock64(struct timespec64 *ts)
+{
+	unsigned long long nsecs;
+	cycles_t last_cycles;
+
+	last_cycles = cycles;
+	cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
+
+	nsecs = clocksource_cyc2ns(cycles - last_cycles,
+					persistent_mult, persistent_shift);
+
+	timespec64_add_ns(&persistent_ts, nsecs);
+
+	*ts = persistent_ts;
+}
+
+static void __init ti_32k_timer_init(struct device_node *np)
+{
+	void __iomem *vbase;
+	int ret;
+
+	vbase = of_iomap(np, 0);
+	if (!vbase) {
+		pr_err("Can't ioremap 32k timer base\n");
+		return;
+	}
+
+	/*
+	 * 32k sync Counter IP register offsets vary between the
+	 * highlander version and the legacy ones.
+	 * The 'SCHEME' bits(30-31) of the revision register is used
+	 * to identify the version.
+	 */
+	if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) &
+						OMAP2_32KSYNCNT_REV_SCHEME)
+		sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_HIGH;
+	else
+		sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW;
+
+	/*
+	 * 120000 rough estimate from the calculations in
+	 * __clocksource_update_freq_scale.
+	 */
+	clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
+			32768, NSEC_PER_SEC, 120000);
+
+	ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
+				250, 32, clocksource_mmio_readl_up);
+	if (ret) {
+		pr_err("32k_counter: can't register clocksource\n");
+		return;
+	}
+
+	sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
+	register_persistent_clock(NULL, omap_read_persistent_clock64);
+	pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
+}
+CLOCKSOURCE_OF_DECLARE(ti_32k_timer, "ti,omap-counter32k",
+		ti_32k_timer_init);
-- 
2.5.3

Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

[John Stultz]

On Tue, Sep 29, 2015 at 1:44 PM, Felipe Balbi <balbi@ti.com> wrote:
> Introduce a new clocksource driver for Texas
> Instruments 32.768 Hz device which is available
> on most OMAP-like devices.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---
>  drivers/clocksource/Kconfig        |   8 +++
>  drivers/clocksource/Makefile       |   1 +
>  drivers/clocksource/timer-ti-32k.c | 121 +++++++++++++++++++++++++++++++++++++
>  3 files changed, 130 insertions(+)
>  create mode 100644 drivers/clocksource/timer-ti-32k.c
>
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index a7726db13abb..0ccfd12a00a3 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -115,6 +115,14 @@ config CLKSRC_PISTACHIO
>         bool
>         select CLKSRC_OF
>
> +config CLKSRC_TI_32K
> +       bool "Texas Instruments 32.768 Hz Clocksource"
> +       depends on OF && ARCH_OMAP2PLUS
> +       select CLKSRC_OF
> +       help
> +         This option enables support for Texas Instruments 32.768 Hz clocksource
> +         available on many OMAP-like platforms.
> +
>  config CLKSRC_STM32
>         bool "Clocksource for STM32 SoCs" if !ARCH_STM32
>         depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index 5c00863c3e33..749abc3665b3 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER)    += vf_pit_timer.o
>  obj-$(CONFIG_CLKSRC_QCOM)      += qcom-timer.o
>  obj-$(CONFIG_MTK_TIMER)                += mtk_timer.o
>  obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o
> +obj-$(CONFIG_CLKSRC_TI_32K)    += timer-ti-32k.o
>
>  obj-$(CONFIG_ARM_ARCH_TIMER)           += arm_arch_timer.o
>  obj-$(CONFIG_ARM_GLOBAL_TIMER)         += arm_global_timer.o
> diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c
> new file mode 100644
> index 000000000000..10ccce2eb645
> --- /dev/null
> +++ b/drivers/clocksource/timer-ti-32k.c
> @@ -0,0 +1,121 @@
> +/**
> + * timer-ti-32k.c - OMAP2 32k Timer Support
> + *
> + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
> + *
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2  of
> + * the License as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/time.h>
> +#include <linux/interrupt.h>
> +#include <linux/err.h>
> +#include <linux/irq.h>
> +#include <linux/sched_clock.h>
> +#include <linux/clocksource.h>
> +#include <linux/slab.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +
> +#include <asm/mach/time.h>
> +
> +/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
> +#define OMAP2_32KSYNCNT_REV_OFF                0x0
> +#define OMAP2_32KSYNCNT_REV_SCHEME     (0x3 << 30)
> +#define OMAP2_32KSYNCNT_CR_OFF_LOW     0x10
> +#define OMAP2_32KSYNCNT_CR_OFF_HIGH    0x30
> +
> +/*
> + * 32KHz clocksource ... always available, on pretty most chips except
> + * OMAP 730 and 1510.  Other timers could be used as clocksources, with
> + * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
> + * but systems won't necessarily want to spend resources that way.
> + */
> +static void __iomem *sync32k_cnt_reg;
> +
> +/**
> + * omap_read_persistent_clock64 -  Return time from a persistent clock.
> + *
> + * Reads the time from a source which isn't disabled during PM, the
> + * 32k sync timer.  Convert the cycles elapsed since last read into
> + * nsecs and adds to a monotonically increasing timespec64.
> + */
> +static struct timespec64 persistent_ts;
> +static cycles_t cycles;
> +static unsigned int persistent_mult, persistent_shift;
> +
> +static u64 notrace omap_32k_read_sched_clock(void)
> +{
> +       return readl_relaxed(sync32k_cnt_reg);
> +}
> +
> +static void omap_read_persistent_clock64(struct timespec64 *ts)
> +{
> +       unsigned long long nsecs;
> +       cycles_t last_cycles;
> +
> +       last_cycles = cycles;
> +       cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
> +
> +       nsecs = clocksource_cyc2ns(cycles - last_cycles,
> +                                       persistent_mult, persistent_shift);
> +
> +       timespec64_add_ns(&persistent_ts, nsecs);
> +
> +       *ts = persistent_ts;
> +}

So this doesn't look to really be a persistent clock (like an RTC),
and is more just a clock that doesn't halt in suspend, right?
(I know some devices used this trick to provide suspend timing w/o an RTC).

That said, we do now support CLOCK_SOURCE_SUSPEND_NONSTOP, which
allows us to do suspend timing from the clocksource itself, so you
should be able to add that flag to the clocksource flags and drop all
the persistent clock bit here.

thanks
-john

Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

[Daniel Lezcano]

Hi Felipe,


On 09/29/2015 10:44 PM, Felipe Balbi wrote:
> Introduce a new clocksource driver for Texas
> Instruments 32.768 Hz device which is available
> on most OMAP-like devices.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---

[ ... ]

> +config CLKSRC_TI_32K
> +	bool "Texas Instruments 32.768 Hz Clocksource"
> +	depends on OF && ARCH_OMAP2PLUS
> +	select CLKSRC_OF
> +	help
> +	  This option enables support for Texas Instruments 32.768 Hz clocksource
> +	  available on many OMAP-like platforms.
> +

It is the omap's Kconfig which should select the timer, not the user to 
enable the timer.

It should be something like:

config CLKSRC_TI_32K
	bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
	select CLKSRC_OF if OF
	help
	  This option enables support for Texas Instruments 32.768 Hz
	  clocksource available on many OMAP-like platforms.

And in the omap's Kconfig:
	select CLKSRC_TI_32K


>   config CLKSRC_STM32
>   	bool "Clocksource for STM32 SoCs" if !ARCH_STM32
>   	depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST)
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index 5c00863c3e33..749abc3665b3 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -45,6 +45,7 @@ obj-$(CONFIG_VF_PIT_TIMER)	+= vf_pit_timer.o
>   obj-$(CONFIG_CLKSRC_QCOM)	+= qcom-timer.o
>   obj-$(CONFIG_MTK_TIMER)		+= mtk_timer.o
>   obj-$(CONFIG_CLKSRC_PISTACHIO)	+= time-pistachio.o
> +obj-$(CONFIG_CLKSRC_TI_32K)	+= timer-ti-32k.o
>
>   obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o
>   obj-$(CONFIG_ARM_GLOBAL_TIMER)		+= arm_global_timer.o
> diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c
> new file mode 100644
> index 000000000000..10ccce2eb645
> --- /dev/null
> +++ b/drivers/clocksource/timer-ti-32k.c
> @@ -0,0 +1,121 @@
> +/**
> + * timer-ti-32k.c - OMAP2 32k Timer Support
> + *
> + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
> + *
> + * This program is free software: you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2  of
> + * the License as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/time.h>
> +#include <linux/interrupt.h>
> +#include <linux/err.h>
> +#include <linux/irq.h>
> +#include <linux/sched_clock.h>
> +#include <linux/clocksource.h>
> +#include <linux/slab.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +
> +#include <asm/mach/time.h>

Can you check all these headers are needed ? I don't think interrupt.h, 
or slab.h or irq.h, etc ... are needed.

A few nits below:

> +/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */

I am not sure this comment gives some interesting indication.

> +#define OMAP2_32KSYNCNT_REV_OFF		0x0
> +#define OMAP2_32KSYNCNT_REV_SCHEME	(0x3 << 30)
> +#define OMAP2_32KSYNCNT_CR_OFF_LOW	0x10
> +#define OMAP2_32KSYNCNT_CR_OFF_HIGH	0x30
> +
> +/*
> + * 32KHz clocksource ... always available, on pretty most chips except
> + * OMAP 730 and 1510.  Other timers could be used as clocksources, with
> + * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
> + * but systems won't necessarily want to spend resources that way.
> + */
> +static void __iomem *sync32k_cnt_reg;
> +
> +/**
> + * omap_read_persistent_clock64 -  Return time from a persistent clock.
> + *
> + * Reads the time from a source which isn't disabled during PM, the
> + * 32k sync timer.  Convert the cycles elapsed since last read into
> + * nsecs and adds to a monotonically increasing timespec64.
> + */

This comment above should be moved right before the function it 
describes and in order to comply with the kernel-doc format the 
parameters must be documented also:
...
* @ts:	....
...


> +static struct timespec64 persistent_ts;
> +static cycles_t cycles;
> +static unsigned int persistent_mult, persistent_shift;
> +
> +static u64 notrace omap_32k_read_sched_clock(void)
> +{
> +	return readl_relaxed(sync32k_cnt_reg);
> +}
> +
> +static void omap_read_persistent_clock64(struct timespec64 *ts)
> +{
> +	unsigned long long nsecs;
> +	cycles_t last_cycles;
> +
> +	last_cycles = cycles;
> +	cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;

This test is pointless because 'sync32k_cnt_reg' is always different 
from zero regarding the init routine, no ?

> +
> +	nsecs = clocksource_cyc2ns(cycles - last_cycles,
> +					persistent_mult, persistent_shift);
> +
> +	timespec64_add_ns(&persistent_ts, nsecs);
> +
> +	*ts = persistent_ts;
> +}
> +
> +static void __init ti_32k_timer_init(struct device_node *np)
> +{
> +	void __iomem *vbase;
> +	int ret;
> +
> +	vbase = of_iomap(np, 0);
> +	if (!vbase) {
> +		pr_err("Can't ioremap 32k timer base\n");
> +		return;
> +	}
> +
> +	/*
> +	 * 32k sync Counter IP register offsets vary between the
> +	 * highlander version and the legacy ones.
> +	 * The 'SCHEME' bits(30-31) of the revision register is used
> +	 * to identify the version.
> +	 */

Please fix comment length.

> +	if (readl_relaxed(vbase + OMAP2_32KSYNCNT_REV_OFF) &
> +						OMAP2_32KSYNCNT_REV_SCHEME)
> +		sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_HIGH;
> +	else
> +		sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW;
> +
> +	/*
> +	 * 120000 rough estimate from the calculations in
> +	 * __clocksource_update_freq_scale.
> +	 */

Fix comment length also.

> +	clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
> +			32768, NSEC_PER_SEC, 120000);
> +
> +	ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
> +				250, 32, clocksource_mmio_readl_up);
> +	if (ret) {
> +		pr_err("32k_counter: can't register clocksource\n");
> +		return;
> +	}
> +
> +	sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
> +	register_persistent_clock(NULL, omap_read_persistent_clock64);

I will let John Stultz to have a look at this part because I have doubt 
regarding the usage of the persistent clock.


   -- Daniel


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Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

[Tony Lindgren]

* Daniel Lezcano <daniel.lezcano@linaro.org> [151001 15:04]:
> >+	clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
> >+			32768, NSEC_PER_SEC, 120000);
> >+
> >+	ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
> >+				250, 32, clocksource_mmio_readl_up);
> >+	if (ret) {
> >+		pr_err("32k_counter: can't register clocksource\n");
> >+		return;
> >+	}
> >+
> >+	sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
> >+	register_persistent_clock(NULL, omap_read_persistent_clock64);
> 
> I will let John Stultz to have a look at this part because I have doubt
> regarding the usage of the persistent clock.

The persistent clock we want to keep for deeper idle states..
Especially when we start changing clocksource for the duration of
deeper idle states. I'll post some updated patches on that when I
get a chance.

Regards,

Tony

Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [151005 03:56]:
> * Daniel Lezcano <daniel.lezcano@linaro.org> [151001 15:04]:
> > >+	clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
> > >+			32768, NSEC_PER_SEC, 120000);
> > >+
> > >+	ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768,
> > >+				250, 32, clocksource_mmio_readl_up);
> > >+	if (ret) {
> > >+		pr_err("32k_counter: can't register clocksource\n");
> > >+		return;
> > >+	}
> > >+
> > >+	sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
> > >+	register_persistent_clock(NULL, omap_read_persistent_clock64);
> > 
> > I will let John Stultz to have a look at this part because I have doubt
> > regarding the usage of the persistent clock.
> 
> The persistent clock we want to keep for deeper idle states..
> Especially when we start changing clocksource for the duration of
> deeper idle states. I'll post some updated patches on that when I
> get a chance.

But sounds like we can just have read_persistent_clock() check
for the CLOCK_SOURCE_SUSPEND_NONSTOP like I pointed in the other
patch in this series.

Tony

Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

[John Stultz]

On Tue, Sep 29, 2015 at 1:44 PM, Felipe Balbi <balbi@ti.com> wrote:
> Introduce a new clocksource driver for Texas
> Instruments 32.768 Hz device which is available
> on most OMAP-like devices.
>
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---
>  drivers/clocksource/Kconfig        |   8 +++
>  drivers/clocksource/Makefile       |   1 +
>  drivers/clocksource/timer-ti-32k.c | 121 +++++++++++++++++++++++++++++++++++++

Also isn't this somewhat duplicate of the code in
arch/arm/plat-omap/counter_32k.c ?

Was this really a rewrite or just a code migration? Should you
preserve the copyrights from counter_32k.c?

thanks
-john

Re: [RFC/PATCH 09/11] clocksource: add TI 32.768 Hz counter driver

[Felipe Balbi]

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On Thu, Oct 01, 2015 at 03:20:18PM -0700, John Stultz wrote:
> On Tue, Sep 29, 2015 at 1:44 PM, Felipe Balbi <balbi@ti.com> wrote:
> > Introduce a new clocksource driver for Texas
> > Instruments 32.768 Hz device which is available
> > on most OMAP-like devices.
> >
> > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > ---
> >  drivers/clocksource/Kconfig        |   8 +++
> >  drivers/clocksource/Makefile       |   1 +
> >  drivers/clocksource/timer-ti-32k.c | 121 +++++++++++++++++++++++++++++++++++++
> 
> Also isn't this somewhat duplicate of the code in
> arch/arm/plat-omap/counter_32k.c ?
> 
> Was this really a rewrite or just a code migration? Should you

migrating, but we can't really delete that yet because we still have
a bunch of legacy platforms not using DT.

> preserve the copyrights from counter_32k.c?

heh, probably :-)

-- 
balbi

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[RFC/PATCH 10/11] arm: omap2: timer: limit hwmod usage to non-DT boots

[Felipe Balbi]

now that we have a working 32k clocksource driver,
we can limit HWMOD usage to non-DT boots and rely
on clocksource_of_init() every time we boot
with DT.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/mach-omap2/timer.c | 30 +++++++++++-------------------
 1 file changed, 11 insertions(+), 19 deletions(-)

diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 8b3ac8d5d38b..24c5a63c9c6e 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -398,7 +398,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
 	int ret;
 	struct device_node *np = NULL;
 	struct omap_hwmod *oh;
-	void __iomem *vbase;
 	const char *oh_name = "counter_32k";
 
 	/*
@@ -424,18 +423,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
 
 	omap_hwmod_setup_one(oh_name);
 
-	if (np) {
-		vbase = of_iomap(np, 0);
-		of_node_put(np);
-	} else {
-		vbase = omap_hwmod_get_mpu_rt_va(oh);
-	}
-
-	if (!vbase) {
-		pr_warn("%s: failed to get counter_32k resource\n", __func__);
-		return -ENXIO;
-	}
-
 	ret = omap_hwmod_enable(oh);
 	if (ret) {
 		pr_warn("%s: failed to enable counter_32k module (%d)\n",
@@ -443,13 +430,18 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
 		return ret;
 	}
 
-	ret = omap_init_clocksource_32k(vbase);
-	if (ret) {
-		pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
-							__func__, ret);
-		omap_hwmod_idle(oh);
-	}
+	if (!of_have_populated_dt()) {
+		void __iomem *vbase;
 
+		vbase = omap_hwmod_get_mpu_rt_va(oh);
+
+		ret = omap_init_clocksource_32k(vbase);
+		if (ret) {
+			pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
+					__func__, ret);
+			omap_hwmod_idle(oh);
+		}
+	}
 	return ret;
 }
 
-- 
2.5.3

[RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Felipe Balbi]

All devices should have a default status. Ignoring
the arguments if it should be 'okay' or 'disabled'
by default, let's set them all the 'disabled' and
have boards enable 32k counter.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi         | 1 +
 arch/arm/boot/dts/am437x-gp-evm.dts   | 4 ++++
 arch/arm/boot/dts/am437x-idk-evm.dts  | 4 ++++
 arch/arm/boot/dts/am437x-sk-evm.dts   | 4 ++++
 arch/arm/boot/dts/am43x-epos-evm.dts  | 4 ++++
 arch/arm/boot/dts/dra7.dtsi           | 1 +
 arch/arm/boot/dts/omap2420-h4.dts     | 4 ++++
 arch/arm/boot/dts/omap2420.dtsi       | 1 +
 arch/arm/boot/dts/omap2430.dtsi       | 1 +
 arch/arm/boot/dts/omap3-beagle-xm.dts | 4 ++++
 arch/arm/boot/dts/omap3-beagle.dts    | 4 ++++
 arch/arm/boot/dts/omap3-ldp.dts       | 4 ++++
 arch/arm/boot/dts/omap3-n900.dts      | 4 ++++
 arch/arm/boot/dts/omap3.dtsi          | 1 +
 arch/arm/boot/dts/omap3430-sdp.dts    | 4 ++++
 arch/arm/boot/dts/omap4-sdp.dts       | 4 ++++
 arch/arm/boot/dts/omap4.dtsi          | 1 +
 arch/arm/boot/dts/omap5-cm-t54.dts    | 4 ++++
 arch/arm/boot/dts/omap5-uevm.dts      | 4 ++++
 arch/arm/boot/dts/omap5.dtsi          | 1 +
 20 files changed, 59 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 0447c04a40cc..0a3e0a82ea96 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -349,6 +349,7 @@
 			compatible = "ti,am4372-counter32k","ti,omap-counter32k";
 			reg = <0x44e86000 0x40>;
 			ti,hwmods = "counter_32k";
+			status = "disabled";
 		};
 
 		rtc: rtc@44e3e000 {
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 22038f21f228..f4b6cb6efde3 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -954,3 +954,7 @@
 	clock-names = "ext-clk", "int-clk";
 	status = "okay";
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts
index af25801418b4..17c429d4e136 100644
--- a/arch/arm/boot/dts/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/am437x-idk-evm.dts
@@ -413,3 +413,7 @@
 &cpu {
 	cpu0-supply = <&tps>;
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts
index 7da7c2da4af1..f0d9d26e644e 100644
--- a/arch/arm/boot/dts/am437x-sk-evm.dts
+++ b/arch/arm/boot/dts/am437x-sk-evm.dts
@@ -734,3 +734,7 @@
 		};
 	};
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 86c2dfbe8875..9a0cd866e3ab 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -792,3 +792,7 @@
 	tx-num-evt = <32>;
 	rx-num-evt = <32>;
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5d65db9ebc2b..a6f2072b6c46 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -193,6 +193,7 @@
 				compatible = "ti,omap-counter32k";
 				reg = <0x4000 0x40>;
 				ti,hwmods = "counter_32k";
+				status = "disabled";
 			};
 
 			prm: prm@6000 {
diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts
index 34cdecb4fdda..f41d95836dcf 100644
--- a/arch/arm/boot/dts/omap2420-h4.dts
+++ b/arch/arm/boot/dts/omap2420-h4.dts
@@ -64,3 +64,7 @@
 		};
 	};
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index 5b9a376cc31e..abef0670e7e6 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -70,6 +70,7 @@
 				compatible = "ti,omap-counter32k";
 				reg = <0x4000 0x20>;
 				ti,hwmods = "counter_32k";
+				status = "disabled";
 			};
 		};
 
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index 2390f387c271..f501b6f355a4 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -82,6 +82,7 @@
 				compatible = "ti,omap-counter32k";
 				reg = <0x20000 0x20>;
 				ti,hwmods = "counter_32k";
+				status = "disabled";
 			};
 		};
 
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 7c4dca122a91..47a354f22363 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -390,3 +390,7 @@
 		};
 	};
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index a5474113cd50..3a50baa56399 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -429,3 +429,7 @@
 		};
 	};
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/omap3-ldp.dts b/arch/arm/boot/dts/omap3-ldp.dts
index bd6e6769c7ce..58ef3e86c31f 100644
--- a/arch/arm/boot/dts/omap3-ldp.dts
+++ b/arch/arm/boot/dts/omap3-ldp.dts
@@ -302,3 +302,7 @@
 	/* Needed for ads7846 */
         regulator-name = "vcc";
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 5f5e0f3d5b64..0f9405ef4dc7 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -988,3 +988,7 @@
 &ssi_port2 {
 	status = "disabled";
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 69a40cfc1f29..1bc8fb05d4bd 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -181,6 +181,7 @@
 			compatible = "ti,omap-counter32k";
 			reg = <0x48320000 0x20>;
 			ti,hwmods = "counter_32k";
+			status = "disabled";
 		};
 
 		intc: interrupt-controller@48200000 {
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index 16b0cdfbee9c..8344e1d01ac6 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -191,3 +191,7 @@
 		};
 	};
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index dac86ed7481f..d54ee6605af0 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -697,3 +697,7 @@
 		};
 	};
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index abc4473e6f8a..76371eb9fa02 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -220,6 +220,7 @@
 					compatible = "ti,omap-counter32k";
 					reg = <0x4000 0x20>;
 					ti,hwmods = "counter_32k";
+					status = "disabled";
 				};
 
 				prm: prm@6000 {
diff --git a/arch/arm/boot/dts/omap5-cm-t54.dts b/arch/arm/boot/dts/omap5-cm-t54.dts
index 61ad2ea34720..d88f9bf1ce28 100644
--- a/arch/arm/boot/dts/omap5-cm-t54.dts
+++ b/arch/arm/boot/dts/omap5-cm-t54.dts
@@ -677,3 +677,7 @@
 		};
 	};
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index 3cc8f357d5b8..ecf8db4ea64b 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -641,3 +641,7 @@
 		};
 	};
 };
+
+&counter32k {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4205a8ac9ddb..aa8216a5bf4f 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -236,6 +236,7 @@
 				compatible = "ti,omap-counter32k";
 				reg = <0x4000 0x40>;
 				ti,hwmods = "counter_32k";
+				status = "disabled";
 			};
 
 			prm: prm@6000 {
-- 
2.5.3

Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Arnd Bergmann]

On Tuesday 29 September 2015 15:44:06 Felipe Balbi wrote:
> All devices should have a default status. Ignoring
> the arguments if it should be 'okay' or 'disabled'
> by default, let's set them all the 'disabled' and
> have boards enable 32k counter.
> 
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> 

The patch looks good, but the description is slightly incorrect:
There is no reason to list "status='okay'" other than overriding
the 'disabled' status.

I'd phrase it something like:

"We want the use of the 32k counter to be a per-board setting,
so let's disable it by default in each dtsi file and override the
setting in the boards. Any board that does not wire up the counter
should leave it disabled".

However, if you really want all boards to provide the counter all
the time, I'd argue that we're better off dropping this patch. We
use the status="disabled" trick for anything that may or may not
be working based on the board design, but things that are present
everywhere don't need this.

	Arnd

Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 1808 bytes --]

On Wed, Sep 30, 2015 at 10:15:25AM +0200, Arnd Bergmann wrote:
> On Tuesday 29 September 2015 15:44:06 Felipe Balbi wrote:
> > All devices should have a default status. Ignoring
> > the arguments if it should be 'okay' or 'disabled'
> > by default, let's set them all the 'disabled' and
> > have boards enable 32k counter.
> > 
> > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > 
> 
> The patch looks good, but the description is slightly incorrect:
> There is no reason to list "status='okay'" other than overriding
> the 'disabled' status.
> 
> I'd phrase it something like:
> 
> "We want the use of the 32k counter to be a per-board setting,
> so let's disable it by default in each dtsi file and override the
> setting in the boards. Any board that does not wire up the counter
> should leave it disabled".
> 
> However, if you really want all boards to provide the counter all
> the time, I'd argue that we're better off dropping this patch. We
> use the status="disabled" trick for anything that may or may not
> be working based on the board design, but things that are present
> everywhere don't need this.

okay, so here's the thing. While fiddling with the 32k counter, I noticed
that even though there was no status listed, the thing still initializes
fine. However, when moving 32k to drivers/clocksource and using
CLOCKSOURCE_OF_DECLARE(), 32k would *NOT* probe unless I had an explicit
status = "okay" in DT.

This is where this patch came from. I've used disabled by default
because we just might have a board somewhere which doesn't want to use 32k
counter and having it enabled per-board would help with that. Although,
we could just set status = "disabled" for that one board.

Whatever Tony prefers, I can change the patch accordingly.

-- 
balbi

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Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Arnd Bergmann]

On Wednesday 30 September 2015 09:12:09 Felipe Balbi wrote:
> On Wed, Sep 30, 2015 at 10:15:25AM +0200, Arnd Bergmann wrote:
> > On Tuesday 29 September 2015 15:44:06 Felipe Balbi wrote:
> > > All devices should have a default status. Ignoring
> > > the arguments if it should be 'okay' or 'disabled'
> > > by default, let's set them all the 'disabled' and
> > > have boards enable 32k counter.
> > > 
> > > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > > 
> > 
> > The patch looks good, but the description is slightly incorrect:
> > There is no reason to list "status='okay'" other than overriding
> > the 'disabled' status.
> > 
> > I'd phrase it something like:
> > 
> > "We want the use of the 32k counter to be a per-board setting,
> > so let's disable it by default in each dtsi file and override the
> > setting in the boards. Any board that does not wire up the counter
> > should leave it disabled".
> > 
> > However, if you really want all boards to provide the counter all
> > the time, I'd argue that we're better off dropping this patch. We
> > use the status="disabled" trick for anything that may or may not
> > be working based on the board design, but things that are present
> > everywhere don't need this.
> 
> okay, so here's the thing. While fiddling with the 32k counter, I noticed
> that even though there was no status listed, the thing still initializes
> fine. However, when moving 32k to drivers/clocksource and using
> CLOCKSOURCE_OF_DECLARE(), 32k would *NOT* probe unless I had an explicit
> status = "okay" in DT.

Very strange, that sounds like a bug in the clocksource probe code.
Can you check how this happens?

	Arnd

Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 2765 bytes --]

On Wed, Sep 30, 2015 at 11:58:16PM +0200, Arnd Bergmann wrote:
> On Wednesday 30 September 2015 09:12:09 Felipe Balbi wrote:
> > On Wed, Sep 30, 2015 at 10:15:25AM +0200, Arnd Bergmann wrote:
> > > On Tuesday 29 September 2015 15:44:06 Felipe Balbi wrote:
> > > > All devices should have a default status. Ignoring
> > > > the arguments if it should be 'okay' or 'disabled'
> > > > by default, let's set them all the 'disabled' and
> > > > have boards enable 32k counter.
> > > > 
> > > > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > > > 
> > > 
> > > The patch looks good, but the description is slightly incorrect:
> > > There is no reason to list "status='okay'" other than overriding
> > > the 'disabled' status.
> > > 
> > > I'd phrase it something like:
> > > 
> > > "We want the use of the 32k counter to be a per-board setting,
> > > so let's disable it by default in each dtsi file and override the
> > > setting in the boards. Any board that does not wire up the counter
> > > should leave it disabled".
> > > 
> > > However, if you really want all boards to provide the counter all
> > > the time, I'd argue that we're better off dropping this patch. We
> > > use the status="disabled" trick for anything that may or may not
> > > be working based on the board design, but things that are present
> > > everywhere don't need this.
> > 
> > okay, so here's the thing. While fiddling with the 32k counter, I noticed
> > that even though there was no status listed, the thing still initializes
> > fine. However, when moving 32k to drivers/clocksource and using
> > CLOCKSOURCE_OF_DECLARE(), 32k would *NOT* probe unless I had an explicit
> > status = "okay" in DT.
> 
> Very strange, that sounds like a bug in the clocksource probe code.
> Can you check how this happens?

seems like something overwrites counter's status field, here's a snippet of boot
log:

[    0.000000] ===> counter is available ??
[    0.000000] ===> no status -> TRUE!!
[    0.000000] ===> searching for timer
[    0.000000] ===> timer is available ??
[    0.000000] ===> no status -> TRUE!!
[    0.000005] sched_clock: 64 bits at 1000MHz, resolution 1ns, wraps every 4398046511103ns
[    0.000014] clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x1cd42e4dffb, max_idle_ns: 881590591483 ns
[    0.000047] ===> searching for timer
[    0.000051] ===> timer is available ??
[    0.000054] ===> no status -> TRUE!!
[    0.000307] ===> searching for counter
[    0.000311] ===> counter is available ??
[    0.000315] ===> counter status disabled
[    0.000318] ====> counter NOT available

note that first time around counter had no status and later it got a status
disabled from somewhere.

-- 
balbi

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Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 4189 bytes --]

Felipe Balbi <balbi@ti.com> writes:

> On Wed, Sep 30, 2015 at 11:58:16PM +0200, Arnd Bergmann wrote:
>> On Wednesday 30 September 2015 09:12:09 Felipe Balbi wrote:
>> > On Wed, Sep 30, 2015 at 10:15:25AM +0200, Arnd Bergmann wrote:
>> > > On Tuesday 29 September 2015 15:44:06 Felipe Balbi wrote:
>> > > > All devices should have a default status. Ignoring
>> > > > the arguments if it should be 'okay' or 'disabled'
>> > > > by default, let's set them all the 'disabled' and
>> > > > have boards enable 32k counter.
>> > > > 
>> > > > Signed-off-by: Felipe Balbi <balbi@ti.com>
>> > > > 
>> > > 
>> > > The patch looks good, but the description is slightly incorrect:
>> > > There is no reason to list "status='okay'" other than overriding
>> > > the 'disabled' status.
>> > > 
>> > > I'd phrase it something like:
>> > > 
>> > > "We want the use of the 32k counter to be a per-board setting,
>> > > so let's disable it by default in each dtsi file and override the
>> > > setting in the boards. Any board that does not wire up the counter
>> > > should leave it disabled".
>> > > 
>> > > However, if you really want all boards to provide the counter all
>> > > the time, I'd argue that we're better off dropping this patch. We
>> > > use the status="disabled" trick for anything that may or may not
>> > > be working based on the board design, but things that are present
>> > > everywhere don't need this.
>> > 
>> > okay, so here's the thing. While fiddling with the 32k counter, I noticed
>> > that even though there was no status listed, the thing still initializes
>> > fine. However, when moving 32k to drivers/clocksource and using
>> > CLOCKSOURCE_OF_DECLARE(), 32k would *NOT* probe unless I had an explicit
>> > status = "okay" in DT.
>> 
>> Very strange, that sounds like a bug in the clocksource probe code.
>> Can you check how this happens?
>
> seems like something overwrites counter's status field, here's a snippet of boot
> log:
>
> [    0.000000] ===> counter is available ??
> [    0.000000] ===> no status -> TRUE!!
> [    0.000000] ===> searching for timer
> [    0.000000] ===> timer is available ??
> [    0.000000] ===> no status -> TRUE!!
> [    0.000005] sched_clock: 64 bits at 1000MHz, resolution 1ns, wraps every 4398046511103ns
> [    0.000014] clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x1cd42e4dffb, max_idle_ns: 881590591483 ns
> [    0.000047] ===> searching for timer
> [    0.000051] ===> timer is available ??
> [    0.000054] ===> no status -> TRUE!!
> [    0.000307] ===> searching for counter
> [    0.000311] ===> counter is available ??
> [    0.000315] ===> counter status disabled
> [    0.000318] ====> counter NOT available
>
> note that first time around counter had no status and later it got a status
> disabled from somewhere.

found it. arch/arm/mach-omap2/timer.c is the culprit:

/**
 * omap_get_timer_dt - get a timer using device-tree
 * @match	- device-tree match structure for matching a device type
 * @property	- optional timer property to match
 *
 * Helper function to get a timer during early boot using device-tree for use
 * as kernel system timer. Optionally, the property argument can be used to
 * select a timer with a specific property. Once a timer is found then mark
 * the timer node in device-tree as disabled, to prevent the kernel from
 * registering this timer as a platform device and so no one else can use it.
 */
static struct device_node * __init omap_get_timer_dt(const struct of_device_id *match,
						     const char *property)
{
	struct device_node *np;

	for_each_matching_node(np, match) {
		if (!of_device_is_available(np))
			continue;

		if (property && !of_get_property(np, property, NULL))
			continue;

		if (!property && (of_get_property(np, "ti,timer-alwon", NULL) ||
				  of_get_property(np, "ti,timer-dsp", NULL) ||
				  of_get_property(np, "ti,timer-pwm", NULL) ||
				  of_get_property(np, "ti,timer-secure", NULL)))
			continue;

		of_add_property(np, &device_disabled);
		return np;
	}

	return NULL;
}

I'll patch this up and drop $subject

-- 
balbi

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Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Arnd Bergmann]

On Monday 05 October 2015 14:41:07 Felipe Balbi wrote:
> 
> /**
>  * omap_get_timer_dt - get a timer using device-tree
>  * @match       - device-tree match structure for matching a device type
>  * @property    - optional timer property to match
>  *
>  * Helper function to get a timer during early boot using device-tree for use
>  * as kernel system timer. Optionally, the property argument can be used to
>  * select a timer with a specific property. Once a timer is found then mark
>  * the timer node in device-tree as disabled, to prevent the kernel from
>  * registering this timer as a platform device and so no one else can use it.
>  */
> static struct device_node * __init omap_get_timer_dt(const struct of_device_id *match,
>                                                      const char *property)
> {
>         struct device_node *np;
> 
>         for_each_matching_node(np, match) {
>                 if (!of_device_is_available(np))
>                         continue;
> 
>                 if (property && !of_get_property(np, property, NULL))
>                         continue;
> 
>                 if (!property && (of_get_property(np, "ti,timer-alwon", NULL) ||
>                                   of_get_property(np, "ti,timer-dsp", NULL) ||
>                                   of_get_property(np, "ti,timer-pwm", NULL) ||
>                                   of_get_property(np, "ti,timer-secure", NULL)))
>                         continue;
> 
>                 of_add_property(np, &device_disabled);
>                 return np;
>         }
> 
>         return NULL;
> }
> 
> I'll patch this up and drop $subject
> 

Ah, good.

I'm seeing the "ti,timer-alwon" property here, we probably need to take
that into account when setting the CLOCK_SOURCE_SUSPEND_NONSTOP flag, if
that isn't how it gets done already.

	Arnd

Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Felipe Balbi]

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Arnd Bergmann <arnd@arndb.de> writes:

> On Monday 05 October 2015 14:41:07 Felipe Balbi wrote:
>> 
>> /**
>>  * omap_get_timer_dt - get a timer using device-tree
>>  * @match       - device-tree match structure for matching a device type
>>  * @property    - optional timer property to match
>>  *
>>  * Helper function to get a timer during early boot using device-tree for use
>>  * as kernel system timer. Optionally, the property argument can be used to
>>  * select a timer with a specific property. Once a timer is found then mark
>>  * the timer node in device-tree as disabled, to prevent the kernel from
>>  * registering this timer as a platform device and so no one else can use it.
>>  */
>> static struct device_node * __init omap_get_timer_dt(const struct of_device_id *match,
>>                                                      const char *property)
>> {
>>         struct device_node *np;
>> 
>>         for_each_matching_node(np, match) {
>>                 if (!of_device_is_available(np))
>>                         continue;
>> 
>>                 if (property && !of_get_property(np, property, NULL))
>>                         continue;
>> 
>>                 if (!property && (of_get_property(np, "ti,timer-alwon", NULL) ||
>>                                   of_get_property(np, "ti,timer-dsp", NULL) ||
>>                                   of_get_property(np, "ti,timer-pwm", NULL) ||
>>                                   of_get_property(np, "ti,timer-secure", NULL)))
>>                         continue;
>> 
>>                 of_add_property(np, &device_disabled);
>>                 return np;
>>         }
>> 
>>         return NULL;
>> }
>> 
>> I'll patch this up and drop $subject
>> 
>
> Ah, good.
>
> I'm seeing the "ti,timer-alwon" property here, we probably need to take
> that into account when setting the CLOCK_SOURCE_SUSPEND_NONSTOP flag, if
> that isn't how it gets done already.

that flag is not set for 32k in any dts. Seems like it should, though,
judging by the binding documentation:

- ti,timer-alwon:	Indicates the timer is in an alway-on power
  domain.

Tony, care to comment if we should add timer-alwon to 32k ?

-- 
balbi

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Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Tony Lindgren]

* Felipe Balbi <balbi@ti.com> [151006 08:02]:
> Arnd Bergmann <arnd@arndb.de> writes:
> 
> > On Monday 05 October 2015 14:41:07 Felipe Balbi wrote:
> >> 
> >> /**
> >>  * omap_get_timer_dt - get a timer using device-tree
> >>  * @match       - device-tree match structure for matching a device type
> >>  * @property    - optional timer property to match
> >>  *
> >>  * Helper function to get a timer during early boot using device-tree for use
> >>  * as kernel system timer. Optionally, the property argument can be used to
> >>  * select a timer with a specific property. Once a timer is found then mark
> >>  * the timer node in device-tree as disabled, to prevent the kernel from
> >>  * registering this timer as a platform device and so no one else can use it.
> >>  */
> >> static struct device_node * __init omap_get_timer_dt(const struct of_device_id *match,
> >>                                                      const char *property)
> >> {
> >>         struct device_node *np;
> >> 
> >>         for_each_matching_node(np, match) {
> >>                 if (!of_device_is_available(np))
> >>                         continue;
> >> 
> >>                 if (property && !of_get_property(np, property, NULL))
> >>                         continue;
> >> 
> >>                 if (!property && (of_get_property(np, "ti,timer-alwon", NULL) ||
> >>                                   of_get_property(np, "ti,timer-dsp", NULL) ||
> >>                                   of_get_property(np, "ti,timer-pwm", NULL) ||
> >>                                   of_get_property(np, "ti,timer-secure", NULL)))
> >>                         continue;
> >> 
> >>                 of_add_property(np, &device_disabled);
> >>                 return np;
> >>         }
> >> 
> >>         return NULL;
> >> }
> >> 
> >> I'll patch this up and drop $subject
> >> 
> >
> > Ah, good.
> >
> > I'm seeing the "ti,timer-alwon" property here, we probably need to take
> > that into account when setting the CLOCK_SOURCE_SUSPEND_NONSTOP flag, if
> > that isn't how it gets done already.
> 
> that flag is not set for 32k in any dts. Seems like it should, though,
> judging by the binding documentation:
> 
> - ti,timer-alwon:	Indicates the timer is in an alway-on power
>   domain.
> 
> Tony, care to comment if we should add timer-alwon to 32k ?

No that should not be needed for the 32k counter. We should be able
to do everything we want with CLOCK_SOURCE_SUSPEND_NONSTOP for the
32k counter.

We still need ti,timer-alwon for a while for gptimers 1 and 12 as
they are the only ones in the always-on domain. I guess that need
will eventually go away too once we have a proper interconnect
driver and are using genpd.

Regards,

Tony

Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Felipe Balbi]

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Hi,

Tony Lindgren <tony@atomide.com> writes:

> * Felipe Balbi <balbi@ti.com> [151006 08:02]:
>> - ti,timer-alwon:	Indicates the timer is in an alway-on power
>>   domain.
>> 
>> Tony, care to comment if we should add timer-alwon to 32k ?
>
> No that should not be needed for the 32k counter. We should be able
> to do everything we want with CLOCK_SOURCE_SUSPEND_NONSTOP for the
> 32k counter.
>
> We still need ti,timer-alwon for a while for gptimers 1 and 12 as
> they are the only ones in the always-on domain. I guess that need
> will eventually go away too once we have a proper interconnect
> driver and are using genpd.

cool, thanks. I'll try to respin this series, hopefully still this week.

-- 
balbi

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Re: [RFC/PATCH 11/11] arm: boot: dts: omap: add missing default status for 32k counter

[Tony Lindgren]

* Felipe Balbi <balbi@ti.com> [150929 13:48]:
> All devices should have a default status. Ignoring
> the arguments if it should be 'okay' or 'disabled'
> by default, let's set them all the 'disabled' and
> have boards enable 32k counter.

We should not use "disabled" really at all. That means
no struct device is ever created while that hardawre is
there for the internal devices for sure.

Also, we should use the 32k counter as the default one
as that's always on for deeper idle states.

For cases where the 32k ocillator is not available,
it's better to just set the source clock rate to 0
in the board specific dts file and have the driver
bail out early if source clock rate is 0.

Regards,

Tony

Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Arnd Bergmann]

On Tuesday 29 September 2015 15:43:55 Felipe Balbi wrote:
> 
> the following patches de-obfuscate arch/arm/mach-omap2/timer.c
> and start moving code to drivers/clocksource. So far only counter32k
> has been moved over.
> 
> Note that we can't get rid of all the code (yet) because there are
> still platforms relying to legacy boot and because of the strong
> coupling with OMAP's hwmod layer.
> 
> This is, for now, an RFC and has be written on top of [1]. Boot tested
> with AM335x and AM437x.
> 
> [1] http://marc.info/?l=linux-omap&m=144354336924308&w=2

Looks very nice!

> ps: if anybody has a good idea on how to get rid of
> register_persistent_clock(), please let me know

I don't think we want to get rid of that, because it is the more
accurate interface. IIRC systems that have an RTC will use
timekeeping_inject_sleeptime64() in rtc_resume(). I don't know however
how the two methods are coordinated, i.e. how the kernel ensures that
exactly one of the two is used, but never both.

	Arnd

Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Felipe Balbi]

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On Wed, Sep 30, 2015 at 10:22:46AM +0200, Arnd Bergmann wrote:
> On Tuesday 29 September 2015 15:43:55 Felipe Balbi wrote:
> > 
> > the following patches de-obfuscate arch/arm/mach-omap2/timer.c
> > and start moving code to drivers/clocksource. So far only counter32k
> > has been moved over.
> > 
> > Note that we can't get rid of all the code (yet) because there are
> > still platforms relying to legacy boot and because of the strong
> > coupling with OMAP's hwmod layer.
> > 
> > This is, for now, an RFC and has be written on top of [1]. Boot tested
> > with AM335x and AM437x.
> > 
> > [1] http://marc.info/?l=linux-omap&m=144354336924308&w=2
> 
> Looks very nice!
> 
> > ps: if anybody has a good idea on how to get rid of
> > register_persistent_clock(), please let me know
> 
> I don't think we want to get rid of that, because it is the more
> accurate interface. IIRC systems that have an RTC will use
> timekeeping_inject_sleeptime64() in rtc_resume(). I don't know however
> how the two methods are coordinated, i.e. how the kernel ensures that
> exactly one of the two is used, but never both.

however register_persistent_clock() is an ARM-only thing, the question
was more towards that. Do we want to continue using the ARM-only
register_persistent_clock() or is there a more generic version of it ?

-- 
balbi

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Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Arnd Bergmann]

On Wednesday 30 September 2015 09:13:38 Felipe Balbi wrote:
> On Wed, Sep 30, 2015 at 10:22:46AM +0200, Arnd Bergmann wrote:
> > On Tuesday 29 September 2015 15:43:55 Felipe Balbi wrote:
> > > 
> > > the following patches de-obfuscate arch/arm/mach-omap2/timer.c
> > > and start moving code to drivers/clocksource. So far only counter32k
> > > has been moved over.
> > > 
> > > Note that we can't get rid of all the code (yet) because there are
> > > still platforms relying to legacy boot and because of the strong
> > > coupling with OMAP's hwmod layer.
> > > 
> > > This is, for now, an RFC and has be written on top of [1]. Boot tested
> > > with AM335x and AM437x.
> > > 
> > > [1] http://marc.info/?l=linux-omap&m=144354336924308&w=2
> > 
> > Looks very nice!
> > 
> > > ps: if anybody has a good idea on how to get rid of
> > > register_persistent_clock(), please let me know
> > 
> > I don't think we want to get rid of that, because it is the more
> > accurate interface. IIRC systems that have an RTC will use
> > timekeeping_inject_sleeptime64() in rtc_resume(). I don't know however
> > how the two methods are coordinated, i.e. how the kernel ensures that
> > exactly one of the two is used, but never both.
> 
> however register_persistent_clock() is an ARM-only thing, the question
> was more towards that. Do we want to continue using the ARM-only
> register_persistent_clock() or is there a more generic version of it ?

Ah, got it.

I wouldn't worry about it at the moment, the read_persistent_clock64
interface is very rarely used: only arm, ia64, mips/lasat and s390
define it at all, only arm has more than one implementation (omap
and tegra) and the tegra, ia64 and mips implementations should really
use timekeeping_inject_sleeptime64() instead.

read_boot_clock64() is even rarer: only s390 defines it, apparently
because it is the only architecture that uses a single register for
wall-clock time and high-resolution time (it has a 96-bit
quarternanosecond register that is synchronized before booting Linux).	

TEGRA folks: the tegra_read_persistent_clock() implementation apparently
predates the Tegra RTC driver and I wonder if they actually do the
right thing in combination. Could it be that the wall time forwards
twice as fast as it should during resume when the RTC driver is loaded?
Could it be that we can simply remove  tegra_read_persistent_clock()
and the register_persistent_clock() infrastructure?

	Arnd

Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Arnd Bergmann]

On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> 
> TEGRA folks: the tegra_read_persistent_clock() implementation apparently
> predates the Tegra RTC driver and I wonder if they actually do the
> right thing in combination. Could it be that the wall time forwards
> twice as fast as it should during resume when the RTC driver is loaded?
> Could it be that we can simply remove  tegra_read_persistent_clock()
> and the register_persistent_clock() infrastructure?
> 

I found the 'sleeptime_injected' variable now, which takes care of
forwarding the clock by the correct amount.

I also found the CLOCK_SOURCE_SUSPEND_NONSTOP flag next to it, which
should let us use the counter32k driver to provide the correct
time during suspend without the omap_read_persistent_clock() function.
We should be able to just delete that code.

If we decide to also delete the tegra_read_persistent_clock()
function, we can remove the registration too.

	Arnd

Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Felipe Balbi]

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On Wed, Sep 30, 2015 at 04:49:53PM +0200, Arnd Bergmann wrote:
> On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> > 
> > TEGRA folks: the tegra_read_persistent_clock() implementation apparently
> > predates the Tegra RTC driver and I wonder if they actually do the
> > right thing in combination. Could it be that the wall time forwards
> > twice as fast as it should during resume when the RTC driver is loaded?
> > Could it be that we can simply remove  tegra_read_persistent_clock()
> > and the register_persistent_clock() infrastructure?
> > 
> 
> I found the 'sleeptime_injected' variable now, which takes care of
> forwarding the clock by the correct amount.
> 
> I also found the CLOCK_SOURCE_SUSPEND_NONSTOP flag next to it, which
> should let us use the counter32k driver to provide the correct
> time during suspend without the omap_read_persistent_clock() function.
> We should be able to just delete that code.
> 
> If we decide to also delete the tegra_read_persistent_clock()
> function, we can remove the registration too.

cool, I'll try to have a look at that after this series gets accepted.

-- 
balbi

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Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Thierry Reding]

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On Wed, Sep 30, 2015 at 04:49:53PM +0200, Arnd Bergmann wrote:
> On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> > 
> > TEGRA folks: the tegra_read_persistent_clock() implementation apparently
> > predates the Tegra RTC driver and I wonder if they actually do the
> > right thing in combination. Could it be that the wall time forwards
> > twice as fast as it should during resume when the RTC driver is loaded?
> > Could it be that we can simply remove  tegra_read_persistent_clock()
> > and the register_persistent_clock() infrastructure?
> > 
> 
> I found the 'sleeptime_injected' variable now, which takes care of
> forwarding the clock by the correct amount.
> 
> I also found the CLOCK_SOURCE_SUSPEND_NONSTOP flag next to it, which
> should let us use the counter32k driver to provide the correct
> time during suspend without the omap_read_persistent_clock() function.
> We should be able to just delete that code.
> 
> If we decide to also delete the tegra_read_persistent_clock()
> function, we can remove the registration too.

This was discussed a very long time ago, but I can't remember most of
the context. I found this in my inbox:

	https://lkml.org/lkml/2014/11/7/605

But I don't remember if there was an outcome or if anything came of
that. I'm currently busy with some other work, but thought I'd drop
this reference here in case somebody wants to dig into it before I
get around to it.

Thierry

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Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Daniel Lezcano]

On 09/30/2015 04:49 PM, Arnd Bergmann wrote:
> On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
>>
>> TEGRA folks: the tegra_read_persistent_clock() implementation apparently
>> predates the Tegra RTC driver and I wonder if they actually do the
>> right thing in combination. Could it be that the wall time forwards
>> twice as fast as it should during resume when the RTC driver is loaded?
>> Could it be that we can simply remove  tegra_read_persistent_clock()
>> and the register_persistent_clock() infrastructure?
>>
>
> I found the 'sleeptime_injected' variable now, which takes care of
> forwarding the clock by the correct amount.
>
> I also found the CLOCK_SOURCE_SUSPEND_NONSTOP flag next to it, which
> should let us use the counter32k driver to provide the correct
> time during suspend without the omap_read_persistent_clock() function.
> We should be able to just delete that code.
>
> If we decide to also delete the tegra_read_persistent_clock()
> function, we can remove the registration too.


+1


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Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Tony Lindgren]

* Daniel Lezcano <daniel.lezcano@linaro.org> [151001 15:16]:
> On 09/30/2015 04:49 PM, Arnd Bergmann wrote:
> >On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> >>
> >>TEGRA folks: the tegra_read_persistent_clock() implementation apparently
> >>predates the Tegra RTC driver and I wonder if they actually do the
> >>right thing in combination. Could it be that the wall time forwards
> >>twice as fast as it should during resume when the RTC driver is loaded?
> >>Could it be that we can simply remove  tegra_read_persistent_clock()
> >>and the register_persistent_clock() infrastructure?
> >>
> >
> >I found the 'sleeptime_injected' variable now, which takes care of
> >forwarding the clock by the correct amount.
> >
> >I also found the CLOCK_SOURCE_SUSPEND_NONSTOP flag next to it, which
> >should let us use the counter32k driver to provide the correct
> >time during suspend without the omap_read_persistent_clock() function.
> >We should be able to just delete that code.
> >
> >If we decide to also delete the tegra_read_persistent_clock()
> >function, we can remove the registration too.
> 
> 
> +1

We could maybe have read_persistent_clock() just check for the
CLOCK_SOURCE_SUSPEND_NONSTOP flag?

And we probably should have also has_persistent_clock() or something
that also checks for the CLOCK_SOURCE_SUSPEND_NONSTOP.

Regards,

Tony

Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Arnd Bergmann]

On Monday 05 October 2015 03:55:55 Tony Lindgren wrote:
> * Daniel Lezcano <daniel.lezcano@linaro.org> [151001 15:16]:
> > On 09/30/2015 04:49 PM, Arnd Bergmann wrote:
> > >On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> > >>
> > >>TEGRA folks: the tegra_read_persistent_clock() implementation apparently
> > >>predates the Tegra RTC driver and I wonder if they actually do the
> > >>right thing in combination. Could it be that the wall time forwards
> > >>twice as fast as it should during resume when the RTC driver is loaded?
> > >>Could it be that we can simply remove  tegra_read_persistent_clock()
> > >>and the register_persistent_clock() infrastructure?
> > >>
> > >
> > >I found the 'sleeptime_injected' variable now, which takes care of
> > >forwarding the clock by the correct amount.
> > >
> > >I also found the CLOCK_SOURCE_SUSPEND_NONSTOP flag next to it, which
> > >should let us use the counter32k driver to provide the correct
> > >time during suspend without the omap_read_persistent_clock() function.
> > >We should be able to just delete that code.
> > >
> > >If we decide to also delete the tegra_read_persistent_clock()
> > >function, we can remove the registration too.
> > 
> > 
> > +1
> 
> We could maybe have read_persistent_clock() just check for the
> CLOCK_SOURCE_SUSPEND_NONSTOP flag?

timekeeping_resume() already ignores the persistent clock values if
the clocksource has this set. Do you mean we should additionally
not call the read_persistent_clock() function at all to safe a
few cycles reading that value?

How expensive is the function?

	Arnd

Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Tony Lindgren]

* Arnd Bergmann <arnd@arndb.de> [151005 04:08]:
> On Monday 05 October 2015 03:55:55 Tony Lindgren wrote:
> > * Daniel Lezcano <daniel.lezcano@linaro.org> [151001 15:16]:
> > > On 09/30/2015 04:49 PM, Arnd Bergmann wrote:
> > > >On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> > > >>
> > > >>TEGRA folks: the tegra_read_persistent_clock() implementation apparently
> > > >>predates the Tegra RTC driver and I wonder if they actually do the
> > > >>right thing in combination. Could it be that the wall time forwards
> > > >>twice as fast as it should during resume when the RTC driver is loaded?
> > > >>Could it be that we can simply remove  tegra_read_persistent_clock()
> > > >>and the register_persistent_clock() infrastructure?
> > > >>
> > > >
> > > >I found the 'sleeptime_injected' variable now, which takes care of
> > > >forwarding the clock by the correct amount.
> > > >
> > > >I also found the CLOCK_SOURCE_SUSPEND_NONSTOP flag next to it, which
> > > >should let us use the counter32k driver to provide the correct
> > > >time during suspend without the omap_read_persistent_clock() function.
> > > >We should be able to just delete that code.
> > > >
> > > >If we decide to also delete the tegra_read_persistent_clock()
> > > >function, we can remove the registration too.
> > > 
> > > 
> > > +1
> > 
> > We could maybe have read_persistent_clock() just check for the
> > CLOCK_SOURCE_SUSPEND_NONSTOP flag?
> 
> timekeeping_resume() already ignores the persistent clock values if
> the clocksource has this set. Do you mean we should additionally
> not call the read_persistent_clock() function at all to safe a
> few cycles reading that value?

Hmm no I mean if we have CLOCK_SOURCE_SUSPEND_NONSTOP we can
automatically make read_persistent_clock() use that if nothing
else got registered.

> How expensive is the function?

Usually the persistent clock is on some interconnect, so it is
way slower compared to a local timer. It doubt it makes a
difference in timekeeping_resume() though :)

Regards,

Tony

Re: [RFC/PATCH 00/11] arm: omap: counter32k rework

[Arnd Bergmann]

On Monday 05 October 2015 04:13:41 Tony Lindgren wrote:
> * Arnd Bergmann <arnd@arndb.de> [151005 04:08]:
> > On Monday 05 October 2015 03:55:55 Tony Lindgren wrote:
> > > * Daniel Lezcano <daniel.lezcano@linaro.org> [151001 15:16]:
> > > > On 09/30/2015 04:49 PM, Arnd Bergmann wrote:
> > > > >On Wednesday 30 September 2015 16:42:21 Arnd Bergmann wrote:
> > > > >>
> > > > >>TEGRA folks: the tegra_read_persistent_clock() implementation apparently
> > > > >>predates the Tegra RTC driver and I wonder if they actually do the
> > > > >>right thing in combination. Could it be that the wall time forwards
> > > > >>twice as fast as it should during resume when the RTC driver is loaded?
> > > > >>Could it be that we can simply remove  tegra_read_persistent_clock()
> > > > >>and the register_persistent_clock() infrastructure?
> > > > >>
> > > > >
> > > > >I found the 'sleeptime_injected' variable now, which takes care of
> > > > >forwarding the clock by the correct amount.
> > > > >
> > > > >I also found the CLOCK_SOURCE_SUSPEND_NONSTOP flag next to it, which
> > > > >should let us use the counter32k driver to provide the correct
> > > > >time during suspend without the omap_read_persistent_clock() function.
> > > > >We should be able to just delete that code.
> > > > >
> > > > >If we decide to also delete the tegra_read_persistent_clock()
> > > > >function, we can remove the registration too.
> > > > 
> > > > 
> > > > +1
> > > 
> > > We could maybe have read_persistent_clock() just check for the
> > > CLOCK_SOURCE_SUSPEND_NONSTOP flag?
> > 
> > timekeeping_resume() already ignores the persistent clock values if
> > the clocksource has this set. Do you mean we should additionally
> > not call the read_persistent_clock() function at all to safe a
> > few cycles reading that value?
> 
> Hmm no I mean if we have CLOCK_SOURCE_SUSPEND_NONSTOP we can
> automatically make read_persistent_clock() use that if nothing
> else got registered.

Ok, so we don't need to change anything here then.

> > How expensive is the function?
> 
> Usually the persistent clock is on some interconnect, so it is
> way slower compared to a local timer. It doubt it makes a
> difference in timekeeping_resume() though 

Right.

	Arnd