* [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2
[not found] <20170824231716.2623-1-antony@phenome.org>
@ 2017-08-25 10:32 ` Antony Antony
2017-08-25 12:05 ` Corentin Labbe
2017-08-25 13:28 ` Code Kipper
2017-08-26 11:11 ` [PATCH v3] " Antony Antony
` (6 subsequent siblings)
7 siblings, 2 replies; 22+ messages in thread
From: Antony Antony @ 2017-08-25 10:32 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Icenowy Zheng, linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List, Antony Antony
Add initial DT support for NanoPi NEO Plus 2 by FriendlyELEC
Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
1 GB DDR3 RAM
8GB eMMC flash (Samsung KLM8G1WEPD-B031)
micro SD card slot
Gigabit Ethernet (external RTL8211E-VB-CG chip)
802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
2x USB 2.0 host ports & 2x USB via headers
The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
Added dwmac-sun8i Gigabit Ethernet support based on
Nano Pi Neo2 DT and the schematics.
Signed-off-by: Antony Antony <antony@phenome.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 341 +++++++++++++++++++++
2 files changed, 342 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 108f12c..e6810c8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 0000000..d279ad8
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,341 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus2";
+ compatible = "friendlyarm,nanopi-neo-pus2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "orangepi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "orangepi:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ r-gpio-keys {
+ compatible = "gpio-keys";
+
+ sw4 {
+ label = "sw4";
+ linux,code = <BTN_0>;
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_nanopi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_cpux_r_npi>;
+
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_pins_a>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mixer0 {
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ boot_device = <0>;
+ status = "okay";
+
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&tcon0 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ };
+ };
+};
+
+&pio {
+ leds_npi: led_pins@0 {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+ gmac_power_pin_nanopi: gmac_power_pin@0 {
+ pins = "PD6";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "usb";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ status = "okay";
+};
--
2.9.3
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2
2017-08-25 10:32 ` [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2 Antony Antony
@ 2017-08-25 12:05 ` Corentin Labbe
2017-08-25 17:47 ` Antony Antony
2017-08-25 13:28 ` Code Kipper
1 sibling, 1 reply; 22+ messages in thread
From: Corentin Labbe @ 2017-08-25 12:05 UTC (permalink / raw)
To: Antony Antony
Cc: Maxime Ripard, Chen-Yu Tsai, devicetree,
Linux Kernel Mailing List, linux-sunxi, linux-arm-kernel,
Icenowy Zheng
On Fri, Aug 25, 2017 at 12:32:42PM +0200, Antony Antony wrote:
> Add initial DT support for NanoPi NEO Plus 2 by FriendlyELEC
> Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> 1 GB DDR3 RAM
> 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> micro SD card slot
> Gigabit Ethernet (external RTL8211E-VB-CG chip)
> 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> 2x USB 2.0 host ports & 2x USB via headers
>
> The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> Added dwmac-sun8i Gigabit Ethernet support based on
> Nano Pi Neo2 DT and the schematics.
>
> Signed-off-by: Antony Antony <antony@phenome.org>
Hello
I do not see changes between v1 to v2.
And you need to set your real name in signed-off.
Regards
Corentin Labbe
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2
2017-08-25 12:05 ` Corentin Labbe
@ 2017-08-25 17:47 ` Antony Antony
0 siblings, 0 replies; 22+ messages in thread
From: Antony Antony @ 2017-08-25 17:47 UTC (permalink / raw)
To: Corentin Labbe
Cc: Antony Antony, Maxime Ripard, Chen-Yu Tsai, devicetree,
Linux Kernel Mailing List, linux-sunxi, linux-arm-kernel,
Icenowy Zheng
On Fri, Aug 25, 2017 at 02:05:42PM +0200, Corentin Labbe wrote:
> On Fri, Aug 25, 2017 at 12:32:42PM +0200, Antony Antony wrote:
> > Add initial DT support for NanoPi NEO Plus 2 by FriendlyELEC
> > Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> > 1 GB DDR3 RAM
> > 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> > micro SD card slot
> > Gigabit Ethernet (external RTL8211E-VB-CG chip)
> > 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> > 2x USB 2.0 host ports & 2x USB via headers
> >
> > The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> > Added dwmac-sun8i Gigabit Ethernet support based on
> > Nano Pi Neo2 DT and the schematics.
> >
> > Signed-off-by: Antony Antony <antony@phenome.org>
>
> Hello
>
> I do not see changes between v1 to v2.
I missed it. I will include in v3, both v1 -> v2 and v2->v3
> And you need to set your real name in signed-off.
I see my real name "Antony Antony" in Signed-off-by:
regards,
-antony
PS Did you #19 on this list?
http://www.kalzumeus.com/2010/06/17/falsehoods-programmers-believe-about-names/
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2
2017-08-25 10:32 ` [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2 Antony Antony
2017-08-25 12:05 ` Corentin Labbe
@ 2017-08-25 13:28 ` Code Kipper
2017-08-25 17:42 ` Antony Antony
2017-08-28 12:16 ` Antony Antony
1 sibling, 2 replies; 22+ messages in thread
From: Code Kipper @ 2017-08-25 13:28 UTC (permalink / raw)
To: Antony Antony
Cc: Maxime Ripard, Chen-Yu Tsai, Icenowy Zheng, linux-sunxi,
linux-arm-kernel, devicetree, Linux Kernel Mailing List
On 25 August 2017 at 12:32, Antony Antony <antony@phenome.org> wrote:
> Add initial DT support for NanoPi NEO Plus 2 by FriendlyELEC
> Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> 1 GB DDR3 RAM
> 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> micro SD card slot
> Gigabit Ethernet (external RTL8211E-VB-CG chip)
> 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> 2x USB 2.0 host ports & 2x USB via headers
>
> The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> Added dwmac-sun8i Gigabit Ethernet support based on
> Nano Pi Neo2 DT and the schematics.
>
> Signed-off-by: Antony Antony <antony@phenome.org>
> ---
> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> .../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 341 +++++++++++++++++++++
> 2 files changed, 342 insertions(+)
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index 108f12c..e6810c8 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
>
> always := $(dtb-y)
> subdir-y := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> new file mode 100644
> index 0000000..d279ad8
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> @@ -0,0 +1,341 @@
> +/*
> + * Copyright (C) 2017 Antony Antony <antony@phenome.org>
> + * Copyright (C) 2016 ARM Ltd.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "sun50i-h5.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pinctrl/sun4i-a10.h>
> +
> +/ {
> + model = "FriendlyARM NanoPi NEO Plus2";
> + compatible = "friendlyarm,nanopi-neo-pus2", "allwinner,sun50i-h5";
Hi,
s/pus/plus
> +
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + aliases {
> + ethernet0 = &emac;
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + pwr {
> + label = "orangepi:green:pwr";
> + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + };
> +
> + status {
> + label = "orangepi:red:status";
> + gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
> + };
> + };
Is this correct?...check against the schematic and also remove orangepi c&p.
> +
> + r-gpio-keys {
> + compatible = "gpio-keys";
> +
> + sw4 {
> + label = "sw4";
> + linux,code = <BTN_0>;
> + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
> + };
> + };
Is there a key onboard?
> +
> + reg_gmac_3v3: gmac-3v3 {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac_power_pin_nanopi>;
> + regulator-name = "gmac-3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + startup-delay-us = <100000>;
> + enable-active-high;
> + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
> + };
> +
> + vdd_cpux: gpio-regulator {
> + compatible = "regulator-gpio";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&vdd_cpux_r_npi>;
> +
> + regulator-name = "vdd-cpux";
> + regulator-type = "voltage";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-ramp-delay = <50>; /* 4ms */
> +
> + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
> + gpios-states = <0x1>;
> + states = <1100000 0x0
> + 1300000 0x1>;
> + };
> +
> + wifi_pwrseq: wifi_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_en_npi>;
> + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> + post-power-on-delay-ms = <200>;
> + };
> +};
> +
> +&codec {
> + allwinner,audio-routing =
> + "Line Out", "LINEOUT",
> + "MIC1", "Mic",
> + "Mic", "MBIAS";
> + status = "okay";
> +};
> +
> +&de {
> + status = "okay";
> +};
de2 stuff hasn't been delivered yet so don't include it.
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&ehci2 {
> + status = "okay";
> +};
USB 1 and 2 are on the header so should be disabled.
> +
> +&ehci3 {
> + status = "okay";
> +};
> +
> +&emac {
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_rgmii_pins>;
> + phy-supply = <®_gmac_3v3>;
> + phy-handle = <&ext_rgmii_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&hdmi {
> + status = "okay";
> +};
ditto
> +
> +&ir {
> + pinctrl-names = "default";
> + pinctrl-0 = <&ir_pins_a>;
> + status = "okay";
> +};
No IR on the board, however it's on a header so disable or remove.
> +
> +&mdio {
> + ext_rgmii_phy: ethernet-phy@7 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <7>;
> + };
> +};
> +
> +&mixer0 {
> + status = "okay";
> +};
de2 ditto
> +
> +&mmc0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <4>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
> + status = "okay";
> +};
> +
> +&mmc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc1_pins_a>;
> + vmmc-supply = <®_vcc3v3>;
> + vqmmc-supply = <®_vcc3v3>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + boot_device = <0>;
> + status = "okay";
> +
> + brcmf: bcrmf@1 {
> + reg = <1>;
> + compatible = "brcm,bcm4329-fmac";
> + };
Incorrect wifi chip - just deliver what you've tested.
> +};
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_8bit_pins>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <8>;
> + non-removable;
> + cap-mmc-hw-reset;
> + boot_device = <0>;
> + status = "okay";
> +};
> +
> +&mmc2_8bit_pins {
> + /* Increase drive strength for DDR modes */
> + drive-strength = <40>;
> + /* eMMC is missing pull-ups */
> + bias-pull-up;
> +};
> +
> +&ohci0 {
> + status = "okay";
> +};
> +
> +&ohci1 {
> + status = "okay";
> +};
> +
> +&ohci2 {
> + status = "okay";
> +};
> +
> +&ohci3 {
> + status = "okay";
> +};
> +
> +&tcon0 {
> + status = "okay";
> +};
de2 ditto
> +
> +&spi0 {
> + status = "okay";
> + spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "jedec,spi-nor";
> + reg = <0>; /* Chip select 0 */
> + spi-max-frequency = <10000000>;
> + status = "okay";
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + partition@0 {
> + label = "uboot";
> + reg = <0x0 0x100000>;
> + };
> + partition@100000 {
> + label = "env";
> + reg = <0x100000 0x100000>;
> + };
> + };
> + };
> +};
spi0 is on the header and there is no spi flash.
BR,
CK
> +
> +&pio {
> + leds_npi: led_pins@0 {
> + pins = "PA10";
> + function = "gpio_out";
> + };
> + gmac_power_pin_nanopi: gmac_power_pin@0 {
> + pins = "PD6";
> + function = "gpio_out";
> + };
> +};
> +
> +&r_pio {
> + leds_r_npi: led_pins@0 {
> + pins = "PL10";
> + function = "gpio_out";
> + };
> +
> + vdd_cpux_r_npi: regulator_pins@0 {
> + allwinner,pins = "PL6";
> + allwinner,function = "gpio_out";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + wifi_en_npi: wifi_en_pin {
> + pins = "PL7";
> + function = "gpio_out";
> + };
> +};
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins_a>;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart1_pins>;
> + status = "disabled";
> +};
> +
> +&uart2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart2_pins>;
> + status = "disabled";
> +};
> +
> +&usb_otg {
> + dr_mode = "usb";
> + status = "okay";
> +};
> +
> +&usbphy {
> + /* USB Type-A ports' VBUS is always on */
> + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> + status = "okay";
> +};
> --
> 2.9.3
>
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2
2017-08-25 13:28 ` Code Kipper
@ 2017-08-25 17:42 ` Antony Antony
2017-08-28 12:16 ` Antony Antony
1 sibling, 0 replies; 22+ messages in thread
From: Antony Antony @ 2017-08-25 17:42 UTC (permalink / raw)
To: Code Kipper
Cc: Antony Antony, Maxime Ripard, Chen-Yu Tsai, Icenowy Zheng,
linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List
Hi Code,
Thanks for the for the feed back. I will incorporate changes you suggest,
disable the stuff on the header, remove de2, .. and send out v3 soon.
WiFi is a an Ampak AP6212A module, with Broadcom 43xx chip inside.
The device shows up, however, I see
I do see [ 8.008301] brcmfmac: brcmf_sdio_htclk: HT Avail timeout
(1000000): clkctl 0x
[ 12.914950] IPv6: ADDRCONF(NETDEV_UP): wlan0: link is not readyeady
I will do more research about wlan0. Or disable initially.
regards,
-antony
On Fri, Aug 25, 2017 at 03:28:41PM +0200, Code Kipper wrote:
> On 25 August 2017 at 12:32, Antony Antony <antony@phenome.org> wrote:
> > Add initial DT support for NanoPi NEO Plus 2 by FriendlyELEC
> > Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> > 1 GB DDR3 RAM
> > 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> > micro SD card slot
> > Gigabit Ethernet (external RTL8211E-VB-CG chip)
> > 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> > 2x USB 2.0 host ports & 2x USB via headers
> >
> > The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> > Added dwmac-sun8i Gigabit Ethernet support based on
> > Nano Pi Neo2 DT and the schematics.
> >
> > Signed-off-by: Antony Antony <antony@phenome.org>
> > ---
> > arch/arm64/boot/dts/allwinner/Makefile | 1 +
> > .../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 341 +++++++++++++++++++++
> > 2 files changed, 342 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> >
> > diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> > index 108f12c..e6810c8 100644
> > --- a/arch/arm64/boot/dts/allwinner/Makefile
> > +++ b/arch/arm64/boot/dts/allwinner/Makefile
> > @@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
> > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
> > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
> > dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
> > +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
> >
> > always := $(dtb-y)
> > subdir-y := $(dts-dirs)
> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> > new file mode 100644
> > index 0000000..d279ad8
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> > @@ -0,0 +1,341 @@
> > +/*
> > + * Copyright (C) 2017 Antony Antony <antony@phenome.org>
> > + * Copyright (C) 2016 ARM Ltd.
> > + *
> > + * This file is dual-licensed: you can use it either under the terms
> > + * of the GPL or the X11 license, at your option. Note that this dual
> > + * licensing only applies to this file, and not this project as a
> > + * whole.
> > + *
> > + * a) This file is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of the
> > + * License, or (at your option) any later version.
> > + *
> > + * This file is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * Or, alternatively,
> > + *
> > + * b) Permission is hereby granted, free of charge, to any person
> > + * obtaining a copy of this software and associated documentation
> > + * files (the "Software"), to deal in the Software without
> > + * restriction, including without limitation the rights to use,
> > + * copy, modify, merge, publish, distribute, sublicense, and/or
> > + * sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following
> > + * conditions:
> > + *
> > + * The above copyright notice and this permission notice shall be
> > + * included in all copies or substantial portions of the Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> > + * OTHER DEALINGS IN THE SOFTWARE.
> > + */
> > +
> > +/dts-v1/;
> > +#include "sun50i-h5.dtsi"
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/input/input.h>
> > +#include <dt-bindings/pinctrl/sun4i-a10.h>
> > +
> > +/ {
> > + model = "FriendlyARM NanoPi NEO Plus2";
> > + compatible = "friendlyarm,nanopi-neo-pus2", "allwinner,sun50i-h5";
> Hi,
> s/pus/plus
> > +
> > + reg_vcc3v3: vcc3v3 {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc3v3";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + };
> > +
> > + aliases {
> > + ethernet0 = &emac;
> > + serial0 = &uart0;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial0:115200n8";
> > + };
> > +
> > + leds {
> > + compatible = "gpio-leds";
> > +
> > + pwr {
> > + label = "orangepi:green:pwr";
> > + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
> > + default-state = "on";
> > + };
> > +
> > + status {
> > + label = "orangepi:red:status";
> > + gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
> > + };
> > + };
> Is this correct?...check against the schematic and also remove orangepi c&p.
> > +
> > + r-gpio-keys {
> > + compatible = "gpio-keys";
> > +
> > + sw4 {
> > + label = "sw4";
> > + linux,code = <BTN_0>;
> > + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
> > + };
> > + };
> Is there a key onboard?
>
> > +
> > + reg_gmac_3v3: gmac-3v3 {
> > + compatible = "regulator-fixed";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&gmac_power_pin_nanopi>;
> > + regulator-name = "gmac-3v3";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + startup-delay-us = <100000>;
> > + enable-active-high;
> > + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
> > + };
> > +
> > + vdd_cpux: gpio-regulator {
> > + compatible = "regulator-gpio";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&vdd_cpux_r_npi>;
> > +
> > + regulator-name = "vdd-cpux";
> > + regulator-type = "voltage";
> > + regulator-boot-on;
> > + regulator-always-on;
> > + regulator-min-microvolt = <1100000>;
> > + regulator-max-microvolt = <1300000>;
> > + regulator-ramp-delay = <50>; /* 4ms */
> > +
> > + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
> > + gpios-states = <0x1>;
> > + states = <1100000 0x0
> > + 1300000 0x1>;
> > + };
> > +
> > + wifi_pwrseq: wifi_pwrseq {
> > + compatible = "mmc-pwrseq-simple";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&wifi_en_npi>;
> > + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> > + post-power-on-delay-ms = <200>;
> > + };
> > +};
> > +
> > +&codec {
> > + allwinner,audio-routing =
> > + "Line Out", "LINEOUT",
> > + "MIC1", "Mic",
> > + "Mic", "MBIAS";
> > + status = "okay";
> > +};
> > +
> > +&de {
> > + status = "okay";
> > +};
> de2 stuff hasn't been delivered yet so don't include it.
> > +
> > +&ehci0 {
> > + status = "okay";
> > +};
> > +
> > +&ehci1 {
> > + status = "okay";
> > +};
> > +
> > +&ehci2 {
> > + status = "okay";
> > +};
> USB 1 and 2 are on the header so should be disabled.
> > +
> > +&ehci3 {
> > + status = "okay";
> > +};
> > +
> > +&emac {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&emac_rgmii_pins>;
> > + phy-supply = <®_gmac_3v3>;
> > + phy-handle = <&ext_rgmii_phy>;
> > + phy-mode = "rgmii";
> > + status = "okay";
> > +};
> > +
> > +&hdmi {
> > + status = "okay";
> > +};
> ditto
> > +
> > +&ir {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&ir_pins_a>;
> > + status = "okay";
> > +};
> No IR on the board, however it's on a header so disable or remove.
> > +
> > +&mdio {
> > + ext_rgmii_phy: ethernet-phy@7 {
> > + compatible = "ethernet-phy-ieee802.3-c22";
> > + reg = <7>;
> > + };
> > +};
> > +
> > +&mixer0 {
> > + status = "okay";
> > +};
> de2 ditto
> > +
> > +&mmc0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> > + vmmc-supply = <®_vcc3v3>;
> > + bus-width = <4>;
> > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
> > + status = "okay";
> > +};
> > +
> > +&mmc1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc1_pins_a>;
> > + vmmc-supply = <®_vcc3v3>;
> > + vqmmc-supply = <®_vcc3v3>;
> > + mmc-pwrseq = <&wifi_pwrseq>;
> > + bus-width = <4>;
> > + non-removable;
> > + boot_device = <0>;
> > + status = "okay";
> > +
> > + brcmf: bcrmf@1 {
> > + reg = <1>;
> > + compatible = "brcm,bcm4329-fmac";
> > + };
> Incorrect wifi chip - just deliver what you've tested.
> > +};
> > +
> > +&mmc2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc2_8bit_pins>;
> > + vmmc-supply = <®_vcc3v3>;
> > + bus-width = <8>;
> > + non-removable;
> > + cap-mmc-hw-reset;
> > + boot_device = <0>;
> > + status = "okay";
> > +};
> > +
> > +&mmc2_8bit_pins {
> > + /* Increase drive strength for DDR modes */
> > + drive-strength = <40>;
> > + /* eMMC is missing pull-ups */
> > + bias-pull-up;
> > +};
> > +
> > +&ohci0 {
> > + status = "okay";
> > +};
> > +
> > +&ohci1 {
> > + status = "okay";
> > +};
> > +
> > +&ohci2 {
> > + status = "okay";
> > +};
> > +
> > +&ohci3 {
> > + status = "okay";
> > +};
> > +
> > +&tcon0 {
> > + status = "okay";
> > +};
> de2 ditto
> > +
> > +&spi0 {
> > + status = "okay";
> > + spi-flash@0 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "jedec,spi-nor";
> > + reg = <0>; /* Chip select 0 */
> > + spi-max-frequency = <10000000>;
> > + status = "okay";
> > + partitions {
> > + compatible = "fixed-partitions";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + partition@0 {
> > + label = "uboot";
> > + reg = <0x0 0x100000>;
> > + };
> > + partition@100000 {
> > + label = "env";
> > + reg = <0x100000 0x100000>;
> > + };
> > + };
> > + };
> > +};
> spi0 is on the header and there is no spi flash.
>
> BR,
> CK
> > +
> > +&pio {
> > + leds_npi: led_pins@0 {
> > + pins = "PA10";
> > + function = "gpio_out";
> > + };
> > + gmac_power_pin_nanopi: gmac_power_pin@0 {
> > + pins = "PD6";
> > + function = "gpio_out";
> > + };
> > +};
> > +
> > +&r_pio {
> > + leds_r_npi: led_pins@0 {
> > + pins = "PL10";
> > + function = "gpio_out";
> > + };
> > +
> > + vdd_cpux_r_npi: regulator_pins@0 {
> > + allwinner,pins = "PL6";
> > + allwinner,function = "gpio_out";
> > + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> > + };
> > +
> > + wifi_en_npi: wifi_en_pin {
> > + pins = "PL7";
> > + function = "gpio_out";
> > + };
> > +};
> > +
> > +&uart0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart0_pins_a>;
> > + status = "okay";
> > +};
> > +
> > +&uart1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart1_pins>;
> > + status = "disabled";
> > +};
> > +
> > +&uart2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart2_pins>;
> > + status = "disabled";
> > +};
> > +
> > +&usb_otg {
> > + dr_mode = "usb";
> > + status = "okay";
> > +};
> > +
> > +&usbphy {
> > + /* USB Type-A ports' VBUS is always on */
> > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> > + status = "okay";
> > +};
> > --
> > 2.9.3
> >
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2
2017-08-25 13:28 ` Code Kipper
2017-08-25 17:42 ` Antony Antony
@ 2017-08-28 12:16 ` Antony Antony
2017-08-28 12:18 ` Icenowy Zheng
1 sibling, 1 reply; 22+ messages in thread
From: Antony Antony @ 2017-08-28 12:16 UTC (permalink / raw)
To: Code Kipper
Cc: Antony Antony, Maxime Ripard, Chen-Yu Tsai, Icenowy Zheng,
linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List
On Fri, Aug 25, 2017 at 03:28:41PM +0200, Code Kipper wrote:
> On 25 August 2017 at 12:32, Antony Antony <antony@phenome.org> wrote:
> > +
> > + brcmf: bcrmf@1 {
> > + reg = <1>;
> > + compatible = "brcm,bcm4329-fmac";
> > + };
> Incorrect wifi chip - just deliver what you've tested.
You are right. Now I found the correct chip ID by enabling debug with
Broadcom kernel module 'modprobe brcmfmac debug=0x3ffff6'
The module is Ampak AP6212A with Broadcom 43430 rev=1 inside it.
brcmfmac: brcmf_chip_recognition found AXI chip: BCM43430, rev=1
brcmfmac: brcmf_ops_sdio_probe sdio vendor ID: 0x02d0
brcmfmac: brcmf_ops_sdio_probe sdio device ID: 0xa9a6
IPv6: ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready
This information mostly match with https://wikidevi.com/wiki/AMPAK, except
module is actually AP6212A. Some of the modules may not have 'A' printed on
them. However the ones that identify as rev=1 is a AP6212A.
FYI: there were two things that confused me
- bcm4329-fmac also works.
- I couldn't configure it to join WiFi network with password.
With change I will send a v4. Here is the propssed diff to v3.
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
/*
- * WiFi driver support could be incomplete,
- * wlan0 is able to see Base Stations, however not able to join.
+ * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
+ * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
*/
brcmf: wifi@1 {
reg = <1>;
- compatible = "brcm,bcm4329-fmac";
+ compatible = "brcm,bcm43430-fmac";
};
I think now nanopi-neo-plus2.dts, v4, is in a good shape to merge.
thanks for the feedback and review.
regards,
-antony
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2
2017-08-28 12:16 ` Antony Antony
@ 2017-08-28 12:18 ` Icenowy Zheng
2017-08-29 21:51 ` Antony Antony
0 siblings, 1 reply; 22+ messages in thread
From: Icenowy Zheng @ 2017-08-28 12:18 UTC (permalink / raw)
To: Antony Antony, Code Kipper
Cc: Maxime Ripard, Chen-Yu Tsai, linux-sunxi, linux-arm-kernel,
devicetree, Linux Kernel Mailing List
于 2017年8月28日 GMT+08:00 下午8:16:44, Antony Antony <antony@phenome.org> 写到:
>On Fri, Aug 25, 2017 at 03:28:41PM +0200, Code Kipper wrote:
>> On 25 August 2017 at 12:32, Antony Antony <antony@phenome.org> wrote:
>
>> > +
>> > + brcmf: bcrmf@1 {
>> > + reg = <1>;
>> > + compatible = "brcm,bcm4329-fmac";
>> > + };
>> Incorrect wifi chip - just deliver what you've tested.
Nope, this compatible is required by the dt binding, see the
binding document or other DTs with brcmfmac SDIO.
Please complain to brcmfmac maintainers.
>
>You are right. Now I found the correct chip ID by enabling debug with
>Broadcom kernel module 'modprobe brcmfmac debug=0x3ffff6'
>
>The module is Ampak AP6212A with Broadcom 43430 rev=1 inside it.
>
>brcmfmac: brcmf_chip_recognition found AXI chip: BCM43430, rev=1
>brcmfmac: brcmf_ops_sdio_probe sdio vendor ID: 0x02d0
>brcmfmac: brcmf_ops_sdio_probe sdio device ID: 0xa9a6
>
>IPv6: ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready
>
>This information mostly match with https://wikidevi.com/wiki/AMPAK,
>except
>module is actually AP6212A. Some of the modules may not have 'A'
>printed on
>them. However the ones that identify as rev=1 is a AP6212A.
>
>FYI: there were two things that confused me
> - bcm4329-fmac also works.
> - I couldn't configure it to join WiFi network with password.
>
>With change I will send a v4. Here is the propssed diff to v3.
>
>arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
>
> /*
>- * WiFi driver support could be incomplete,
>- * wlan0 is able to see Base Stations, however not able to
>join.
>+ * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
>+ * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> */
> brcmf: wifi@1 {
> reg = <1>;
>- compatible = "brcm,bcm4329-fmac";
>+ compatible = "brcm,bcm43430-fmac";
> };
>
>I think now nanopi-neo-plus2.dts, v4, is in a good shape to merge.
>
>thanks for the feedback and review.
>
>regards,
>-antony
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2
2017-08-28 12:18 ` Icenowy Zheng
@ 2017-08-29 21:51 ` Antony Antony
0 siblings, 0 replies; 22+ messages in thread
From: Antony Antony @ 2017-08-29 21:51 UTC (permalink / raw)
To: Icenowy Zheng
Cc: Code Kipper, Maxime Ripard, Chen-Yu Tsai, linux-sunxi,
linux-arm-kernel, devicetree, Linux Kernel Mailing List
On Mon, Aug 28, 2017 at 08:18:58PM +0800, Icenowy Zheng wrote:
>
>
> 于 2017年8月28日 GMT+08:00 下午8:16:44, Antony Antony <antony@phenome.org> 写到:
> >On Fri, Aug 25, 2017 at 03:28:41PM +0200, Code Kipper wrote:
> >> On 25 August 2017 at 12:32, Antony Antony <antony@phenome.org> wrote:
> >
> >> > +
> >> > + brcmf: bcrmf@1 {
> >> > + reg = <1>;
> >> > + compatible = "brcm,bcm4329-fmac";
> >> > + };
> >> Incorrect wifi chip - just deliver what you've tested.
>
> Nope, this compatible is required by the dt binding, see the
> binding document or other DTs with brcmfmac SDIO.
Icenowy,
Thanks for pointing out brcm,bcm43430-fmac is missing in Documenation.
I just send a patch to wireless brcmfmac maintainers.
https://patchwork.kernel.org/patch/9928387/
Would this work?
> Please complain to brcmfmac maintainers.
Lets see how it shakes out.
regards,
-antony
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v3] arm64: allwinner: h5: add support for NanoPi NEO Plus 2
[not found] <20170824231716.2623-1-antony@phenome.org>
2017-08-25 10:32 ` [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2 Antony Antony
@ 2017-08-26 11:11 ` Antony Antony
2017-08-28 12:19 ` [PATCH v4] arm64: allwinner: h5: add support for NanoPi NEO Plus2 Antony Antony
` (5 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Antony Antony @ 2017-08-26 11:11 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Icenowy Zheng, linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List, Antony Antony
Add initial DT support for NanoPi NEO Plus 2 by FriendlyELEC
Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
1 GB DDR3 RAM
8GB eMMC flash (Samsung KLM8G1WEPD-B031)
micro SD card slot
Gigabit Ethernet (external RTL8211E-VB-CG chip)
802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
2x USB 2.0 host ports & 2x USB via headers
The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
Added dwmac-sun8i Gigabit Ethernet support based on
Nano Pi Neo2 DT and the schematics.
Signed-off-by: Antony Antony <antony@phenome.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 260 +++++++++++++++++++++
2 files changed, 261 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
---
Changes
v1 -> v2
add wifi power controller, mmc1, mmc2
remove reg_usb0_vbus
v2 -> v3
fix typo s/orangepi/nanopi/, s/pus/plus/
usb_otg set to host mode
wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
remove hdmi, de2, r-gpio-keys, mixer - not supported the board
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 108f12c..e6810c8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 0000000..f86db28
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,260 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus2";
+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_nanopi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_cpux_r_npi>;
+
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ boot_device = <0>;
+ status = "okay";
+
+ /*
+ * WiFi driver support could be incomplete,
+ * wlan0 is able to see Base Stations, however not able to join.
+ */
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&pio {
+ leds_npi: led_pins@0 {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+ gmac_power_pin_nanopi: gmac_power_pin@0 {
+ pins = "PD6";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ status = "okay";
+};
--
2.9.3
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v4] arm64: allwinner: h5: add support for NanoPi NEO Plus2
[not found] <20170824231716.2623-1-antony@phenome.org>
2017-08-25 10:32 ` [PATCH v2] arm64: allwinner: h5: add support for NanoPi NEO Plus 2 Antony Antony
2017-08-26 11:11 ` [PATCH v3] " Antony Antony
@ 2017-08-28 12:19 ` Antony Antony
2017-08-30 12:50 ` [PATCH v5] " Antony Antony
` (4 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Antony Antony @ 2017-08-28 12:19 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Icenowy Zheng, linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List, Antony Antony
Add initial DT support for NanoPi NEO Plus2 by FriendlyELEC
Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
1 GB DDR3 RAM
8GB eMMC flash (Samsung KLM8G1WEPD-B031)
micro SD card slot
Gigabit Ethernet (external RTL8211E-VB-CG chip)
802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
2x USB 2.0 host ports & 2x USB via headers
The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
Added dwmac-sun8i Gigabit Ethernet support based on
Nano Pi Neo2 DT and the schematics.
Signed-off-by: Antony Antony <antony@phenome.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 260 +++++++++++++++++++++
2 files changed, 261 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
---
Changes
v1 -> v2
add wifi power controller, mmc1, mmc2
remove reg_usb0_vbus
v2 -> v3
fix typo s/orangepi/nanopi/, s/pus/plus/
usb_otg set to host mode
wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
remove hdmi, de2, r-gpio-keys, mixer - not supported the board
v3->v4
update WiFi chip compatible to bcm43430-fmac
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 108f12c..e6810c8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 0000000..5fcc2e8
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,260 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus2";
+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_nanopi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_cpux_r_npi>;
+
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ boot_device = <0>;
+ status = "okay";
+
+ /*
+ * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
+ * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
+ */
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm43430-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&pio {
+ leds_npi: led_pins@0 {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+ gmac_power_pin_nanopi: gmac_power_pin@0 {
+ pins = "PD6";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ status = "okay";
+};
--
2.9.3
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v5] arm64: allwinner: h5: add support for NanoPi NEO Plus2
[not found] <20170824231716.2623-1-antony@phenome.org>
` (2 preceding siblings ...)
2017-08-28 12:19 ` [PATCH v4] arm64: allwinner: h5: add support for NanoPi NEO Plus2 Antony Antony
@ 2017-08-30 12:50 ` Antony Antony
2017-08-31 14:58 ` Maxime Ripard
2017-09-01 10:58 ` [PATCH] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support Antony Antony
` (3 subsequent siblings)
7 siblings, 1 reply; 22+ messages in thread
From: Antony Antony @ 2017-08-30 12:50 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Icenowy Zheng, linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List, Antony Antony
Add initial DT support for NanoPi NEO Plus2 by FriendlyARM
Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
1 GB DDR3 RAM
8GB eMMC flash (Samsung KLM8G1WEPD-B031)
micro SD card slot
Gigabit Ethernet (external RTL8211E-VB-CG chip)
802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
2x USB 2.0 host ports & 2x USB via headers
The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
Added dwmac-sun8i Gigabit Ethernet support based on
Nano Pi Neo2 DT and the schematics.
Signed-off-by: Antony Antony <antony@phenome.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 262 +++++++++++++++++++++
2 files changed, 263 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
---
Changes
v1 -> v2
add wifi power controller, mmc1, mmc2
remove reg_usb0_vbus
v2 -> v3
fix typo s/orangepi/nanopi/, s/pus/plus/
usb_otg set to host mode
wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
remove hdmi, de2, r-gpio-keys, mixer - not supported the board
v3->v4 update WiFi chip compatible to bcm43430-fmac
v4->v5 back to bcm4329-fmac bcm43430-fmac is the wrong way.
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 108f12c..e6810c8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 0000000..a6687db
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,262 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus2";
+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_nanopi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_cpux_r_npi>;
+
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ boot_device = <0>;
+ status = "okay";
+
+ /*
+ * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
+ * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
+ * There is no specific Documentation: dt-binding for BCM43430
+ * brcm,bcm4329-fmac compatible can initialize this module
+ */
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&pio {
+ leds_npi: led_pins@0 {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+ gmac_power_pin_nanopi: gmac_power_pin@0 {
+ pins = "PD6";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ status = "okay";
+};
--
2.9.3
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v5] arm64: allwinner: h5: add support for NanoPi NEO Plus2
2017-08-30 12:50 ` [PATCH v5] " Antony Antony
@ 2017-08-31 14:58 ` Maxime Ripard
2017-09-01 10:53 ` Antony Antony
0 siblings, 1 reply; 22+ messages in thread
From: Maxime Ripard @ 2017-08-31 14:58 UTC (permalink / raw)
To: Antony Antony
Cc: Chen-Yu Tsai, Icenowy Zheng, linux-sunxi, linux-arm-kernel,
devicetree, Linux Kernel Mailing List
[-- Attachment #1: Type: text/plain, Size: 10209 bytes --]
Hi,
On Wed, Aug 30, 2017 at 02:50:57PM +0200, Antony Antony wrote:
> Add initial DT support for NanoPi NEO Plus2 by FriendlyARM
> Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> 1 GB DDR3 RAM
> 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> micro SD card slot
> Gigabit Ethernet (external RTL8211E-VB-CG chip)
> 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> 2x USB 2.0 host ports & 2x USB via headers
This indendation is weird
> The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> Added dwmac-sun8i Gigabit Ethernet support based on
> Nano Pi Neo2 DT and the schematics.
And that's outdated.
> Signed-off-by: Antony Antony <antony@phenome.org>
> ---
> arch/arm64/boot/dts/allwinner/Makefile | 1 +
> .../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 262 +++++++++++++++++++++
> 2 files changed, 263 insertions(+)
> create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
>
> ---
> Changes
> v1 -> v2
> add wifi power controller, mmc1, mmc2
> remove reg_usb0_vbus
> v2 -> v3
> fix typo s/orangepi/nanopi/, s/pus/plus/
> usb_otg set to host mode
> wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
> remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
> remove hdmi, de2, r-gpio-keys, mixer - not supported the board
> v3->v4 update WiFi chip compatible to bcm43430-fmac
> v4->v5 back to bcm4329-fmac bcm43430-fmac is the wrong way.
>
> diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
> index 108f12c..e6810c8 100644
> --- a/arch/arm64/boot/dts/allwinner/Makefile
> +++ b/arch/arm64/boot/dts/allwinner/Makefile
> @@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
> dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
> +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
>
> always := $(dtb-y)
> subdir-y := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> new file mode 100644
> index 0000000..a6687db
> --- /dev/null
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
> @@ -0,0 +1,262 @@
> +/*
> + * Copyright (C) 2017 Antony Antony <antony@phenome.org>
> + * Copyright (C) 2016 ARM Ltd.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This file is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This file is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +#include "sun50i-h5.dtsi"
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/pinctrl/sun4i-a10.h>
> +
> +/ {
> + model = "FriendlyARM NanoPi NEO Plus2";
> + compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
> +
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + aliases {
> + ethernet0 = &emac;
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + pwr {
> + label = "nanopi:green:pwr";
> + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
> + default-state = "on";
> + };
> +
> + status {
> + label = "nanopi:red:status";
> + gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
> + };
> + };
> +
> + reg_gmac_3v3: gmac-3v3 {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac_power_pin_nanopi>;
> + regulator-name = "gmac-3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + startup-delay-us = <100000>;
> + enable-active-high;
> + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
> + };
> +
> + vdd_cpux: gpio-regulator {
> + compatible = "regulator-gpio";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&vdd_cpux_r_npi>;
> +
> + regulator-name = "vdd-cpux";
> + regulator-type = "voltage";
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1300000>;
> + regulator-ramp-delay = <50>; /* 4ms */
> +
> + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
> + gpios-states = <0x1>;
> + states = <1100000 0x0
> + 1300000 0x1>;
> + };
> +
> + wifi_pwrseq: wifi_pwrseq {
> + compatible = "mmc-pwrseq-simple";
> + pinctrl-names = "default";
> + pinctrl-0 = <&wifi_en_npi>;
> + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> + post-power-on-delay-ms = <200>;
> + };
You should order these nodes alphabetically.
> +&codec {
> + allwinner,audio-routing =
> + "Line Out", "LINEOUT",
> + "MIC1", "Mic",
> + "Mic", "MBIAS";
> + status = "okay";
> +};
> +
> +&ehci0 {
> + status = "okay";
> +};
> +
> +&ehci3 {
> + status = "okay";
> +};
> +
> +&emac {
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_rgmii_pins>;
> + phy-supply = <®_gmac_3v3>;
> + phy-handle = <&ext_rgmii_phy>;
> + phy-mode = "rgmii";
> + status = "okay";
> +};
> +
> +&mdio {
> + ext_rgmii_phy: ethernet-phy@7 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <7>;
> + };
> +};
This will not compile.
> +&mmc0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <4>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
> + status = "okay";
> +};
> +
> +&mmc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc1_pins_a>;
> + vmmc-supply = <®_vcc3v3>;
> + vqmmc-supply = <®_vcc3v3>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + boot_device = <0>;
This property is not documented anywhere, I'm not sure what it's here
for.
> + status = "okay";
> +
> + /*
> + * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> + * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> + * There is no specific Documentation: dt-binding for BCM43430
> + * brcm,bcm4329-fmac compatible can initialize this module
> + */
This is not really relevant.
> + brcmf: wifi@1 {
> + reg = <1>;
> + compatible = "brcm,bcm4329-fmac";
> + };
> +};
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_8bit_pins>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <8>;
> + non-removable;
> + cap-mmc-hw-reset;
> + boot_device = <0>;
> + status = "okay";
> +};
> +
> +&mmc2_8bit_pins {
> + /* Increase drive strength for DDR modes */
> + drive-strength = <40>;
It's very likely that you actually don't need 40mA
> + /* eMMC is missing pull-ups */
> + bias-pull-up;
> +};
And that one is already here by default.
> +&ohci0 {
> + status = "okay";
> +};
> +
> +&ohci3 {
> + status = "okay";
> +};
> +
> +&pio {
> + leds_npi: led_pins@0 {
> + pins = "PA10";
> + function = "gpio_out";
> + };
> + gmac_power_pin_nanopi: gmac_power_pin@0 {
> + pins = "PD6";
> + function = "gpio_out";
> + };
> +};
You don't need these nodes
> +
> +&r_pio {
> + leds_r_npi: led_pins@0 {
> + pins = "PL10";
> + function = "gpio_out";
> + };
> +
> + vdd_cpux_r_npi: regulator_pins@0 {
> + allwinner,pins = "PL6";
> + allwinner,function = "gpio_out";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +
> + wifi_en_npi: wifi_en_pin {
> + pins = "PL7";
> + function = "gpio_out";
> + };
> +};
Or those.
> +
> +&uart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart0_pins_a>;
> + status = "okay";
> +};
> +
> +&usb_otg {
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> +&usbphy {
> + /* USB Type-A ports' VBUS is always on */
> + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
If it has an ID-detect pin, then it's not a host-only USB OTG
controller. dr_mode should be set to otg.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v5] arm64: allwinner: h5: add support for NanoPi NEO Plus2
2017-08-31 14:58 ` Maxime Ripard
@ 2017-09-01 10:53 ` Antony Antony
2017-09-04 8:27 ` Maxime Ripard
0 siblings, 1 reply; 22+ messages in thread
From: Antony Antony @ 2017-09-01 10:53 UTC (permalink / raw)
To: Maxime Ripard
Cc: Antony Antony, Chen-Yu Tsai, Icenowy Zheng, linux-sunxi,
linux-arm-kernel, devicetree, Linux Kernel Mailing List
Hi Maxime
Thanks for the review. I will send a PATCH v6 soon.
On Thu, Aug 31, 2017 at 04:58:59PM +0200, Maxime Ripard wrote:
> Hi,
>
> On Wed, Aug 30, 2017 at 02:50:57PM +0200, Antony Antony wrote:
> > Add initial DT support for NanoPi NEO Plus2 by FriendlyARM
> > Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> > 1 GB DDR3 RAM
> > 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> > micro SD card slot
> > Gigabit Ethernet (external RTL8211E-VB-CG chip)
> > 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> > 2x USB 2.0 host ports & 2x USB via headers
>
> This indendation is weird
I will fix it.
> > The DTS is based on OrangePi PC 2, sun50i-h5-orangepi-pc2
> > Added dwmac-sun8i Gigabit Ethernet support based on
> > Nano Pi Neo2 DT and the schematics.
>
> And that's outdated.
Now I am glad to delete it.
> > + wifi_pwrseq: wifi_pwrseq {
> > + compatible = "mmc-pwrseq-simple";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&wifi_en_npi>;
> > + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> > + post-power-on-delay-ms = <200>;
> > + };
>
> You should order these nodes alphabetically.
good point I did.
> > +&codec {
> > + allwinner,audio-routing =
> > + "Line Out", "LINEOUT",
> > + "MIC1", "Mic",
> > + "Mic", "MBIAS";
> > + status = "okay";
> > +};
> > +
> > +&ehci0 {
> > + status = "okay";
> > +};
> > +
> > +&ehci3 {
> > + status = "okay";
> > +};
> > +
> > +&emac {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&emac_rgmii_pins>;
> > + phy-supply = <®_gmac_3v3>;
> > + phy-handle = <&ext_rgmii_phy>;
> > + phy-mode = "rgmii";
> > + status = "okay";
> > +};
> > +
> > +&mdio {
> > + ext_rgmii_phy: ethernet-phy@7 {
> > + compatible = "ethernet-phy-ieee802.3-c22";
> > + reg = <7>;
> > + };
> > +};
>
> This will not compile.
I don't understand you, because, v5 file compiled for me. Here is output
from running system, just the relevant part. using dtc -I fs
/proc/device-tree
ext_rgmii_phy = "/soc/ethernet@1c30000/mdio/ethernet-phy@7";
ethernet@1c30000 {
mdio {
..
ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
phandle = <0x1c>;
reg = <0x7>;
linux,phandle = <0x1c>;
};
};
Is this what you expect?
> > +&mmc1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc1_pins_a>;
> > + vmmc-supply = <®_vcc3v3>;
> > + vqmmc-supply = <®_vcc3v3>;
> > + mmc-pwrseq = <&wifi_pwrseq>;
> > + bus-width = <4>;
> > + non-removable;
> > + boot_device = <0>;
>
> This property is not documented anywhere, I'm not sure what it's here
> for.
boot_device is deleted. A u-boot property got mixed up in kernel DT.
> > + status = "okay";
> > +
> > + /*
> > + * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> > + * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> > + * There is no specific Documentation: dt-binding for BCM43430
> > + * brcm,bcm4329-fmac compatible can initialize this module
> > + */
>
> This is not really relevant.
would you prefer no comment or a rewrite? How does this look?
/*
* AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
* sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
*/
I am afraid a casual reader would think "brcm,bcm4329-fmac" is wrong,
because that is not the actual chip inside the module.
> > + brcmf: wifi@1 {
> > + reg = <1>;
> > + compatible = "brcm,bcm4329-fmac";
> > + };
> > +};
> > +
> > +&mmc2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&mmc2_8bit_pins>;
> > + vmmc-supply = <®_vcc3v3>;
> > + bus-width = <8>;
> > + non-removable;
> > + cap-mmc-hw-reset;
> > + boot_device = <0>;
> > + status = "okay";
> > +};
> > +
> > +&mmc2_8bit_pins {
> > + /* Increase drive strength for DDR modes */
> > + drive-strength = <40>;
>
> It's very likely that you actually don't need 40mA
drive-strength and the node mmc2_8bit_pins are gone. When I removed it
drive-strength = <0x1e>; seems the default. And eMMC seems to work when
booting from Micro SD.
NOTE: the 40mA came from a vresion of vendor's old dts file and I also
noticed the same value is used in other dts in kernel e.g
sun8i-h3-orangepi-plus.dts, sun9i-a80-cubieboard4.dts
It could be a copy paste error or those boards need it. Anyway I removed it.
> > + /* eMMC is missing pull-ups */
> > + bias-pull-up;
> > +};
>
> And that one is already here by default.
good, deleteed.
>
> > +&ohci0 {
> > + status = "okay";
> > +};
> > +
> > +&ohci3 {
> > + status = "okay";
> > +};
> > +
> > +&pio {
> > + leds_npi: led_pins@0 {
> > + pins = "PA10";
> > + function = "gpio_out";
> > + };
> > + gmac_power_pin_nanopi: gmac_power_pin@0 {
> > + pins = "PD6";
> > + function = "gpio_out";
> > + };
> > +};
>
> You don't need these nodes
&pio { } and gmac_power_pin_nanopi{} are deleted.
along with
pinctrl-0 = <&gmac_power_pin_nanopi>;
> > +
> > +&r_pio {
> > + leds_r_npi: led_pins@0 {
> > + pins = "PL10";
> > + function = "gpio_out";
> > + };
> > +
> > + vdd_cpux_r_npi: regulator_pins@0 {
> > + allwinner,pins = "PL6";
> > + allwinner,function = "gpio_out";
> > + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> > + };
> > +
> > + wifi_en_npi: wifi_en_pin {
> > + pins = "PL7";
> > + function = "gpio_out";
> > + };
> > +};
>
> Or those.
deleted wifi_en_npi.
>
> > +
> > +&uart0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&uart0_pins_a>;
> > + status = "okay";
> > +};
> > +
> > +&usb_otg {
> > + dr_mode = "host";
> > + status = "okay";
> > +};
> > +
> > +&usbphy {
> > + /* USB Type-A ports' VBUS is always on */
> > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
>
> If it has an ID-detect pin, then it's not a host-only USB OTG
> controller. dr_mode should be set to otga
good point. I don't see an ID-detect connected in the schematic. The
previous generation had.
I will leave
&usb_otg {
dr_mode = "host";
status = "okay";
};
&usbphy {
/* USB Type-A ports' VBUS is always on */
status = "okay";
};
Wow, a nice cleanup.
I am surprised defaults works well and thanks for pointing these out.
-antony
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v5] arm64: allwinner: h5: add support for NanoPi NEO Plus2
2017-09-01 10:53 ` Antony Antony
@ 2017-09-04 8:27 ` Maxime Ripard
2017-09-04 14:26 ` Antony Antony
0 siblings, 1 reply; 22+ messages in thread
From: Maxime Ripard @ 2017-09-04 8:27 UTC (permalink / raw)
To: Antony Antony
Cc: Chen-Yu Tsai, Icenowy Zheng, linux-sunxi, linux-arm-kernel,
devicetree, Linux Kernel Mailing List
[-- Attachment #1: Type: text/plain, Size: 3758 bytes --]
Hi Antony,
On Fri, Sep 01, 2017 at 12:53:13PM +0200, Antony Antony wrote:
> > > +&emac {
> > > + pinctrl-names = "default";
> > > + pinctrl-0 = <&emac_rgmii_pins>;
> > > + phy-supply = <®_gmac_3v3>;
> > > + phy-handle = <&ext_rgmii_phy>;
> > > + phy-mode = "rgmii";
> > > + status = "okay";
> > > +};
> > > +
> > > +&mdio {
> > > + ext_rgmii_phy: ethernet-phy@7 {
> > > + compatible = "ethernet-phy-ieee802.3-c22";
> > > + reg = <7>;
> > > + };
> > > +};
> >
> > This will not compile.
>
> I don't understand you, because, v5 file compiled for me. Here is output
> from running system, just the relevant part. using dtc -I fs
> /proc/device-tree
>
> ext_rgmii_phy = "/soc/ethernet@1c30000/mdio/ethernet-phy@7";
>
> ethernet@1c30000 {
> mdio {
> ..
> ethernet-phy@7 {
> compatible = "ethernet-phy-ieee802.3-c22";
> phandle = <0x1c>;
> reg = <0x7>;
> linux,phandle = <0x1c>;
> };
> };
>
> Is this what you expect?
The bindings have been reverted recently, so if you based your work on
a version between 4.13-rc1 and 4.13-rc6 it will work, but anything
more recent will not compile anymore.
> > > + status = "okay";
> > > +
> > > + /*
> > > + * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> > > + * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> > > + * There is no specific Documentation: dt-binding for BCM43430
> > > + * brcm,bcm4329-fmac compatible can initialize this module
> > > + */
> >
> > This is not really relevant.
>
> would you prefer no comment or a rewrite? How does this look?
>
> /*
> * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> */
>
> I am afraid a casual reader would think "brcm,bcm4329-fmac" is wrong,
> because that is not the actual chip inside the module.
No comment is fine, and I'm not sure the casual reader will ever read
this :)
> > > +&mmc2_8bit_pins {
> > > + /* Increase drive strength for DDR modes */
> > > + drive-strength = <40>;
> >
> > It's very likely that you actually don't need 40mA
>
> drive-strength and the node mmc2_8bit_pins are gone. When I removed it
> drive-strength = <0x1e>; seems the default. And eMMC seems to work when
> booting from Micro SD.
Yes, we set the specs default in the DTSI. 40mA is above what the spec
requires, so not a big deal, but useless.
> NOTE: the 40mA came from a vresion of vendor's old dts file and I also
> noticed the same value is used in other dts in kernel e.g
> sun8i-h3-orangepi-plus.dts, sun9i-a80-cubieboard4.dts
> It could be a copy paste error or those boards need it. Anyway I removed it.
And we used to let that in before yes, so there might be some places
where it's left.
Feel free to clean them up if you feel bored :)
> > > +&usb_otg {
> > > + dr_mode = "host";
> > > + status = "okay";
> > > +};
> > > +
> > > +&usbphy {
> > > + /* USB Type-A ports' VBUS is always on */
> > > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> >
> > If it has an ID-detect pin, then it's not a host-only USB OTG
> > controller. dr_mode should be set to otga
>
> good point. I don't see an ID-detect connected in the schematic. The
> previous generation had.
>
> I will leave
> &usb_otg {
> dr_mode = "host";
> status = "okay";
> };
>
> &usbphy {
> /* USB Type-A ports' VBUS is always on */
> status = "okay";
> };
Looking at the schematics, it seems that the micro USB isn't even
wired to a bus but is only used to power the board. If so, you can
even remove the usb_otg node.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v5] arm64: allwinner: h5: add support for NanoPi NEO Plus2
2017-09-04 8:27 ` Maxime Ripard
@ 2017-09-04 14:26 ` Antony Antony
2017-09-05 11:04 ` Maxime Ripard
0 siblings, 1 reply; 22+ messages in thread
From: Antony Antony @ 2017-09-04 14:26 UTC (permalink / raw)
To: Maxime Ripard
Cc: Antony Antony, Chen-Yu Tsai, Icenowy Zheng, linux-sunxi,
linux-arm-kernel, devicetree, Linux Kernel Mailing List
Hi Maxime,
On Mon, Sep 04, 2017 at 10:27:32AM +0200, Maxime Ripard wrote:
> On Fri, Sep 01, 2017 at 12:53:13PM +0200, Antony Antony wrote:
> > > > +&emac {
> > > > + pinctrl-names = "default";
> > > > + pinctrl-0 = <&emac_rgmii_pins>;
> > > > + phy-supply = <®_gmac_3v3>;
> > > > + phy-handle = <&ext_rgmii_phy>;
> > > > + phy-mode = "rgmii";
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > +&mdio {
> > > > + ext_rgmii_phy: ethernet-phy@7 {
> > > > + compatible = "ethernet-phy-ieee802.3-c22";
> > > > + reg = <7>;
> > > > + };
> > > > +};
> > >
> > > This will not compile.
> >
> > I don't understand you, because, v5 file compiled for me. Here is output
> > from running system, just the relevant part. using dtc -I fs
> > /proc/device-tree
> >
> > ext_rgmii_phy = "/soc/ethernet@1c30000/mdio/ethernet-phy@7";
> >
> > ethernet@1c30000 {
> > mdio {
> > ..
> > ethernet-phy@7 {
> > compatible = "ethernet-phy-ieee802.3-c22";
> > phandle = <0x1c>;
> > reg = <0x7>;
> > linux,phandle = <0x1c>;
> > };
> > };
> >
> > Is this what you expect?
>
> The bindings have been reverted recently, so if you based your work on
> a version between 4.13-rc1 and 4.13-rc6 it will work, but anything
> more recent will not compile anymore.
I deleted emc and related node.
I see. I hope stmmac: sun8i come back soon. It works well well on this
board, running 4.13-rc6
> > > > + status = "okay";
> > > > +
> > > > + /*
> > > > + * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> > > > + * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> > > > + * There is no specific Documentation: dt-binding for BCM43430
> > > > + * brcm,bcm4329-fmac compatible can initialize this module
> > > > + */
> > >
> > > This is not really relevant.
> >
> > would you prefer no comment or a rewrite? How does this look?
> >
> > /*
> > * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
> > * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
> > */
> >
> > I am afraid a casual reader would think "brcm,bcm4329-fmac" is wrong,
> > because that is not the actual chip inside the module.
>
> No comment is fine, and I'm not sure the casual reader will ever read
> this :)
Deleted.
> > > > +&usb_otg {
> > > > + dr_mode = "host";
> > > > + status = "okay";
> > > > +};
> > > > +
> > > > +&usbphy {
> > > > + /* USB Type-A ports' VBUS is always on */
> > > > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> > >
> > > If it has an ID-detect pin, then it's not a host-only USB OTG
> > > controller. dr_mode should be set to otga
> >
> > good point. I don't see an ID-detect connected in the schematic. The
> > previous generation had.
> >
> > I will leave
> > &usb_otg {
> > dr_mode = "host";
> > status = "okay";
> > };
> >
> > &usbphy {
> > /* USB Type-A ports' VBUS is always on */
> > status = "okay";
> > };
>
> Looking at the schematics, it seems that the micro USB isn't even
> wired to a bus but is only used to power the board. If so, you can
> even remove the usb_otg node.
Yes, the Micro USB data pins are not connected. However, it there is a
second USB A port connected to the processor. If I remove &usb_otg node, in
4.13-rc6, the second port goes to disabled.
BTW would this work s/brcm,bcm4329-fmac/brcm/ or should I revert it?
I will send an updated version, v8, soon.
thanks,
-antony
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v5] arm64: allwinner: h5: add support for NanoPi NEO Plus2
2017-09-04 14:26 ` Antony Antony
@ 2017-09-05 11:04 ` Maxime Ripard
0 siblings, 0 replies; 22+ messages in thread
From: Maxime Ripard @ 2017-09-05 11:04 UTC (permalink / raw)
To: Antony Antony
Cc: Chen-Yu Tsai, Icenowy Zheng, linux-sunxi, linux-arm-kernel,
devicetree, Linux Kernel Mailing List
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Hi Antony,
On Mon, Sep 04, 2017 at 04:26:19PM +0200, Antony Antony wrote:
> On Mon, Sep 04, 2017 at 10:27:32AM +0200, Maxime Ripard wrote:
> > On Fri, Sep 01, 2017 at 12:53:13PM +0200, Antony Antony wrote:
> > > > > +&emac {
> > > > > + pinctrl-names = "default";
> > > > > + pinctrl-0 = <&emac_rgmii_pins>;
> > > > > + phy-supply = <®_gmac_3v3>;
> > > > > + phy-handle = <&ext_rgmii_phy>;
> > > > > + phy-mode = "rgmii";
> > > > > + status = "okay";
> > > > > +};
> > > > > +
> > > > > +&mdio {
> > > > > + ext_rgmii_phy: ethernet-phy@7 {
> > > > > + compatible = "ethernet-phy-ieee802.3-c22";
> > > > > + reg = <7>;
> > > > > + };
> > > > > +};
> > > >
> > > > This will not compile.
> > >
> > > I don't understand you, because, v5 file compiled for me. Here is output
> > > from running system, just the relevant part. using dtc -I fs
> > > /proc/device-tree
> > >
> > > ext_rgmii_phy = "/soc/ethernet@1c30000/mdio/ethernet-phy@7";
> > >
> > > ethernet@1c30000 {
> > > mdio {
> > > ..
> > > ethernet-phy@7 {
> > > compatible = "ethernet-phy-ieee802.3-c22";
> > > phandle = <0x1c>;
> > > reg = <0x7>;
> > > linux,phandle = <0x1c>;
> > > };
> > > };
> > >
> > > Is this what you expect?
> >
> > The bindings have been reverted recently, so if you based your work on
> > a version between 4.13-rc1 and 4.13-rc6 it will work, but anything
> > more recent will not compile anymore.
>
> I deleted emc and related node.
> I see. I hope stmmac: sun8i come back soon. It works well well on this
> board, running 4.13-rc6
Yeah, I hope too. Unfortunately, the DT bindings were still under
discussion after it's been merged, so we couldn't guarantee their
stability in the future.
> > > > > +&usb_otg {
> > > > > + dr_mode = "host";
> > > > > + status = "okay";
> > > > > +};
> > > > > +
> > > > > +&usbphy {
> > > > > + /* USB Type-A ports' VBUS is always on */
> > > > > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> > > >
> > > > If it has an ID-detect pin, then it's not a host-only USB OTG
> > > > controller. dr_mode should be set to otga
> > >
> > > good point. I don't see an ID-detect connected in the schematic. The
> > > previous generation had.
> > >
> > > I will leave
> > > &usb_otg {
> > > dr_mode = "host";
> > > status = "okay";
> > > };
> > >
> > > &usbphy {
> > > /* USB Type-A ports' VBUS is always on */
> > > status = "okay";
> > > };
> >
> > Looking at the schematics, it seems that the micro USB isn't even
> > wired to a bus but is only used to power the board. If so, you can
> > even remove the usb_otg node.
>
> Yes, the Micro USB data pins are not connected. However, it there is a
> second USB A port connected to the processor. If I remove &usb_otg node, in
> 4.13-rc6, the second port goes to disabled.
Ok, someone got creative :)
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
[not found] <20170824231716.2623-1-antony@phenome.org>
` (3 preceding siblings ...)
2017-08-30 12:50 ` [PATCH v5] " Antony Antony
@ 2017-09-01 10:58 ` Antony Antony
2017-09-01 20:45 ` [PATCH v7] " Antony Antony
` (2 subsequent siblings)
7 siblings, 0 replies; 22+ messages in thread
From: Antony Antony @ 2017-09-01 10:58 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Icenowy Zheng, linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List, Antony Antony
Add initial DT for NanoPi NEO Plus2 by FriendlyARM
- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
- 1 GB DDR3 RAM
- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
- micro SD card slot
- Gigabit Ethernet (external RTL8211E-VB-CG chip)
- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
- 2x USB 2.0 host ports & 2x USB via headers
Signed-off-by: Antony Antony <antony@phenome.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 230 +++++++++++++++++++++
2 files changed, 231 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
---
Changes
v1 -> v2
add wifi power controller, mmc1, mmc2
remove reg_usb0_vbus
v2 -> v3
fix typo s/orangepi/nanopi/, s/pus/plus/
usb_otg set to host mode
wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
remove hdmi, de2, r-gpio-keys, mixer - not supported the board
v3->v4 update WiFi chip compatible to bcm43430-fmac
v4->v5 back to bcm4329-fmac bcm43430-fmac is the wrong way.
v5-->v6
sorted nodes
removed usb0_id_det-gpios,boot_device, drive-strength = <40>; boot_device
delete nodes which are same as the defaults.
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 108f12c..e6810c8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 0000000..f37df3a
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,230 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus2";
+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_cpux_r_npi>;
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+ /*
+ * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
+ * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
+ */
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ status = "okay";
+};
--
2.9.3
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v7] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
[not found] <20170824231716.2623-1-antony@phenome.org>
` (4 preceding siblings ...)
2017-09-01 10:58 ` [PATCH] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support Antony Antony
@ 2017-09-01 20:45 ` Antony Antony
2017-09-04 14:30 ` [PATCH v8] " Antony Antony
2017-09-07 16:42 ` [PATCH v9] " Antony Antony
7 siblings, 0 replies; 22+ messages in thread
From: Antony Antony @ 2017-09-01 20:45 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Icenowy Zheng, linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List, Antony Antony
Add initial DT for NanoPi NEO Plus2 by FriendlyARM
- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
- 1 GB DDR3 RAM
- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
- micro SD card slot
- Gigabit Ethernet (external RTL8211E-VB-CG chip)
- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
- 2x USB 2.0 host ports & 2x USB via headers
Signed-off-by: Antony Antony <antony@phenome.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 229 +++++++++++++++++++++
2 files changed, 230 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
---
Changes
v1 -> v2
add wifi power controller, mmc1, mmc2
remove reg_usb0_vbus
v2 -> v3
fix typo s/orangepi/nanopi/, s/pus/plus/
usb_otg set to host mode
wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
remove hdmi, de2, r-gpio-keys, mixer - not supported the board
v3->v4 update WiFi chip compatible to bcm43430-fmac
v4->v5 back to bcm4329-fmac bcm43430-fmac is the wrong way.
v5-->v6
sorted nodes
removed usb0_id_det-gpios,boot_device, drive-strength = <40>; boot_device
delete nodes which are same as the defaults.
v6->v7
s/brcm,bcm4329-fmac/brcm/
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 108f12c..e6810c8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 0000000..abea712
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,229 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus2";
+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_cpux_r_npi>;
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <®_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+ /*
+ * AMPAK AP6212A WiFi module with BCM43430, rev=1 inside
+ * sdio vendor ID: 0x02d0, sdio device ID: 0xa9a6
+ */
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ status = "okay";
+};
--
2.9.3
^ permalink raw reply related [flat|nested] 22+ messages in thread* [PATCH v8] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
[not found] <20170824231716.2623-1-antony@phenome.org>
` (5 preceding siblings ...)
2017-09-01 20:45 ` [PATCH v7] " Antony Antony
@ 2017-09-04 14:30 ` Antony Antony
2017-09-05 11:09 ` Maxime Ripard
2017-09-07 16:42 ` [PATCH v9] " Antony Antony
7 siblings, 1 reply; 22+ messages in thread
From: Antony Antony @ 2017-09-04 14:30 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Icenowy Zheng, linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List, Antony Antony
Add initial DT for NanoPi NEO Plus2 by FriendlyARM
- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
- 1 GB DDR3 RAM
- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
- micro SD card slot
- Gigabit Ethernet (external RTL8211E-VB-CG chip)
- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
- 2x USB 2.0 host ports & 2x USB via headers
Signed-off-by: Antony Antony <antony@phenome.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 208 +++++++++++++++++++++
2 files changed, 209 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
---
Changes
v1 -> v2
add wifi power controller, mmc1, mmc2
remove reg_usb0_vbus
v2 -> v3
fix typo s/orangepi/nanopi/, s/pus/plus/
usb_otg set to host mode
wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
remove hdmi, de2, r-gpio-keys, mixer - not supported the board
v3->v4 update WiFi chip compatible to bcm43430-fmac
v4->v5 back to bcm4329-fmac bcm43430-fmac is the wrong way.
v5-->v6
sorted nodes
removed usb0_id_det-gpios,boot_device, drive-strength = <40>; boot_device
delete nodes which are same as the defaults.
v6->v7
s/brcm,bcm4329-fmac/brcm/
v7->v8
remove emac(stmmac: sun8i is reverted in upstream) & related node
remove AP6212A comment
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 108f12c..e6810c8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 0000000..ba02ffd
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,208 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus2";
+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_cpux_r_npi>;
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ status = "okay";
+};
--
2.9.3
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v8] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
2017-09-04 14:30 ` [PATCH v8] " Antony Antony
@ 2017-09-05 11:09 ` Maxime Ripard
0 siblings, 0 replies; 22+ messages in thread
From: Maxime Ripard @ 2017-09-05 11:09 UTC (permalink / raw)
To: Antony Antony
Cc: Chen-Yu Tsai, Icenowy Zheng, linux-sunxi, linux-arm-kernel,
devicetree, Linux Kernel Mailing List
[-- Attachment #1: Type: text/plain, Size: 1277 bytes --]
Hi Antony,
Almost good, I'm sorry I missed a few things before.
On Mon, Sep 04, 2017 at 04:30:14PM +0200, Antony Antony wrote:
> +&mmc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc1_pins_a>;
> + vmmc-supply = <®_vcc3v3>;
> + vqmmc-supply = <®_vcc3v3>;
> + mmc-pwrseq = <&wifi_pwrseq>;
> + bus-width = <4>;
> + non-removable;
> + status = "okay";
Please add a new line here.
> + brcmf: wifi@1 {
> + reg = <1>;
> + compatible = "brcm";
This should be the actual compatible, not just the vendor.
> + };
> +};
> +
> +&mmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_8bit_pins>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <8>;
> + non-removable;
> + cap-mmc-hw-reset;
> + boot_device = <0>;
that property should still be removed.
> +&r_pio {
> + leds_r_npi: led_pins@0 {
> + pins = "PL10";
> + function = "gpio_out";
> + };
> +
> + vdd_cpux_r_npi: regulator_pins@0 {
> + allwinner,pins = "PL6";
> + allwinner,function = "gpio_out";
> + allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
> + };
> +};
And these must be left out.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 801 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v9] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
[not found] <20170824231716.2623-1-antony@phenome.org>
` (6 preceding siblings ...)
2017-09-04 14:30 ` [PATCH v8] " Antony Antony
@ 2017-09-07 16:42 ` Antony Antony
2017-09-08 14:49 ` Maxime Ripard
7 siblings, 1 reply; 22+ messages in thread
From: Antony Antony @ 2017-09-07 16:42 UTC (permalink / raw)
To: Maxime Ripard, Chen-Yu Tsai
Cc: Icenowy Zheng, linux-sunxi, linux-arm-kernel, devicetree,
Linux Kernel Mailing List, Antony Antony
Add initial DT for NanoPi NEO Plus2 by FriendlyARM
- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
- 1 GB DDR3 RAM
- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
- micro SD card slot
- Gigabit Ethernet (external RTL8211E-VB-CG chip)
- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
- 2x USB 2.0 host ports & 2x USB via headers
Signed-off-by: Antony Antony <antony@phenome.org>
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 193 +++++++++++++++++++++
2 files changed, 194 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
---
Changes
v1 -> v2
add wifi power controller, mmc1, mmc2
remove reg_usb0_vbus
v2 -> v3
fix typo s/orangepi/nanopi/, s/pus/plus/
usb_otg set to host mode
wifi fix, based on commit 442e1f7e brcm,bcm43xx-fmac.txt
remove functions on header pins: spi, ir, ehci 1&2, ohci 1&2, uart 1&2
remove hdmi, de2, r-gpio-keys, mixer - not supported the board
v3->v4 update WiFi chip compatible to bcm43430-fmac
v4->v5 back to bcm4329-fmac bcm43430-fmac is the wrong way.
v5-->v6
sorted nodes
removed usb0_id_det-gpios,boot_device, drive-strength = <40>; boot_device
delete nodes which are same as the defaults.
v6->v7
s/brcm,bcm4329-fmac/brcm/
v7->v8
remove emac(stmmac: sun8i is reverted in upstream) & related node
remove AP6212A comment
v8->v9
remove r_pio, boot_device(missed in v6)
s/brcm/brcm,bcm4329-fmac/
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 108f12c..e6810c8 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 0000000..7c028af
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,193 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus2";
+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:red:status";
+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ status = "okay";
+};
--
2.9.3
^ permalink raw reply related [flat|nested] 22+ messages in thread* Re: [PATCH v9] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
2017-09-07 16:42 ` [PATCH v9] " Antony Antony
@ 2017-09-08 14:49 ` Maxime Ripard
0 siblings, 0 replies; 22+ messages in thread
From: Maxime Ripard @ 2017-09-08 14:49 UTC (permalink / raw)
To: Antony Antony
Cc: Chen-Yu Tsai, Icenowy Zheng, linux-sunxi, linux-arm-kernel,
devicetree, Linux Kernel Mailing List
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On Thu, Sep 07, 2017 at 06:42:22PM +0200, Antony Antony wrote:
> Add initial DT for NanoPi NEO Plus2 by FriendlyARM
> - Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> - 1 GB DDR3 RAM
> - 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> - micro SD card slot
> - Gigabit Ethernet (external RTL8211E-VB-CG chip)
> - 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> - 2x USB 2.0 host ports & 2x USB via headers
>
> Signed-off-by: Antony Antony <antony@phenome.org>
Queued for 4.15, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 22+ messages in thread