From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Cc: <miquel.raynal@bootlin.com>, <richard@nod.at>,
<dwmw2@infradead.org>, <computersforpeace@gmail.com>,
<marek.vasut@gmail.com>, <michals@xilinx.com>,
nagasuresh12@gmail.com, linux-mtd@lists.infradead.org,
linux-kernel@vger.kernel.org, robh@kernel.org
Subject: Re: [LINUX PATCH v12 3/3] mtd: rawnand: arasan: Add support for Arasan NAND Flash Controller
Date: Tue, 20 Nov 2018 17:24:43 +0100 [thread overview]
Message-ID: <20181120172443.5fb0bc14@bbrezillon> (raw)
In-Reply-To: <1541739641-17789-4-git-send-email-naga.sureshkumar.relli@xilinx.com>
On Fri, 9 Nov 2018 10:30:41 +0530
Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> wrote:
> +static int anfc_setup_data_interface(struct nand_chip *chip, int csline,
> + const struct nand_data_interface *conf)
> +{
> + struct anfc_nand_controller *nfc = to_anfc(chip->controller);
> + struct anfc_nand_chip *achip = to_anfc_nand(chip);
> + int err;
> + const struct nand_sdr_timings *sdr;
> + u32 inftimeval;
> + bool change_sdr_clk = false;
> +
> + if (csline == NAND_DATA_IFACE_CHECK_ONLY)
> + return 0;
> +
> + /*
> + * If the controller is already in the same mode as flash device
> + * then no need to change the timing mode again.
> + */
> + sdr = nand_get_sdr_timings(conf);
> + if (IS_ERR(sdr))
> + return PTR_ERR(sdr);
> +
> + if (sdr->mode < 0)
> + return -ENOTSUPP;
> +
> + inftimeval = sdr->mode & 7;
> + if (sdr->mode >= 2 && sdr->mode <= 5)
> + change_sdr_clk = true;
> + /*
> + * SDR timing modes 2-5 will not work for the arasan nand when
> + * freq > 90 MHz, so reduce the freq in SDR modes 2-5 to < 90Mhz
What's the freq for mode 0 and 1?
> + */
> + if (change_sdr_clk) {
> + clk_disable_unprepare(nfc->clk_sys);
> + err = clk_set_rate(nfc->clk_sys, SDR_MODE_DEFLT_FREQ);
You should not change the clk rate here. It should be done when the
chip is selected, so that, if you ever have 2 different chips connected
to the same controller, you can adapt the rate when they are accessed.
> + if (err) {
> + dev_err(nfc->dev, "Can't set the clock rate\n");
> + return err;
> + }
> + err = clk_prepare_enable(nfc->clk_sys);
> + if (err) {
> + dev_err(nfc->dev, "Unable to enable sys clock.\n");
> + clk_disable_unprepare(nfc->clk_sys);
> + return err;
> + }
> + }
> + achip->inftimeval = inftimeval;
> +
> + return 0;
> +}
> +
> +static int anfc_nand_attach_chip(struct nand_chip *chip)
> +{
> + struct mtd_info *mtd = nand_to_mtd(chip);
> + struct anfc_nand_chip *achip = to_anfc_nand(chip);
> + u32 ret;
> +
> + if (mtd->writesize <= SZ_512)
> + achip->spare_caddr_cycles = 1;
> + else
> + achip->spare_caddr_cycles = 2;
> +
> + chip->ecc.calc_buf = kmalloc(mtd->oobsize, GFP_KERNEL);
> + chip->ecc.code_buf = kmalloc(mtd->oobsize, GFP_KERNEL);
Those bufs are allocated but never freed (memleak). Also, are you sure
you really need them.
next prev parent reply other threads:[~2018-11-20 16:25 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-09 5:00 [LINUX PATCH v12 0/3] Add support for Arasan NAND Flash controller Naga Sureshkumar Relli
2018-11-09 5:00 ` [LINUX PATCH v12 1/3] dt-bindings: mtd: arasan: Add device tree binding documentation Naga Sureshkumar Relli
2018-11-09 6:28 ` Boris Brezillon
2018-11-09 12:33 ` Naga Sureshkumar Relli
2018-11-09 12:54 ` Miquel Raynal
2018-11-09 13:19 ` Naga Sureshkumar Relli
2018-11-16 11:50 ` Martin Lund
2018-11-16 12:10 ` Martin Lund
2018-11-16 12:33 ` Michal Simek
2018-11-16 13:50 ` Naga Sureshkumar Relli
2018-11-16 14:22 ` Martin Lund
2018-11-09 5:00 ` [LINUX PATCH v12 2/3] mtd: rawnand: Add an option to get sdr timing mode number Naga Sureshkumar Relli
2018-11-09 5:00 ` [LINUX PATCH v12 3/3] mtd: rawnand: arasan: Add support for Arasan NAND Flash Controller Naga Sureshkumar Relli
2018-11-09 8:07 ` Boris Brezillon
2018-11-09 13:18 ` Naga Sureshkumar Relli
2018-11-09 23:03 ` kbuild test robot
2018-11-12 10:55 ` Martin Lund
2018-11-12 10:58 ` Boris Brezillon
2018-11-12 12:43 ` Naga Sureshkumar Relli
2018-11-15 9:34 ` Naga Sureshkumar Relli
2018-11-18 18:52 ` Miquel Raynal
2018-11-18 19:43 ` Boris Brezillon
2018-11-19 6:20 ` Naga Sureshkumar Relli
2018-11-19 8:02 ` Boris Brezillon
2018-11-20 7:02 ` Naga Sureshkumar Relli
2018-11-20 11:02 ` Boris Brezillon
2018-11-20 12:36 ` Miquel Raynal
2018-11-23 13:53 ` Naga Sureshkumar Relli
2018-12-12 5:27 ` Naga Sureshkumar Relli
2018-12-12 8:11 ` Miquel Raynal
2018-12-12 9:04 ` Naga Sureshkumar Relli
2018-12-12 9:09 ` Miquel Raynal
2018-12-12 13:07 ` Naga Sureshkumar Relli
2018-12-12 13:18 ` Miquel Raynal
2018-12-17 13:21 ` Naga Sureshkumar Relli
2018-12-17 16:41 ` Miquel Raynal
2018-12-18 5:33 ` Naga Sureshkumar Relli
2018-12-19 14:26 ` Miquel Raynal
2018-12-21 7:36 ` Naga Sureshkumar Relli
2019-01-28 6:04 ` Naga Sureshkumar Relli
2019-01-28 9:27 ` Miquel Raynal
2019-01-28 9:35 ` Naga Sureshkumar Relli
2019-06-19 4:44 ` Naga Sureshkumar Relli
2019-06-27 16:27 ` Miquel Raynal
2019-06-28 4:20 ` Naga Sureshkumar Relli
2018-11-15 16:45 ` Dan Carpenter
2018-11-20 16:24 ` Boris Brezillon [this message]
2018-12-04 9:18 ` Naga Sureshkumar Relli
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