From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Ulf Hansson" <ulf.hansson@linaro.org>,
"Viresh Kumar" <vireshk@kernel.org>,
"Stephen Boyd" <sboyd@kernel.org>,
"Peter De Schrijver" <pdeschrijver@nvidia.com>,
"Mikko Perttunen" <mperttunen@nvidia.com>,
"Peter Chen" <peter.chen@kernel.org>,
"Lee Jones" <lee.jones@linaro.org>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Nishanth Menon" <nm@ti.com>,
"Adrian Hunter" <adrian.hunter@intel.com>,
"Michael Turquette" <mturquette@baylibre.com>
Cc: linux-kernel@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-pm@vger.kernel.org, linux-usb@vger.kernel.org,
linux-staging@lists.linux.dev, linux-pwm@vger.kernel.org,
linux-mmc@vger.kernel.org, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
Mark Brown <broonie@kernel.org>,
Vignesh Raghavendra <vigneshr@ti.com>,
Richard Weinberger <richard@nod.at>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Lucas Stach <dev@lynxeye.de>, Stefan Agner <stefan@agner.ch>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
David Heidelberg <david@ixit.cz>
Subject: [PATCH v13 13/35] drm/tegra: gr2d: Support generic power domain and runtime PM
Date: Mon, 27 Sep 2021 01:40:36 +0300 [thread overview]
Message-ID: <20210926224058.1252-14-digetx@gmail.com> (raw)
In-Reply-To: <20210926224058.1252-1-digetx@gmail.com>
Add runtime power management and support generic power domains.
Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
drivers/gpu/drm/tegra/gr2d.c | 155 +++++++++++++++++++++++++++++++++--
1 file changed, 147 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/tegra/gr2d.c b/drivers/gpu/drm/tegra/gr2d.c
index de288cba3905..13df8f118f75 100644
--- a/drivers/gpu/drm/tegra/gr2d.c
+++ b/drivers/gpu/drm/tegra/gr2d.c
@@ -7,11 +7,21 @@
#include <linux/iommu.h>
#include <linux/module.h>
#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/reset.h>
+
+#include <soc/tegra/common.h>
#include "drm.h"
#include "gem.h"
#include "gr2d.h"
+enum {
+ RST_MC,
+ RST_GR2D,
+ RST_GR2D_MAX,
+};
+
struct gr2d_soc {
unsigned int version;
};
@@ -21,6 +31,9 @@ struct gr2d {
struct host1x_channel *channel;
struct clk *clk;
+ struct reset_control_bulk_data resets[RST_GR2D_MAX];
+ unsigned int nresets;
+
const struct gr2d_soc *soc;
DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS);
@@ -101,16 +114,24 @@ static int gr2d_open_channel(struct tegra_drm_client *client,
struct tegra_drm_context *context)
{
struct gr2d *gr2d = to_gr2d(client);
+ int err;
context->channel = host1x_channel_get(gr2d->channel);
if (!context->channel)
return -ENOMEM;
+ err = pm_runtime_resume_and_get(client->base.dev);
+ if (err) {
+ host1x_channel_put(context->channel);
+ return err;
+ }
+
return 0;
}
static void gr2d_close_channel(struct tegra_drm_context *context)
{
+ pm_runtime_put_sync(context->client->base.dev);
host1x_channel_put(context->channel);
}
@@ -190,6 +211,27 @@ static const u32 gr2d_addr_regs[] = {
GR2D_VA_BASE_ADDR_SB,
};
+static int gr2d_get_resets(struct device *dev, struct gr2d *gr2d)
+{
+ int err;
+
+ gr2d->resets[RST_MC].id = "mc";
+ gr2d->resets[RST_GR2D].id = "2d";
+ gr2d->nresets = RST_GR2D_MAX;
+
+ err = devm_reset_control_bulk_get_optional_exclusive_released(
+ dev, gr2d->nresets, gr2d->resets);
+ if (err) {
+ dev_err(dev, "failed to get reset: %d\n", err);
+ return err;
+ }
+
+ if (WARN_ON(!gr2d->resets[RST_GR2D].rstc))
+ return -ENOENT;
+
+ return 0;
+}
+
static int gr2d_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -202,6 +244,8 @@ static int gr2d_probe(struct platform_device *pdev)
if (!gr2d)
return -ENOMEM;
+ platform_set_drvdata(pdev, gr2d);
+
gr2d->soc = of_device_get_match_data(dev);
syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
@@ -214,11 +258,9 @@ static int gr2d_probe(struct platform_device *pdev)
return PTR_ERR(gr2d->clk);
}
- err = clk_prepare_enable(gr2d->clk);
- if (err) {
- dev_err(dev, "cannot turn on clock\n");
+ err = gr2d_get_resets(dev, gr2d);
+ if (err)
return err;
- }
INIT_LIST_HEAD(&gr2d->client.base.list);
gr2d->client.base.ops = &gr2d_client_ops;
@@ -231,20 +273,31 @@ static int gr2d_probe(struct platform_device *pdev)
gr2d->client.version = gr2d->soc->version;
gr2d->client.ops = &gr2d_ops;
+ pm_runtime_enable(dev);
+ pm_runtime_use_autosuspend(dev);
+ pm_runtime_set_autosuspend_delay(dev, 200);
+
+ err = devm_tegra_core_dev_init_opp_table_common(dev);
+ if (err)
+ goto disable_rpm;
+
err = host1x_client_register(&gr2d->client.base);
if (err < 0) {
dev_err(dev, "failed to register host1x client: %d\n", err);
- clk_disable_unprepare(gr2d->clk);
- return err;
+ goto disable_rpm;
}
/* initialize address register map */
for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++)
set_bit(gr2d_addr_regs[i], gr2d->addr_regs);
- platform_set_drvdata(pdev, gr2d);
-
return 0;
+
+disable_rpm:
+ pm_runtime_dont_use_autosuspend(dev);
+ pm_runtime_disable(dev);
+
+ return err;
}
static int gr2d_remove(struct platform_device *pdev)
@@ -259,15 +312,101 @@ static int gr2d_remove(struct platform_device *pdev)
return err;
}
+ pm_runtime_dont_use_autosuspend(&pdev->dev);
+ pm_runtime_disable(&pdev->dev);
+
+ return 0;
+}
+
+static int __maybe_unused gr2d_runtime_suspend(struct device *dev)
+{
+ struct gr2d *gr2d = dev_get_drvdata(dev);
+ int err;
+
+ host1x_channel_stop(gr2d->channel);
+ reset_control_bulk_release(gr2d->nresets, gr2d->resets);
+
+ /*
+ * GR2D module shouldn't be reset while hardware is idling, otherwise
+ * host1x's cmdproc will stuck on trying to access any G2 register
+ * after reset. GR2D module could be either hot-reset or reset after
+ * power-gating of the HEG partition. Hence we will put in reset only
+ * the memory client part of the module, the HEG GENPD will take care
+ * of resetting GR2D module across power-gating.
+ *
+ * On Tegra20 there is no HEG partition, but it's okay to have
+ * undetermined h/w state since userspace is expected to reprogram
+ * the state on each job submission anyways.
+ */
+ err = reset_control_acquire(gr2d->resets[RST_MC].rstc);
+ if (err) {
+ dev_err(dev, "failed to acquire MC reset: %d\n", err);
+ goto acquire_reset;
+ }
+
+ err = reset_control_assert(gr2d->resets[RST_MC].rstc);
+ reset_control_release(gr2d->resets[RST_MC].rstc);
+ if (err) {
+ dev_err(dev, "failed to assert MC reset: %d\n", err);
+ goto acquire_reset;
+ }
+
clk_disable_unprepare(gr2d->clk);
return 0;
+
+acquire_reset:
+ reset_control_bulk_acquire(gr2d->nresets, gr2d->resets);
+ reset_control_bulk_deassert(gr2d->nresets, gr2d->resets);
+
+ return err;
}
+static int __maybe_unused gr2d_runtime_resume(struct device *dev)
+{
+ struct gr2d *gr2d = dev_get_drvdata(dev);
+ int err;
+
+ err = reset_control_bulk_acquire(gr2d->nresets, gr2d->resets);
+ if (err) {
+ dev_err(dev, "failed to acquire reset: %d\n", err);
+ return err;
+ }
+
+ err = clk_prepare_enable(gr2d->clk);
+ if (err) {
+ dev_err(dev, "failed to enable clock: %d\n", err);
+ goto release_reset;
+ }
+
+ /* this is a reset array which deasserts both 2D MC and 2D itself */
+ err = reset_control_bulk_deassert(gr2d->nresets, gr2d->resets);
+ if (err) {
+ dev_err(dev, "failed to deassert reset: %d\n", err);
+ goto disable_clk;
+ }
+
+ return 0;
+
+disable_clk:
+ clk_disable_unprepare(gr2d->clk);
+release_reset:
+ reset_control_bulk_release(gr2d->nresets, gr2d->resets);
+
+ return err;
+}
+
+static const struct dev_pm_ops tegra_gr2d_pm = {
+ SET_RUNTIME_PM_OPS(gr2d_runtime_suspend, gr2d_runtime_resume, NULL)
+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+ pm_runtime_force_resume)
+};
+
struct platform_driver tegra_gr2d_driver = {
.driver = {
.name = "tegra-gr2d",
.of_match_table = gr2d_match,
+ .pm = &tegra_gr2d_pm,
},
.probe = gr2d_probe,
.remove = gr2d_remove,
--
2.32.0
next prev parent reply other threads:[~2021-09-26 22:43 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-26 22:40 [PATCH v13 00/35] NVIDIA Tegra power management patches for 5.16 Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 01/35] opp: Change type of dev_pm_opp_attach_genpd(names) argument Dmitry Osipenko
2021-10-04 9:11 ` Viresh Kumar
2021-09-26 22:40 ` [PATCH v13 02/35] soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() Dmitry Osipenko
2021-10-01 12:50 ` Ulf Hansson
2021-10-01 19:15 ` Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 03/35] soc/tegra: pmc: Disable PMC state syncing Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 04/35] soc/tegra: Don't print error message when OPPs not available Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 05/35] dt-bindings: clock: tegra-car: Document new clock sub-nodes Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 06/35] clk: tegra: Support runtime PM and power domain Dmitry Osipenko
2021-10-01 12:32 ` Ulf Hansson
2021-10-01 19:50 ` Dmitry Osipenko
2021-10-02 20:44 ` Dmitry Osipenko
2021-10-05 13:10 ` Ulf Hansson
2021-10-05 22:19 ` Dmitry Osipenko
2021-10-05 22:43 ` Dmitry Osipenko
2021-10-06 2:40 ` Dmitry Osipenko
2021-10-06 12:43 ` Ulf Hansson
2021-10-06 21:14 ` Dmitry Osipenko
2021-10-06 22:01 ` Dmitry Osipenko
2021-10-06 23:21 ` Dmitry Osipenko
2021-10-07 9:18 ` Ulf Hansson
2021-10-07 10:36 ` Dmitry Osipenko
2021-10-06 12:38 ` Ulf Hansson
2021-10-06 21:20 ` Dmitry Osipenko
2021-10-06 21:25 ` Dmitry Osipenko
2021-10-06 22:03 ` Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 07/35] dt-bindings: host1x: Document OPP and power domain properties Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 08/35] dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 09/35] gpu: host1x: Add runtime PM and OPP support Dmitry Osipenko
2021-10-01 13:24 ` Ulf Hansson
2021-09-26 22:40 ` [PATCH v13 10/35] gpu: host1x: Add host1x_channel_stop() Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 11/35] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2021-10-01 13:27 ` Ulf Hansson
2021-10-16 15:36 ` Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 12/35] drm/tegra: hdmi: Add OPP support Dmitry Osipenko
2021-09-26 22:40 ` Dmitry Osipenko [this message]
2021-10-01 13:39 ` [PATCH v13 13/35] drm/tegra: gr2d: Support generic power domain and runtime PM Ulf Hansson
2021-10-01 14:29 ` Dmitry Osipenko
2021-10-01 14:55 ` Ulf Hansson
2021-10-01 19:00 ` Dmitry Osipenko
2021-10-04 11:01 ` Ulf Hansson
2021-10-04 15:57 ` Dmitry Osipenko
2021-10-05 8:45 ` Ulf Hansson
2021-10-05 17:16 ` Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 14/35] drm/tegra: gr3d: " Dmitry Osipenko
2021-10-01 14:06 ` Ulf Hansson
2021-10-01 21:25 ` Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 15/35] drm/tegra: vic: Support system suspend Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 16/35] usb: chipidea: tegra: Add runtime PM and OPP support Dmitry Osipenko
2021-09-30 0:40 ` Dmitry Osipenko
2021-09-30 14:06 ` Peter Chen
2021-09-30 14:08 ` Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 17/35] bus: tegra-gmi: " Dmitry Osipenko
2021-10-01 14:18 ` Ulf Hansson
2021-09-26 22:40 ` [PATCH v13 18/35] pwm: tegra: " Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 19/35] mmc: sdhci-tegra: " Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 20/35] mtd: rawnand: tegra: " Dmitry Osipenko
2021-10-01 14:24 ` Ulf Hansson
2021-10-01 14:35 ` Dmitry Osipenko
2021-10-01 15:01 ` Ulf Hansson
2021-10-17 8:38 ` Dmitry Osipenko
2021-10-19 11:40 ` Ulf Hansson
2021-09-26 22:40 ` [PATCH v13 21/35] spi: tegra20-slink: Add " Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 22/35] media: dt: bindings: tegra-vde: Convert to schema Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 23/35] media: dt: bindings: tegra-vde: Document OPP and power domain Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 24/35] media: staging: tegra-vde: Support generic " Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 25/35] soc/tegra: fuse: Reset hardware Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 26/35] soc/tegra: fuse: Use resource-managed helpers Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 27/35] soc/tegra: regulators: Prepare for suspend Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 28/35] soc/tegra: pmc: Rename 3d power domains Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 29/35] soc/tegra: pmc: Rename core power domain Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 30/35] soc/tegra: pmc: Enable core domain support for Tegra20 and Tegra30 Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 31/35] ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 32/35] ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 33/35] ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 34/35] ARM: tegra: Add Memory Client resets to Tegra30 " Dmitry Osipenko
2021-09-26 22:40 ` [PATCH v13 35/35] ARM: tegra20/30: Disable unused host1x hardware Dmitry Osipenko
2021-10-01 14:36 ` [PATCH v13 00/35] NVIDIA Tegra power management patches for 5.16 Ulf Hansson
2021-10-01 14:40 ` Dmitry Osipenko
2021-10-01 15:02 ` Ulf Hansson
2021-10-04 9:11 ` Viresh Kumar
2021-10-04 14:52 ` Dmitry Osipenko
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