From: Yu Tu <yu.tu@amlogic.com>
To: <linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Neil Armstrong <narmstrong@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Yu Tu <yu.tu@amlogic.com>
Subject: [PATCH V3 0/6] Add S4 SoC PLL and Peripheral clock controller
Date: Fri, 5 Aug 2022 16:57:10 +0800 [thread overview]
Message-ID: <20220805085716.5635-1-yu.tu@amlogic.com> (raw)
1. Add PLL and Peripheral clock controller driver for S4 SOC.
Yu Tu (6):
dt-bindings: clock: meson: add S4 SoC PLL clock controller bindings
arm64: dts: meson: add S4 Soc PLL clock controller in DT
clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver
dt-bindings: clk: meson: add S4 SoC peripheral clock controller
bindings
arm64: dts: meson: add S4 Soc Peripheral clock controller in DT
clk: meson: s4: add s4 SoC peripheral clock controller driver
V2 -> V3: Use two clock controller.
V1 -> V2: Change format as discussed in the email.
Link:https://lore.kernel.org/all/20220728054202.6981-1-yu.tu@amlogic.com/
.../bindings/clock/amlogic,s4-clkc.yaml | 92 +
.../bindings/clock/amlogic,s4-pll-clkc.yaml | 51 +
MAINTAINERS | 1 +
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 34 +
drivers/clk/meson/Kconfig | 25 +
drivers/clk/meson/Makefile | 2 +
drivers/clk/meson/s4-pll.c | 891 ++++
drivers/clk/meson/s4-pll.h | 88 +
drivers/clk/meson/s4.c | 3878 +++++++++++++++++
drivers/clk/meson/s4.h | 232 +
include/dt-bindings/clock/amlogic,s4-clkc.h | 131 +
.../dt-bindings/clock/amlogic,s4-pll-clkc.h | 30 +
12 files changed, 5455 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/amlogic,s4-clkc.yaml
create mode 100644 Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml
create mode 100644 drivers/clk/meson/s4-pll.c
create mode 100644 drivers/clk/meson/s4-pll.h
create mode 100644 drivers/clk/meson/s4.c
create mode 100644 drivers/clk/meson/s4.h
create mode 100644 include/dt-bindings/clock/amlogic,s4-clkc.h
create mode 100644 include/dt-bindings/clock/amlogic,s4-pll-clkc.h
base-commit: 08fc500fe3d4b1f0603fb97ad353f246a3d52d2d
--
2.33.1
next reply other threads:[~2022-08-05 8:58 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 8:57 Yu Tu [this message]
2022-08-05 8:57 ` [PATCH V3 1/6] dt-bindings: clock: meson: add S4 SoC PLL clock controller bindings Yu Tu
2022-08-05 9:13 ` Krzysztof Kozlowski
2022-08-05 8:57 ` [PATCH V3 2/6] arm64: dts: meson: add S4 Soc PLL clock controller in DT Yu Tu
2022-08-05 9:16 ` Krzysztof Kozlowski
2022-08-05 9:39 ` Yu Tu
2022-08-10 13:32 ` Jerome Brunet
2022-08-15 6:17 ` Yu Tu
2022-08-29 9:43 ` Jerome Brunet
2022-08-30 6:05 ` Yu Tu
2022-08-30 6:36 ` Jerome Brunet
2022-08-30 7:06 ` Yu Tu
2022-08-05 8:57 ` [PATCH V3 3/6] clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver Yu Tu
2022-08-10 13:47 ` Jerome Brunet
2022-08-15 6:34 ` Yu Tu
2022-08-15 13:20 ` Yu Tu
2022-08-29 9:48 ` Jerome Brunet
2022-08-30 6:13 ` Yu Tu
2022-08-30 6:44 ` Jerome Brunet
2022-08-30 7:37 ` Yu Tu
2022-09-21 8:40 ` Yu Tu
2022-09-28 15:27 ` Jerome Brunet
2022-09-29 7:07 ` Yu Tu
2022-10-22 12:22 ` Jerome Brunet
2022-10-24 11:33 ` Yu Tu
2022-08-29 9:46 ` Jerome Brunet
2022-08-30 6:08 ` Yu Tu
2022-08-05 8:57 ` [PATCH V3 4/6] dt-bindings: clk: meson: add S4 SoC peripheral clock controller bindings Yu Tu
2022-08-05 9:15 ` Krzysztof Kozlowski
2022-08-05 9:33 ` Yu Tu
2022-08-08 6:16 ` Krzysztof Kozlowski
2022-08-08 10:00 ` Yu Tu
2022-08-05 8:57 ` [PATCH V3 5/6] arm64: dts: meson: add S4 Soc Peripheral clock controller in DT Yu Tu
2022-08-05 9:16 ` Krzysztof Kozlowski
2022-08-05 9:36 ` Yu Tu
2022-08-08 6:17 ` Krzysztof Kozlowski
2022-08-08 10:02 ` Yu Tu
2022-08-05 8:57 ` [PATCH V3 6/6] clk: meson: s4: add s4 SoC peripheral clock controller driver Yu Tu
2022-08-10 13:57 ` Jerome Brunet
2022-08-16 12:00 ` Yu Tu
2022-08-29 12:19 ` Jerome Brunet
2022-08-30 8:20 ` Yu Tu
2022-09-21 9:01 ` Yu Tu
2022-09-28 15:35 ` Jerome Brunet
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220805085716.5635-1-yu.tu@amlogic.com \
--to=yu.tu@amlogic.com \
--cc=devicetree@vger.kernel.org \
--cc=jbrunet@baylibre.com \
--cc=khilman@baylibre.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=martin.blumenstingl@googlemail.com \
--cc=mturquette@baylibre.com \
--cc=narmstrong@baylibre.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).