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From: Prabhakar <prabhakar.csengg@gmail.com>
To: Arnd Bergmann <arnd@arndb.de>,
	Conor Dooley <conor.dooley@microchip.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Heiko Stuebner <heiko@sntech.de>, Guo Ren <guoren@kernel.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Magnus Damm <magnus.damm@gmail.com>,
	linux-renesas-soc@vger.kernel.org (open list:ARM/RISC-V/RENESAS
	ARCHITECTURE), linux-kernel@vger.kernel.org (open list)
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v6 6/6] soc: renesas: Kconfig: Select the required configs for RZ/Five SoC
Date: Fri,  6 Jan 2023 18:55:26 +0000	[thread overview]
Message-ID: <20230106185526.260163-7-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <20230106185526.260163-1-prabhakar.mahadev-lad.rj@bp.renesas.com>

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Explicitly select the required Cache management and Errata configs
required for the RZ/Five SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v5->v6
* New patch
---
 drivers/soc/renesas/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig
index 660498252ec5..c3475c084685 100644
--- a/drivers/soc/renesas/Kconfig
+++ b/drivers/soc/renesas/Kconfig
@@ -340,6 +340,10 @@ if RISCV
 config ARCH_R9A07G043
 	bool "RISC-V Platform support for RZ/Five"
 	select ARCH_RZG2L
+	select AX45MP_L2_CACHE
+	select DMA_GLOBAL_POOL
+	select ERRATA_ANDES
+	select ERRATA_ANDES_CMO
 	help
 	  This enables support for the Renesas RZ/Five SoC.
 
-- 
2.25.1


  parent reply	other threads:[~2023-01-06 18:58 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-06 18:55 [PATCH v6 0/6] RISC-V non-coherent function pointer based cache management operations + non-coherent DMA support for AX45MP Prabhakar
2023-01-06 18:55 ` [RFC PATCH v6 1/6] riscv: mm: dma-noncoherent: Switch using function pointers for cache management Prabhakar
2023-01-06 22:31   ` Arnd Bergmann
2023-01-06 23:29     ` Conor Dooley
2023-01-07 21:52       ` Arnd Bergmann
2023-01-07 22:21         ` Conor Dooley
2023-01-08 16:37           ` Conor Dooley
2023-01-07 22:10     ` Lad, Prabhakar
2023-01-08  0:07       ` Arnd Bergmann
2023-01-09 12:03         ` Lad, Prabhakar
2023-01-09 12:59           ` Arnd Bergmann
2023-01-09 13:27             ` Conor Dooley
2023-01-10  7:01             ` Christoph Hellwig
2023-01-10 15:03               ` Arnd Bergmann
2023-01-10 15:11                 ` Will Deacon
2023-01-13  5:48                 ` Christoph Hellwig
2023-01-20 17:04                   ` Arnd Bergmann
2023-01-21 14:37                     ` Christoph Hellwig
2023-01-21 19:30                       ` Arnd Bergmann
2023-01-22  7:27                         ` Christoph Hellwig
2023-01-22 11:04                           ` Arnd Bergmann
2023-01-23 14:46                             ` Christoph Hellwig
2023-01-06 23:47   ` Conor Dooley
2023-01-07 22:36     ` Lad, Prabhakar
2023-01-06 18:55 ` [PATCH v6 2/6] riscv: asm: vendorid_list: Add Andes Technology to the vendors list Prabhakar
2023-01-06 18:55 ` [PATCH v6 3/6] riscv: errata: Add Andes alternative ports Prabhakar
2023-01-06 21:44   ` Conor Dooley
2023-01-06 18:55 ` [PATCH v6 4/6] dt-bindings: cache: r9a07g043f-l2-cache: Add DT binding documentation for L2 cache controller Prabhakar
2023-01-06 21:53   ` Conor Dooley
2023-01-07 20:43     ` Lad, Prabhakar
2023-01-09 12:15       ` Geert Uytterhoeven
2023-01-09 13:14         ` Lad, Prabhakar
2023-01-06 18:55 ` [PATCH v6 5/6] cache: Add L2 cache management for Andes AX45MP RISC-V core Prabhakar
2023-01-07  0:09   ` Conor Dooley
2023-01-07 20:49     ` Lad, Prabhakar
2023-01-06 18:55 ` Prabhakar [this message]
2023-01-06 23:49   ` [PATCH v6 6/6] soc: renesas: Kconfig: Select the required configs for RZ/Five SoC Conor Dooley

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