Re: [PATCH 09/17] drm/radeon: use common fence implementation for fences

From: "Christian König" <deathsimple@vodafone.de>
To: "Maarten Lankhorst" <maarten.lankhorst@canonical.com>,
	"Christian König" <christian.koenig@amd.com>,
	"Dave Airlie" <airlied@gmail.com>,
	"Thomas Hellstrom" <thellstrom@vmware.com>,
	nouveau <nouveau@lists.freedesktop.org>,
	LKML <linux-kernel@vger.kernel.org>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	"Ben Skeggs" <bskeggs@redhat.com>,
	"Deucher, Alexander" <alexander.deucher@amd.com>
Subject: Re: [PATCH 09/17] drm/radeon: use common fence implementation for fences
Date: Tue, 22 Jul 2014 17:16:48 +0200	[thread overview]
Message-ID: <53CE8060.8030500@vodafone.de> (raw)
In-Reply-To: <53CE7974.2010209@canonical.com>

Am 22.07.2014 16:47, schrieb Maarten Lankhorst:
> op 22-07-14 16:39, Christian König schreef:
>> Am 22.07.2014 16:27, schrieb Maarten Lankhorst:
>>> op 22-07-14 16:24, Christian König schreef:
>>>>> No, you really shouldn't be doing much in the check anyway, it's meant to be a lightweight check. If you're not ready yet because of a lockup simply return not signaled yet.
>>>> It's not only the lockup case from radeon I have in mind here. For userspace queues it might be necessary to call copy_from_user to figure out if a fence is signaled or not.
>>>>
>>>> Returning false all the time is probably not a good idea either.
>>> Having userspace implement a fence sounds like an awful idea, why would you want to do that?
>> Marketing moves in mysterious ways. Don't ask me, but that the direction it currently moves with userspace queues and IOMMU etc...
>>
>>> A fence could be exported to userspace, but that would only mean it can wait for it to be signaled with an interface like poll..
>> Yeah agree totally, but the point for the fence interface is that I can't predict what's necessary to check if a fence is signaled or not on future hardware.
>>
>> For the currently available radeon hardware I can say that reading a value from a kernel page is pretty much all you need. But for older hardware that was reading from a register which might become very tricky if the hardware is power off or currently inside a reset cycle.
>>
>> Because off this I would avoid any such interface if it's not absolutely required by some use case, and currently I don't see this requirement because the functionality you want to archive could be implemented without this.
> Oh? I've already done that in radeon_fence, there is no way enable_signaling will fiddle with hardware registers during a reset cycle.
> I've also made sure that __radeon_fence_is_signaled grabs exclusive_lock in read mode before touching any hw state.
>
> Older hardware also doesn't implement optimus, so I think power off is not much of a worry for them, if you could point me at the checking done for that I could make sure that this is the case.

I'm not talking about any specific radeon hardware or use case here. As 
far as I can see you indeed solved all driver problems with the current 
interface design.

The question I'm raising is if the current interface design needs as 
complex as it is. And my answer to this is a clear *no*, so why do you 
want to stick with this design? I still haven't understood that.

If it's just to support a further feature of direct synchronization in 
interrupt context between different drivers then I must clearly say that 
this is a NAK, cause you add complexity to the kernel that isn't necessary.

Christian.

>
> ~Maarten
>