* [PATCH v6 0/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support @ 2022-04-27 6:46 Keerthy 2022-04-27 6:46 ` [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation Keerthy ` (3 more replies) 0 siblings, 4 replies; 18+ messages in thread From: Keerthy @ 2022-04-27 6:46 UTC (permalink / raw) To: robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: j-keerthy, linux-pm, devicetree, linux-kernel Add VTM thermal support. In the Voltage Thermal Management Module(VTM), K3 J72XX supplies a voltage reference and a temperature sensor feature that are gathered in the band gap voltage and temperature sensor (VBGAPTS) module. The band gap provides current and voltage reference for its internal circuits and other analog IP blocks. The analog-to-digital converter (ADC) produces an output value that is proportional to the silicon temperature. Currently reading temperatures only is supported. There are no active/passive cooling agent supported. J721e SoCs have errata i2128: https://www.ti.com/lit/pdf/sprz455 The series also incorporates workaround for Errata i2128. Changes in v6: * Fixed the DT comments that were missed in v5. * Changed the offsets, bit masks to 2-D array. * Clean up Changes in v5: * Simplified the computation of the table. * Removed unnecessary members in the structures. Changes in v4: * Fixed compilation warning with W=1. Changes in v3: * Removed static look up tables & added functions to dynamically generate them. Changes in v2: * Fixed DT binding errors. Keerthy (4): dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation arm64: dts: ti: j721e: Add VTM node arm64: dts: ti: j7200: Add VTM node thermal: k3_j72xx_bandgap: Add the bandgap driver support .../bindings/thermal/ti,j72xx-thermal.yaml | 64 ++ .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 + arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi | 47 ++ arch/arm64/boot/dts/ti/k3-j7200.dtsi | 2 + .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 9 + arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi | 75 +++ arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 + drivers/thermal/Makefile | 2 +- drivers/thermal/k3_j72xx_bandgap.c | 566 ++++++++++++++++++ 9 files changed, 775 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi create mode 100644 drivers/thermal/k3_j72xx_bandgap.c -- 2.17.1 ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation 2022-04-27 6:46 [PATCH v6 0/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy @ 2022-04-27 6:46 ` Keerthy 2022-05-03 0:34 ` Rob Herring 2022-05-09 3:18 ` J, KEERTHY 2022-04-27 6:46 ` [PATCH v6 2/4] arm64: dts: ti: j721e: Add VTM node Keerthy ` (2 subsequent siblings) 3 siblings, 2 replies; 18+ messages in thread From: Keerthy @ 2022-04-27 6:46 UTC (permalink / raw) To: robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: j-keerthy, linux-pm, devicetree, linux-kernel Add VTM bindings documentation. In the Voltage Thermal Management Module(VTM), K3 J72XX supplies a voltage reference and a temperature sensor feature that are gathered in the band gap voltage and temperature sensor (VBGAPTS) module. The band gap provides current and voltage reference for its internal circuits and other analog IP blocks. The analog-to-digital converter (ADC) produces an output value that is proportional to the silicon temperature. Signed-off-by: Keerthy <j-keerthy@ti.com> --- .../bindings/thermal/ti,j72xx-thermal.yaml | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml new file mode 100644 index 000000000000..84b70fb108da --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/ti,j72xx-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments J72XX VTM (DTS) binding + +maintainers: + - Keerthy <j-keerthy@ti.com> + +properties: + compatible: + items: + - enum: + - ti,j721e-vtm + - ti,j7200-vtm + + reg: + maxItems: 3 + description: + Must be 3, in order to specify three register spaces for VTM cfg1, cfg2 + and efuse register space. + + power-domains: + maxItems: 1 + + "#thermal-sensor-cells": + const: 1 + +required: + - compatible + - reg + - power-domains + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/soc/ti,sci_pm_domain.h> + wkup_vtm0: thermal-sensor@42040000 { + compatible = "ti,j721e-vtm"; + reg = <0x42040000 0x350>, + <0x42050000 0x350>, + <0x43000300 0x10>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; + + mpu_thermal: mpu-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <500>; /* milliseconds */ + thermal-sensors = <&wkup_vtm0 0>; + + trips { + mpu_crit: mpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +... -- 2.17.1 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation 2022-04-27 6:46 ` [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation Keerthy @ 2022-05-03 0:34 ` Rob Herring 2022-05-09 3:18 ` J, KEERTHY 1 sibling, 0 replies; 18+ messages in thread From: Rob Herring @ 2022-05-03 0:34 UTC (permalink / raw) To: Keerthy Cc: kristo, amitk, devicetree, robh+dt, krzysztof.kozlowski, linux-kernel, rui.zhang, daniel.lezcano, vigneshr, linux-pm On Wed, 27 Apr 2022 12:16:32 +0530, Keerthy wrote: > Add VTM bindings documentation. In the Voltage Thermal > Management Module(VTM), K3 J72XX supplies a voltage > reference and a temperature sensor feature that are gathered in the band > gap voltage and temperature sensor (VBGAPTS) module. The band > gap provides current and voltage reference for its internal > circuits and other analog IP blocks. The analog-to-digital > converter (ADC) produces an output value that is proportional > to the silicon temperature. > > Signed-off-by: Keerthy <j-keerthy@ti.com> > --- > .../bindings/thermal/ti,j72xx-thermal.yaml | 64 +++++++++++++++++++ > 1 file changed, 64 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation 2022-04-27 6:46 ` [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation Keerthy 2022-05-03 0:34 ` Rob Herring @ 2022-05-09 3:18 ` J, KEERTHY 2022-05-09 6:42 ` Krzysztof Kozlowski 1 sibling, 1 reply; 18+ messages in thread From: J, KEERTHY @ 2022-05-09 3:18 UTC (permalink / raw) To: robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: linux-pm, devicetree, linux-kernel On 4/27/2022 12:16 PM, Keerthy wrote: > Add VTM bindings documentation. In the Voltage Thermal > Management Module(VTM), K3 J72XX supplies a voltage > reference and a temperature sensor feature that are gathered in the band > gap voltage and temperature sensor (VBGAPTS) module. The band > gap provides current and voltage reference for its internal > circuits and other analog IP blocks. The analog-to-digital > converter (ADC) produces an output value that is proportional > to the silicon temperature. Hi krzysztof, Any comments on this version? - Keerthy > > Signed-off-by: Keerthy <j-keerthy@ti.com> > --- > .../bindings/thermal/ti,j72xx-thermal.yaml | 64 +++++++++++++++++++ > 1 file changed, 64 insertions(+) > create mode 100644 Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > > diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > new file mode 100644 > index 000000000000..84b70fb108da > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml > @@ -0,0 +1,64 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/thermal/ti,j72xx-thermal.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Texas Instruments J72XX VTM (DTS) binding > + > +maintainers: > + - Keerthy <j-keerthy@ti.com> > + > +properties: > + compatible: > + items: > + - enum: > + - ti,j721e-vtm > + - ti,j7200-vtm > + > + reg: > + maxItems: 3 > + description: > + Must be 3, in order to specify three register spaces for VTM cfg1, cfg2 > + and efuse register space. > + > + power-domains: > + maxItems: 1 > + > + "#thermal-sensor-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - power-domains > + - "#thermal-sensor-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/soc/ti,sci_pm_domain.h> > + wkup_vtm0: thermal-sensor@42040000 { > + compatible = "ti,j721e-vtm"; > + reg = <0x42040000 0x350>, > + <0x42050000 0x350>, > + <0x43000300 0x10>; > + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; > + #thermal-sensor-cells = <1>; > + }; > + > + mpu_thermal: mpu-thermal { > + polling-delay-passive = <250>; /* milliseconds */ > + polling-delay = <500>; /* milliseconds */ > + thermal-sensors = <&wkup_vtm0 0>; > + > + trips { > + mpu_crit: mpu-crit { > + temperature = <125000>; /* milliCelsius */ > + hysteresis = <2000>; /* milliCelsius */ > + type = "critical"; > + }; > + }; > + }; > +... ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation 2022-05-09 3:18 ` J, KEERTHY @ 2022-05-09 6:42 ` Krzysztof Kozlowski 2022-05-11 7:53 ` J, KEERTHY 0 siblings, 1 reply; 18+ messages in thread From: Krzysztof Kozlowski @ 2022-05-09 6:42 UTC (permalink / raw) To: J, KEERTHY, robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr Cc: linux-pm, devicetree, linux-kernel On 09/05/2022 05:18, J, KEERTHY wrote: > > > On 4/27/2022 12:16 PM, Keerthy wrote: >> Add VTM bindings documentation. In the Voltage Thermal >> Management Module(VTM), K3 J72XX supplies a voltage >> reference and a temperature sensor feature that are gathered in the band >> gap voltage and temperature sensor (VBGAPTS) module. The band >> gap provides current and voltage reference for its internal >> circuits and other analog IP blocks. The analog-to-digital >> converter (ADC) produces an output value that is proportional >> to the silicon temperature. > > Hi krzysztof, > > Any comments on this version? You got Rob's review, so you don't need also mine. If you want, then in general look okay, except the description for "reg" you could split per items: reg: items: - description: VTM cfg1 register space - description: VTM cfg2 register space - description: efuse register space It's more obvious what items you expect. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation 2022-05-09 6:42 ` Krzysztof Kozlowski @ 2022-05-11 7:53 ` J, KEERTHY 2022-05-11 8:15 ` Krzysztof Kozlowski 0 siblings, 1 reply; 18+ messages in thread From: J, KEERTHY @ 2022-05-11 7:53 UTC (permalink / raw) To: Krzysztof Kozlowski, robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr Cc: linux-pm, devicetree, linux-kernel On 5/9/2022 12:12 PM, Krzysztof Kozlowski wrote: > On 09/05/2022 05:18, J, KEERTHY wrote: >> >> >> On 4/27/2022 12:16 PM, Keerthy wrote: >>> Add VTM bindings documentation. In the Voltage Thermal >>> Management Module(VTM), K3 J72XX supplies a voltage >>> reference and a temperature sensor feature that are gathered in the band >>> gap voltage and temperature sensor (VBGAPTS) module. The band >>> gap provides current and voltage reference for its internal >>> circuits and other analog IP blocks. The analog-to-digital >>> converter (ADC) produces an output value that is proportional >>> to the silicon temperature. >> >> Hi krzysztof, >> >> Any comments on this version? > > You got Rob's review, so you don't need also mine. > > If you want, then in general look okay, except the description for "reg" > you could split per items: > > reg: > items: > - description: VTM cfg1 register space > - description: VTM cfg2 register space > - description: efuse register space > > It's more obvious what items you expect. Hi Krzysztof, DTEX Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dts Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml: found duplicate key "description" with value "VTM cfg2 register space" (original value: "VTM cfg1 register space") Documentation/devicetree/bindings/Makefile:26: recipe for target 'Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dts' failed make[1]: *** [Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dts] Er I believe multiple instances of description is failing. So can i keep the description as is? - Keerthy > > Best regards, > Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation 2022-05-11 7:53 ` J, KEERTHY @ 2022-05-11 8:15 ` Krzysztof Kozlowski 2022-05-11 10:57 ` J, KEERTHY 0 siblings, 1 reply; 18+ messages in thread From: Krzysztof Kozlowski @ 2022-05-11 8:15 UTC (permalink / raw) To: J, KEERTHY, robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr Cc: linux-pm, devicetree, linux-kernel On 11/05/2022 09:53, J, KEERTHY wrote: >>> >>> Any comments on this version? >> >> You got Rob's review, so you don't need also mine. >> >> If you want, then in general look okay, except the description for "reg" >> you could split per items: >> >> reg: >> items: >> - description: VTM cfg1 register space >> - description: VTM cfg2 register space >> - description: efuse register space >> >> It's more obvious what items you expect. > > Hi Krzysztof, > > DTEX > Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dts > Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml: found > duplicate key "description" with value "VTM cfg2 register space" > (original value: "VTM cfg1 register space") > Documentation/devicetree/bindings/Makefile:26: recipe for target > 'Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dts' > failed > make[1]: *** > [Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dts] Er > > I believe multiple instances of description is failing. So can i keep > the description as is? It looks weird. Can you share your code (pastebin/github/paste here)? Best regards, Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation 2022-05-11 8:15 ` Krzysztof Kozlowski @ 2022-05-11 10:57 ` J, KEERTHY 0 siblings, 0 replies; 18+ messages in thread From: J, KEERTHY @ 2022-05-11 10:57 UTC (permalink / raw) To: Krzysztof Kozlowski, robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr Cc: linux-pm, devicetree, linux-kernel On 5/11/2022 1:45 PM, Krzysztof Kozlowski wrote: > On 11/05/2022 09:53, J, KEERTHY wrote: >>>> >>>> Any comments on this version? >>> >>> You got Rob's review, so you don't need also mine. >>> >>> If you want, then in general look okay, except the description for "reg" >>> you could split per items: >>> >>> reg: >>> items: >>> - description: VTM cfg1 register space >>> - description: VTM cfg2 register space >>> - description: efuse register space >>> >>> It's more obvious what items you expect. >> >> Hi Krzysztof, >> >> DTEX >> Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dts >> Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml: found >> duplicate key "description" with value "VTM cfg2 register space" >> (original value: "VTM cfg1 register space") >> Documentation/devicetree/bindings/Makefile:26: recipe for target >> 'Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dts' >> failed >> make[1]: *** >> [Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.example.dts] Er >> >> I believe multiple instances of description is failing. So can i keep >> the description as is? > > It looks weird. Can you share your code (pastebin/github/paste here)? My bad. I had missed the '-' before description & hence it was erring out. I fixed. I will post v7 of this patch alone. Thanks, Keerthy > > > Best regards, > Krzysztof ^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v6 2/4] arm64: dts: ti: j721e: Add VTM node 2022-04-27 6:46 [PATCH v6 0/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy 2022-04-27 6:46 ` [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation Keerthy @ 2022-04-27 6:46 ` Keerthy 2022-04-27 6:46 ` [PATCH v6 3/4] arm64: dts: ti: j7200: " Keerthy 2022-04-27 6:46 ` [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy 3 siblings, 0 replies; 18+ messages in thread From: Keerthy @ 2022-04-27 6:46 UTC (permalink / raw) To: robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: j-keerthy, linux-pm, devicetree, linux-kernel VTM stands for Voltage Thermal Management Signed-off-by: Keerthy <j-keerthy@ti.com> --- .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 9 +++ arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi | 75 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 + 3 files changed, 86 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index b4972dfb7da8..0dbf51986afa 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -418,4 +418,13 @@ interrupt-names = "int0", "int1"; bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; }; + + wkup_vtm0: temperature-sensor@42040000 { + compatible = "ti,j721e-vtm"; + reg = <0x00 0x42040000 0x00 0x350>, + <0x00 0x42050000 0x00 0x350>, + <0x00 0x43000300 0x00 0x10>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi new file mode 100644 index 000000000000..c2523279001b --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <dt-bindings/thermal/thermal.h> + +thermal_zones: thermal-zones { + wkup_thermal: wkup-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <500>; /* milliseconds */ + thermal-sensors = <&wkup_vtm0 0>; + + trips { + wkup_crit: wkup-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + mpu_thermal: mpu-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <500>; /* milliseconds */ + thermal-sensors = <&wkup_vtm0 1>; + + trips { + mpu_crit: mpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + c7x_thermal: c7x-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <500>; /* milliseconds */ + thermal-sensors = <&wkup_vtm0 2>; + + trips { + c7x_crit: c7x-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <500>; /* milliseconds */ + thermal-sensors = <&wkup_vtm0 3>; + + trips { + gpu_crit: gpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + r5f_thermal: r5f-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <500>; /* milliseconds */ + thermal-sensors = <&wkup_vtm0 4>; + + trips { + r5f_crit: r5f-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index 0e23886c9fd1..934dffbc136f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -181,6 +181,8 @@ <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3*/ }; }; + + #include "k3-j721e-thermal.dtsi" }; /* Now include the peripherals for each bus segments */ -- 2.17.1 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v6 3/4] arm64: dts: ti: j7200: Add VTM node 2022-04-27 6:46 [PATCH v6 0/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy 2022-04-27 6:46 ` [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation Keerthy 2022-04-27 6:46 ` [PATCH v6 2/4] arm64: dts: ti: j721e: Add VTM node Keerthy @ 2022-04-27 6:46 ` Keerthy 2022-04-27 6:46 ` [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy 3 siblings, 0 replies; 18+ messages in thread From: Keerthy @ 2022-04-27 6:46 UTC (permalink / raw) To: robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: j-keerthy, linux-pm, devicetree, linux-kernel VTM stands for Voltage Thermal Management Signed-off-by: Keerthy <j-keerthy@ti.com> --- .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 9 ++++ arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi | 47 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j7200.dtsi | 2 + 3 files changed, 58 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 1044ec6c4b0d..a53afc5c5dce 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -375,4 +375,13 @@ ti,loczrama = <1>; }; }; + + wkup_vtm0: temperature-sensor@42040000 { + compatible = "ti,j7200-vtm"; + reg = <0x00 0x42040000 0x00 0x350>, + <0x00 0x42050000 0x00 0x350>, + <0x00 0x43000300 0x00 0x10>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi new file mode 100644 index 000000000000..e7e3a643a6f0 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <dt-bindings/thermal/thermal.h> + +thermal_zones: thermal-zones { + mcu_thermal: mcu-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <500>; /* milliseconds */ + thermal-sensors = <&wkup_vtm0 0>; + + trips { + wkup_crit: wkup-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + mpu_thermal: mpu-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <500>; /* milliseconds */ + thermal-sensors = <&wkup_vtm0 1>; + + trips { + mpu_crit: mpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + main_thermal: main-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <500>; /* milliseconds */ + thermal-sensors = <&wkup_vtm0 2>; + + trips { + c7x_crit: c7x-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j7200.dtsi b/arch/arm64/boot/dts/ti/k3-j7200.dtsi index b6da0454cc5b..2abc872ecec0 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200.dtsi @@ -168,6 +168,8 @@ <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3 */ }; }; + + #include "k3-j7200-thermal.dtsi" }; /* Now include the peripherals for each bus segments */ -- 2.17.1 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support 2022-04-27 6:46 [PATCH v6 0/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy ` (2 preceding siblings ...) 2022-04-27 6:46 ` [PATCH v6 3/4] arm64: dts: ti: j7200: " Keerthy @ 2022-04-27 6:46 ` Keerthy 2022-05-04 8:00 ` Dan Carpenter 2022-05-09 3:10 ` J, KEERTHY 3 siblings, 2 replies; 18+ messages in thread From: Keerthy @ 2022-04-27 6:46 UTC (permalink / raw) To: robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: j-keerthy, linux-pm, devicetree, linux-kernel Add VTM thermal support. In the Voltage Thermal Management Module(VTM), K3 J72XX supplies a voltage reference and a temperature sensor feature that are gathered in the band gap voltage and temperature sensor (VBGAPTS) module. The band gap provides current and voltage reference for its internal circuits and other analog IP blocks. The analog-to-digital converter (ADC) produces an output value that is proportional to the silicon temperature. Currently reading temperatures only is supported. There are no active/passive cooling agent supported. J721e SoCs have errata i2128: https://www.ti.com/lit/pdf/sprz455 The VTM Temperature Monitors (TEMPSENSORs) are trimmed during production, with the resulting values stored in software-readable registers. Software should use these register values when translating the Temperature Monitor output codes to temperature values. It has an involved workaround. Software needs to read the error codes for -40C, 30C, 125C from the efuse for each device & derive a new look up table for adc to temperature conversion. Involved calculating slopes & constants using 3 different straight line equations with adc refernce codes as the y-axis & error codes in the x-axis. -40C to 30C 30C to 125C 125C to 150C With the above 2 line equations we derive the full look-up table to workaround the errata i2128 for j721e SoC. Tested temperature reading on J721e SoC & J7200 SoC. [daniel.lezcano@linaro.org: Generate look-up tables run-time] Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Keerthy <j-keerthy@ti.com> --- drivers/thermal/Makefile | 2 +- drivers/thermal/k3_j72xx_bandgap.c | 566 +++++++++++++++++++++++++++++ 2 files changed, 567 insertions(+), 1 deletion(-) create mode 100644 drivers/thermal/k3_j72xx_bandgap.c diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index f0c36a1530d5..def8e1a0399c 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -28,7 +28,7 @@ thermal_sys-$(CONFIG_CPU_IDLE_THERMAL) += cpuidle_cooling.o # devfreq cooling thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o -obj-$(CONFIG_K3_THERMAL) += k3_bandgap.o +obj-$(CONFIG_K3_THERMAL) += k3_bandgap.o k3_j72xx_bandgap.o # platform thermal drivers obj-y += broadcom/ obj-$(CONFIG_THERMAL_MMIO) += thermal_mmio.o diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c new file mode 100644 index 000000000000..64e323158952 --- /dev/null +++ b/drivers/thermal/k3_j72xx_bandgap.c @@ -0,0 +1,566 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * TI Bandgap temperature sensor driver for J72XX SoC Family + * + * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ + */ + +#include <linux/math.h> +#include <linux/math64.h> +#include <linux/module.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/pm_runtime.h> +#include <linux/err.h> +#include <linux/types.h> +#include <linux/of_platform.h> +#include <linux/io.h> +#include <linux/thermal.h> +#include <linux/of.h> +#include <linux/delay.h> +#include <linux/slab.h> + +#define K3_VTM_DEVINFO_PWR0_OFFSET 0x4 +#define K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK 0xf0 +#define K3_VTM_TMPSENS0_CTRL_OFFSET 0x300 +#define K3_VTM_MISC_CTRL_OFFSET 0xc +#define K3_VTM_TMPSENS_STAT_OFFSET 0x8 +#define K3_VTM_ANYMAXT_OUTRG_ALERT_EN 0x1 +#define K3_VTM_MISC_CTRL2_OFFSET 0x10 +#define K3_VTM_TS_STAT_DTEMP_MASK 0x3ff +#define K3_VTM_MAX_NUM_TS 8 +#define K3_VTM_TMPSENS_CTRL_SOC BIT(5) +#define K3_VTM_TMPSENS_CTRL_CLRZ BIT(6) +#define K3_VTM_TMPSENS_CTRL_CLKON_REQ BIT(7) +#define K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN BIT(11) + +#define K3_VTM_CORRECTION_TEMP_CNT 3 + +#define MINUS40CREF 5 +#define PLUS30CREF 253 +#define PLUS125CREF 730 +#define PLUS150CREF 940 + +#define TABLE_SIZE 1024 +#define MAX_TEMP 123000 +#define COOL_DOWN_TEMP 105000 + +#define FACTORS_REDUCTION 13 +static int *derived_table; + +static int compute_value(int index, const s64 *factors, int nr_factors, + int reduction) +{ + s64 value = 0; + int i; + + for (i = 0; i < nr_factors; i++) + value += factors[i] * int_pow(index, i); + + return (int)div64_s64(value, int_pow(10, reduction)); +} + +static void init_table(int factors_size, int *table, const s64 *factors) +{ + int i; + + for (i = 0; i < TABLE_SIZE; i++) + table[i] = compute_value(i, factors, factors_size, + FACTORS_REDUCTION); +} + +/** + * struct err_values - structure containing error/reference values + * @refs: reference error values for -40C, 30C, 125C & 150C + * @errs: Actual error values for -40C, 30C, 125C & 150C read from the efuse + */ +struct err_values { + int refs[4]; + int errs[4]; +}; + +static void create_table_segments(struct err_values *err_vals, int seg, + int *ref_table) +{ + int m = 0, c, num, den, i, err, idx1, idx2, err1, err2, ref1, ref2; + + if (seg == 0) + idx1 = 0; + else + idx1 = err_vals->refs[seg]; + + idx2 = err_vals->refs[seg + 1]; + err1 = err_vals->errs[seg]; + err2 = err_vals->errs[seg + 1]; + ref1 = err_vals->refs[seg]; + ref2 = err_vals->refs[seg + 1]; + + /* + * Calculate the slope with adc values read from the register + * as the y-axis param and err in adc value as x-axis param + */ + num = ref2 - ref1; + den = err2 - err1; + if (den) + m = num / den; + c = ref2 - m * err2; + + /* + * Take care of divide by zero error if error values are same + * Or when the slope is 0 + */ + if (den != 0 && m != 0) { + for (i = idx1; i <= idx2; i++) { + err = (i - c) / m; + if (((i + err) < 0) || ((i + err) >= TABLE_SIZE)) + continue; + derived_table[i] = ref_table[i + err]; + } + } else { /* Constant error take care of divide by zero */ + for (i = idx1; i <= idx2; i++) { + if (((i + err1) < 0) || ((i + err1) >= TABLE_SIZE)) + continue; + derived_table[i] = ref_table[i + err1]; + } + } +} + +static int prep_lookup_table(struct err_values *err_vals, int *ref_table) +{ + int inc, i, seg; + + /* + * Fill up the lookup table under 3 segments + * region -40C to +30C + * region +30C to +125C + * region +125C to +150C + */ + for (seg = 0; seg < 3; seg++) + create_table_segments(err_vals, seg, ref_table); + + /* Get to the first valid temperature */ + i = 0; + while (!derived_table[i]) + i++; + + /* + * Get to the last zero index and back fill the temperature for + * sake of continuity + */ + if (i) { + /* 300 milli celsius steps */ + while (i--) + derived_table[i] = derived_table[i + 1] - 300; + /* case 0 */ + derived_table[i] = derived_table[i + 1] - 300; + } + + /* + * Fill the last trailing 0s which are unfilled with increments of + * 100 milli celsius till 1023 code + */ + i = TABLE_SIZE - 1; + while (!derived_table[i]) + i--; + + i++; + inc = 1; + while (i < TABLE_SIZE) { + derived_table[i] = derived_table[i - 1] + inc * 100; + i++; + } + + return 0; +} + +struct k3_thermal_data; + +struct k3_j72xx_bandgap { + struct device *dev; + void __iomem *base; + void __iomem *cfg2_base; + void __iomem *fuse_base; + struct k3_thermal_data *ts_data[K3_VTM_MAX_NUM_TS]; +}; + +/* common data structures */ +struct k3_thermal_data { + struct k3_j72xx_bandgap *bgp; + u32 ctrl_offset; + u32 stat_offset; +}; + +static int two_cmp(int tmp, int mask) +{ + tmp = ~(tmp); + tmp &= mask; + tmp += 1; + + /* Return negative value */ + return (0 - tmp); +} + +static unsigned int vtm_get_best_value(unsigned int s0, unsigned int s1, + unsigned int s2) +{ + int d01 = abs(s0 - s1); + int d02 = abs(s0 - s2); + int d12 = abs(s1 - s2); + + if (d01 <= d02 && d01 <= d12) + return (s0 + s1) / 2; + + if (d02 <= d01 && d02 <= d12) + return (s0 + s2) / 2; + + return (s1 + s2) / 2; +} + +static inline int k3_bgp_read_temp(struct k3_thermal_data *devdata, + int *temp) +{ + struct k3_j72xx_bandgap *bgp; + unsigned int dtemp, s0, s1, s2; + + bgp = devdata->bgp; + /* + * Errata is applicable for am654 pg 1.0 silicon/J7ES. There + * is a variation of the order for certain degree centigrade on AM654. + * Work around that by getting the average of two closest + * readings out of three readings everytime we want to + * report temperatures. + * + * Errata workaround. + */ + s0 = readl(bgp->base + devdata->stat_offset) & + K3_VTM_TS_STAT_DTEMP_MASK; + s1 = readl(bgp->base + devdata->stat_offset) & + K3_VTM_TS_STAT_DTEMP_MASK; + s2 = readl(bgp->base + devdata->stat_offset) & + K3_VTM_TS_STAT_DTEMP_MASK; + dtemp = vtm_get_best_value(s0, s1, s2); + + if (dtemp < 0 || dtemp >= TABLE_SIZE) + return -EINVAL; + + *temp = derived_table[dtemp]; + + return 0; +} + +/* Get temperature callback function for thermal zone */ +static int k3_thermal_get_temp(void *devdata, int *temp) +{ + struct k3_thermal_data *data = devdata; + int ret = 0; + + ret = k3_bgp_read_temp(data, temp); + if (ret) + return ret; + + return ret; +} + +static const struct thermal_zone_of_device_ops k3_of_thermal_ops = { + .get_temp = k3_thermal_get_temp, +}; + +static int k3_j72xx_bandgap_temp_to_adc_code(int temp) +{ + int low = 0, high = TABLE_SIZE - 1, mid; + + if (temp > 160000 || temp < -50000) + return -EINVAL; + + /* Binary search to find the adc code */ + while (low < (high - 1)) { + mid = (low + high) / 2; + if (temp <= derived_table[mid]) + high = mid; + else + low = mid; + } + + return mid; +} + +static void get_efuse_values(int id, struct k3_thermal_data *data, int *err, + struct k3_j72xx_bandgap *bgp) +{ + int i, tmp, pow; + int ct_offsets[5][K3_VTM_CORRECTION_TEMP_CNT] = { + { 0x0, 0x8, 0x4 }, + { 0x0, 0x8, 0x4 }, + { 0x0, -1, 0x4 }, + { 0x0, 0xC, -1 }, + { 0x0, 0xc, 0x8 } + }; + int ct_bm[5][K3_VTM_CORRECTION_TEMP_CNT] = { + { 0x3f, 0x1fe000, 0x1ff }, + { 0xfc0, 0x1fe000, 0x3fe00 }, + { 0x3f000, 0x7f800000, 0x7fc0000 }, + { 0xfc0000, 0x1fe0, 0x1f800000 }, + { 0x3f000000, 0x1fe000, 0x1ff0 } + }; + + for (i = 0; i < 3; i++) { + /* Extract the offset value using bit-mask */ + if (ct_offsets[id][i] == -1 && i == 1) { + /* 25C offset Case of Sensor 2 split between 2 regs */ + tmp = (readl(bgp->fuse_base + 0x8) & 0xE0000000) >> (29); + tmp |= ((readl(bgp->fuse_base + 0xC) & 0x1F) << 3); + pow = tmp & 0x80; + } else if (ct_offsets[id][i] == -1 && i == 2) { + /* 125C Case of Sensor 3 split between 2 regs */ + tmp = (readl(bgp->fuse_base + 0x4) & 0xF8000000) >> (27); + tmp |= ((readl(bgp->fuse_base + 0x8) & 0xF) << 5); + pow = tmp & 0x100; + } else { + tmp = readl(bgp->fuse_base + ct_offsets[id][i]); + tmp &= ct_bm[id][i]; + tmp = tmp >> __ffs(ct_bm[id][i]); + + /* Obtain the sign bit pow*/ + pow = ct_bm[id][i] >> __ffs(ct_bm[id][i]); + pow += 1; + pow /= 2; + } + + /* Check for negative value */ + if (tmp & pow) { + /* 2's complement value */ + tmp = two_cmp(tmp, ct_bm[id][i] >> __ffs(ct_bm[id][i])); + } + err[i] = tmp; + } + + /* Err value for 150C is set to 0 */ + err[i] = 0; +} + +static void print_look_up_table(struct device *dev, int *ref_table) +{ + int i; + + dev_dbg(dev, "The contents of derived array\n"); + dev_dbg(dev, "Code Temperature\n"); + for (i = 0; i < TABLE_SIZE; i++) + dev_dbg(dev, "%d %d %d\n", i, derived_table[i], ref_table[i]); +} + +struct k3_j72xx_bandgap_data { + unsigned int has_errata_i2128; +}; + +static int k3_j72xx_bandgap_probe(struct platform_device *pdev) +{ + int ret = 0, cnt, val, id; + int high_max, low_temp; + struct resource *res; + struct device *dev = &pdev->dev; + struct k3_j72xx_bandgap *bgp; + struct k3_thermal_data *data; + int workaround_needed = 0; + const struct k3_j72xx_bandgap_data *driver_data; + struct thermal_zone_device *ti_thermal; + int *ref_table; + struct err_values err_vals; + + const s64 golden_factors[] = { + -490019999999999936, + 3251200000000000, + -1705800000000, + 603730000, + -92627, + }; + + const s64 pvt_wa_factors[] = { + -415230000000000000, + 3126600000000000, + -1157800000000, + }; + + bgp = devm_kzalloc(&pdev->dev, sizeof(*bgp), GFP_KERNEL); + if (!bgp) + return -ENOMEM; + + bgp->dev = dev; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + bgp->base = devm_ioremap_resource(dev, res); + if (IS_ERR(bgp->base)) + return PTR_ERR(bgp->base); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + bgp->cfg2_base = devm_ioremap_resource(dev, res); + if (IS_ERR(bgp->cfg2_base)) + return PTR_ERR(bgp->cfg2_base); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 2); + bgp->fuse_base = devm_ioremap_resource(dev, res); + if (IS_ERR(bgp->fuse_base)) + return PTR_ERR(bgp->fuse_base); + + driver_data = of_device_get_match_data(dev); + if (driver_data) + workaround_needed = driver_data->has_errata_i2128; + + pm_runtime_enable(dev); + ret = pm_runtime_get_sync(dev); + if (ret < 0) { + pm_runtime_put_noidle(dev); + pm_runtime_disable(dev); + return ret; + } + + /* Get the sensor count in the VTM */ + val = readl(bgp->base + K3_VTM_DEVINFO_PWR0_OFFSET); + cnt = val & K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK; + cnt >>= __ffs(K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK); + + data = devm_kcalloc(bgp->dev, cnt, sizeof(*data), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto err_alloc; + } + + ref_table = kzalloc(sizeof(*ref_table) * TABLE_SIZE, GFP_KERNEL); + if (!ref_table) { + ret = -ENOMEM; + goto err_alloc; + } + + derived_table = devm_kzalloc(bgp->dev, sizeof(*derived_table) * TABLE_SIZE, + GFP_KERNEL); + if (!derived_table) { + ret = -ENOMEM; + goto err_alloc; + } + + /* Workaround not needed if bit30/bit31 is set even for J721e */ + if (workaround_needed && (readl(bgp->fuse_base + 0x0) & 0xc0000000) == 0xc0000000) + workaround_needed = false; + + dev_dbg(bgp->dev, "Work around %sneeded\n", + workaround_needed ? "not " : ""); + + if (!workaround_needed) + init_table(5, ref_table, golden_factors); + else + init_table(3, ref_table, pvt_wa_factors); + + /* Register the thermal sensors */ + for (id = 0; id < cnt; id++) { + data[id].bgp = bgp; + data[id].ctrl_offset = K3_VTM_TMPSENS0_CTRL_OFFSET + id * 0x20; + data[id].stat_offset = data[id].ctrl_offset + + K3_VTM_TMPSENS_STAT_OFFSET; + + if (workaround_needed) { + /* ref adc values for -40C, 30C & 125C respectively */ + err_vals.refs[0] = MINUS40CREF; + err_vals.refs[1] = PLUS30CREF; + err_vals.refs[2] = PLUS125CREF; + err_vals.refs[3] = PLUS150CREF; + get_efuse_values(id, &data[id], err_vals.errs, bgp); + } + + if (id == 0 && workaround_needed) + prep_lookup_table(&err_vals, ref_table); + else if (id == 0 && !workaround_needed) + memcpy(derived_table, ref_table, TABLE_SIZE * 4); + + val = readl(data[id].bgp->cfg2_base + data[id].ctrl_offset); + val |= (K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN | + K3_VTM_TMPSENS_CTRL_SOC | + K3_VTM_TMPSENS_CTRL_CLRZ | BIT(4)); + writel(val, data[id].bgp->cfg2_base + data[id].ctrl_offset); + + bgp->ts_data[id] = &data[id]; + ti_thermal = + devm_thermal_zone_of_sensor_register(bgp->dev, id, + &data[id], + &k3_of_thermal_ops); + if (IS_ERR(ti_thermal)) { + dev_err(bgp->dev, "thermal zone device is NULL\n"); + ret = PTR_ERR(ti_thermal); + goto err_alloc; + } + } + + /* + * Program TSHUT thresholds + * Step 1: set the thresholds to ~123C and 105C WKUP_VTM_MISC_CTRL2 + * Step 2: WKUP_VTM_TMPSENS_CTRL_j set the MAXT_OUTRG_EN bit + * This is already taken care as per of init + * Step 3: WKUP_VTM_MISC_CTRL set the ANYMAXT_OUTRG_ALERT_EN bit + */ + high_max = k3_j72xx_bandgap_temp_to_adc_code(MAX_TEMP); + low_temp = k3_j72xx_bandgap_temp_to_adc_code(COOL_DOWN_TEMP); + + writel((low_temp << 16) | high_max, data[0].bgp->cfg2_base + + K3_VTM_MISC_CTRL2_OFFSET); + mdelay(100); + writel(K3_VTM_ANYMAXT_OUTRG_ALERT_EN, data[0].bgp->cfg2_base + + K3_VTM_MISC_CTRL_OFFSET); + + platform_set_drvdata(pdev, bgp); + + print_look_up_table(dev, ref_table); + /* + * Now that the derived_table has the appropriate look up values + * Free up the ref_table + */ + kfree(ref_table); + + return 0; + +err_alloc: + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + return ret; +} + +static int k3_j72xx_bandgap_remove(struct platform_device *pdev) +{ + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + return 0; +} + +const struct k3_j72xx_bandgap_data k3_j72xx_bandgap_j721e_data = { + .has_errata_i2128 = 1, +}; + +const struct k3_j72xx_bandgap_data k3_j72xx_bandgap_j7200_data = { + .has_errata_i2128 = 0, +}; + +static const struct of_device_id of_k3_j72xx_bandgap_match[] = { + { + .compatible = "ti,j721e-vtm", + .data = &k3_j72xx_bandgap_j721e_data, + }, + { + .compatible = "ti,j7200-vtm", + .data = &k3_j72xx_bandgap_j7200_data, + }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, of_k3_j72xx_bandgap_match); + +static struct platform_driver k3_j72xx_bandgap_sensor_driver = { + .probe = k3_j72xx_bandgap_probe, + .remove = k3_j72xx_bandgap_remove, + .driver = { + .name = "k3-j72xx-soc-thermal", + .of_match_table = of_k3_j72xx_bandgap_match, + }, +}; + +module_platform_driver(k3_j72xx_bandgap_sensor_driver); + +MODULE_DESCRIPTION("K3 bandgap temperature sensor driver"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("J Keerthy <j-keerthy@ti.com>"); -- 2.17.1 ^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support 2022-04-27 6:46 ` [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy @ 2022-05-04 8:00 ` Dan Carpenter 2022-05-09 5:20 ` Joe Perches 2022-05-09 3:10 ` J, KEERTHY 1 sibling, 1 reply; 18+ messages in thread From: Dan Carpenter @ 2022-05-04 8:00 UTC (permalink / raw) To: kbuild, Keerthy, robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: lkp, kbuild-all, j-keerthy, linux-pm, devicetree, linux-kernel Hi Keerthy, url: https://github.com/intel-lab-lkp/linux/commits/Keerthy/thermal-k3_j72xx_bandgap-Add-the-bandgap-driver-support/20220427-144949 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm-randconfig-m031-20220501 (https://download.01.org/0day-ci/archive/20220503/202205030045.5GxgWkst-lkp@intel.com/config) compiler: arm-linux-gnueabi-gcc (GCC) 11.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> smatch warnings: drivers/thermal/k3_j72xx_bandgap.c:521 k3_j72xx_bandgap_probe() warn: possible memory leak of 'ref_table' vim +/ref_table +521 drivers/thermal/k3_j72xx_bandgap.c bb7f95a68cbaa1 Keerthy 2022-04-27 355 static int k3_j72xx_bandgap_probe(struct platform_device *pdev) bb7f95a68cbaa1 Keerthy 2022-04-27 356 { bb7f95a68cbaa1 Keerthy 2022-04-27 357 int ret = 0, cnt, val, id; bb7f95a68cbaa1 Keerthy 2022-04-27 358 int high_max, low_temp; bb7f95a68cbaa1 Keerthy 2022-04-27 359 struct resource *res; bb7f95a68cbaa1 Keerthy 2022-04-27 360 struct device *dev = &pdev->dev; bb7f95a68cbaa1 Keerthy 2022-04-27 361 struct k3_j72xx_bandgap *bgp; bb7f95a68cbaa1 Keerthy 2022-04-27 362 struct k3_thermal_data *data; bb7f95a68cbaa1 Keerthy 2022-04-27 363 int workaround_needed = 0; bb7f95a68cbaa1 Keerthy 2022-04-27 364 const struct k3_j72xx_bandgap_data *driver_data; bb7f95a68cbaa1 Keerthy 2022-04-27 365 struct thermal_zone_device *ti_thermal; bb7f95a68cbaa1 Keerthy 2022-04-27 366 int *ref_table; bb7f95a68cbaa1 Keerthy 2022-04-27 367 struct err_values err_vals; bb7f95a68cbaa1 Keerthy 2022-04-27 368 bb7f95a68cbaa1 Keerthy 2022-04-27 369 const s64 golden_factors[] = { bb7f95a68cbaa1 Keerthy 2022-04-27 370 -490019999999999936, bb7f95a68cbaa1 Keerthy 2022-04-27 371 3251200000000000, bb7f95a68cbaa1 Keerthy 2022-04-27 372 -1705800000000, bb7f95a68cbaa1 Keerthy 2022-04-27 373 603730000, bb7f95a68cbaa1 Keerthy 2022-04-27 374 -92627, bb7f95a68cbaa1 Keerthy 2022-04-27 375 }; bb7f95a68cbaa1 Keerthy 2022-04-27 376 bb7f95a68cbaa1 Keerthy 2022-04-27 377 const s64 pvt_wa_factors[] = { bb7f95a68cbaa1 Keerthy 2022-04-27 378 -415230000000000000, bb7f95a68cbaa1 Keerthy 2022-04-27 379 3126600000000000, bb7f95a68cbaa1 Keerthy 2022-04-27 380 -1157800000000, bb7f95a68cbaa1 Keerthy 2022-04-27 381 }; bb7f95a68cbaa1 Keerthy 2022-04-27 382 bb7f95a68cbaa1 Keerthy 2022-04-27 383 bgp = devm_kzalloc(&pdev->dev, sizeof(*bgp), GFP_KERNEL); bb7f95a68cbaa1 Keerthy 2022-04-27 384 if (!bgp) bb7f95a68cbaa1 Keerthy 2022-04-27 385 return -ENOMEM; bb7f95a68cbaa1 Keerthy 2022-04-27 386 bb7f95a68cbaa1 Keerthy 2022-04-27 387 bgp->dev = dev; bb7f95a68cbaa1 Keerthy 2022-04-27 388 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); bb7f95a68cbaa1 Keerthy 2022-04-27 389 bgp->base = devm_ioremap_resource(dev, res); bb7f95a68cbaa1 Keerthy 2022-04-27 390 if (IS_ERR(bgp->base)) bb7f95a68cbaa1 Keerthy 2022-04-27 391 return PTR_ERR(bgp->base); bb7f95a68cbaa1 Keerthy 2022-04-27 392 bb7f95a68cbaa1 Keerthy 2022-04-27 393 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); bb7f95a68cbaa1 Keerthy 2022-04-27 394 bgp->cfg2_base = devm_ioremap_resource(dev, res); bb7f95a68cbaa1 Keerthy 2022-04-27 395 if (IS_ERR(bgp->cfg2_base)) bb7f95a68cbaa1 Keerthy 2022-04-27 396 return PTR_ERR(bgp->cfg2_base); bb7f95a68cbaa1 Keerthy 2022-04-27 397 bb7f95a68cbaa1 Keerthy 2022-04-27 398 res = platform_get_resource(pdev, IORESOURCE_MEM, 2); bb7f95a68cbaa1 Keerthy 2022-04-27 399 bgp->fuse_base = devm_ioremap_resource(dev, res); bb7f95a68cbaa1 Keerthy 2022-04-27 400 if (IS_ERR(bgp->fuse_base)) bb7f95a68cbaa1 Keerthy 2022-04-27 401 return PTR_ERR(bgp->fuse_base); bb7f95a68cbaa1 Keerthy 2022-04-27 402 bb7f95a68cbaa1 Keerthy 2022-04-27 403 driver_data = of_device_get_match_data(dev); bb7f95a68cbaa1 Keerthy 2022-04-27 404 if (driver_data) bb7f95a68cbaa1 Keerthy 2022-04-27 405 workaround_needed = driver_data->has_errata_i2128; bb7f95a68cbaa1 Keerthy 2022-04-27 406 bb7f95a68cbaa1 Keerthy 2022-04-27 407 pm_runtime_enable(dev); bb7f95a68cbaa1 Keerthy 2022-04-27 408 ret = pm_runtime_get_sync(dev); bb7f95a68cbaa1 Keerthy 2022-04-27 409 if (ret < 0) { bb7f95a68cbaa1 Keerthy 2022-04-27 410 pm_runtime_put_noidle(dev); bb7f95a68cbaa1 Keerthy 2022-04-27 411 pm_runtime_disable(dev); bb7f95a68cbaa1 Keerthy 2022-04-27 412 return ret; bb7f95a68cbaa1 Keerthy 2022-04-27 413 } bb7f95a68cbaa1 Keerthy 2022-04-27 414 bb7f95a68cbaa1 Keerthy 2022-04-27 415 /* Get the sensor count in the VTM */ bb7f95a68cbaa1 Keerthy 2022-04-27 416 val = readl(bgp->base + K3_VTM_DEVINFO_PWR0_OFFSET); bb7f95a68cbaa1 Keerthy 2022-04-27 417 cnt = val & K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK; bb7f95a68cbaa1 Keerthy 2022-04-27 418 cnt >>= __ffs(K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK); bb7f95a68cbaa1 Keerthy 2022-04-27 419 bb7f95a68cbaa1 Keerthy 2022-04-27 420 data = devm_kcalloc(bgp->dev, cnt, sizeof(*data), GFP_KERNEL); bb7f95a68cbaa1 Keerthy 2022-04-27 421 if (!data) { bb7f95a68cbaa1 Keerthy 2022-04-27 422 ret = -ENOMEM; bb7f95a68cbaa1 Keerthy 2022-04-27 423 goto err_alloc; bb7f95a68cbaa1 Keerthy 2022-04-27 424 } bb7f95a68cbaa1 Keerthy 2022-04-27 425 bb7f95a68cbaa1 Keerthy 2022-04-27 426 ref_table = kzalloc(sizeof(*ref_table) * TABLE_SIZE, GFP_KERNEL); bb7f95a68cbaa1 Keerthy 2022-04-27 427 if (!ref_table) { bb7f95a68cbaa1 Keerthy 2022-04-27 428 ret = -ENOMEM; bb7f95a68cbaa1 Keerthy 2022-04-27 429 goto err_alloc; bb7f95a68cbaa1 Keerthy 2022-04-27 430 } bb7f95a68cbaa1 Keerthy 2022-04-27 431 bb7f95a68cbaa1 Keerthy 2022-04-27 432 derived_table = devm_kzalloc(bgp->dev, sizeof(*derived_table) * TABLE_SIZE, bb7f95a68cbaa1 Keerthy 2022-04-27 433 GFP_KERNEL); bb7f95a68cbaa1 Keerthy 2022-04-27 434 if (!derived_table) { bb7f95a68cbaa1 Keerthy 2022-04-27 435 ret = -ENOMEM; bb7f95a68cbaa1 Keerthy 2022-04-27 436 goto err_alloc; ref_table is not freed on error. bb7f95a68cbaa1 Keerthy 2022-04-27 437 } bb7f95a68cbaa1 Keerthy 2022-04-27 438 bb7f95a68cbaa1 Keerthy 2022-04-27 439 /* Workaround not needed if bit30/bit31 is set even for J721e */ bb7f95a68cbaa1 Keerthy 2022-04-27 440 if (workaround_needed && (readl(bgp->fuse_base + 0x0) & 0xc0000000) == 0xc0000000) bb7f95a68cbaa1 Keerthy 2022-04-27 441 workaround_needed = false; bb7f95a68cbaa1 Keerthy 2022-04-27 442 bb7f95a68cbaa1 Keerthy 2022-04-27 443 dev_dbg(bgp->dev, "Work around %sneeded\n", bb7f95a68cbaa1 Keerthy 2022-04-27 444 workaround_needed ? "not " : ""); bb7f95a68cbaa1 Keerthy 2022-04-27 445 bb7f95a68cbaa1 Keerthy 2022-04-27 446 if (!workaround_needed) bb7f95a68cbaa1 Keerthy 2022-04-27 447 init_table(5, ref_table, golden_factors); bb7f95a68cbaa1 Keerthy 2022-04-27 448 else bb7f95a68cbaa1 Keerthy 2022-04-27 449 init_table(3, ref_table, pvt_wa_factors); bb7f95a68cbaa1 Keerthy 2022-04-27 450 bb7f95a68cbaa1 Keerthy 2022-04-27 451 /* Register the thermal sensors */ bb7f95a68cbaa1 Keerthy 2022-04-27 452 for (id = 0; id < cnt; id++) { bb7f95a68cbaa1 Keerthy 2022-04-27 453 data[id].bgp = bgp; bb7f95a68cbaa1 Keerthy 2022-04-27 454 data[id].ctrl_offset = K3_VTM_TMPSENS0_CTRL_OFFSET + id * 0x20; bb7f95a68cbaa1 Keerthy 2022-04-27 455 data[id].stat_offset = data[id].ctrl_offset + bb7f95a68cbaa1 Keerthy 2022-04-27 456 K3_VTM_TMPSENS_STAT_OFFSET; bb7f95a68cbaa1 Keerthy 2022-04-27 457 bb7f95a68cbaa1 Keerthy 2022-04-27 458 if (workaround_needed) { bb7f95a68cbaa1 Keerthy 2022-04-27 459 /* ref adc values for -40C, 30C & 125C respectively */ bb7f95a68cbaa1 Keerthy 2022-04-27 460 err_vals.refs[0] = MINUS40CREF; bb7f95a68cbaa1 Keerthy 2022-04-27 461 err_vals.refs[1] = PLUS30CREF; bb7f95a68cbaa1 Keerthy 2022-04-27 462 err_vals.refs[2] = PLUS125CREF; bb7f95a68cbaa1 Keerthy 2022-04-27 463 err_vals.refs[3] = PLUS150CREF; bb7f95a68cbaa1 Keerthy 2022-04-27 464 get_efuse_values(id, &data[id], err_vals.errs, bgp); bb7f95a68cbaa1 Keerthy 2022-04-27 465 } bb7f95a68cbaa1 Keerthy 2022-04-27 466 bb7f95a68cbaa1 Keerthy 2022-04-27 467 if (id == 0 && workaround_needed) bb7f95a68cbaa1 Keerthy 2022-04-27 468 prep_lookup_table(&err_vals, ref_table); bb7f95a68cbaa1 Keerthy 2022-04-27 469 else if (id == 0 && !workaround_needed) bb7f95a68cbaa1 Keerthy 2022-04-27 470 memcpy(derived_table, ref_table, TABLE_SIZE * 4); bb7f95a68cbaa1 Keerthy 2022-04-27 471 bb7f95a68cbaa1 Keerthy 2022-04-27 472 val = readl(data[id].bgp->cfg2_base + data[id].ctrl_offset); bb7f95a68cbaa1 Keerthy 2022-04-27 473 val |= (K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN | bb7f95a68cbaa1 Keerthy 2022-04-27 474 K3_VTM_TMPSENS_CTRL_SOC | bb7f95a68cbaa1 Keerthy 2022-04-27 475 K3_VTM_TMPSENS_CTRL_CLRZ | BIT(4)); bb7f95a68cbaa1 Keerthy 2022-04-27 476 writel(val, data[id].bgp->cfg2_base + data[id].ctrl_offset); bb7f95a68cbaa1 Keerthy 2022-04-27 477 bb7f95a68cbaa1 Keerthy 2022-04-27 478 bgp->ts_data[id] = &data[id]; bb7f95a68cbaa1 Keerthy 2022-04-27 479 ti_thermal = bb7f95a68cbaa1 Keerthy 2022-04-27 480 devm_thermal_zone_of_sensor_register(bgp->dev, id, bb7f95a68cbaa1 Keerthy 2022-04-27 481 &data[id], bb7f95a68cbaa1 Keerthy 2022-04-27 482 &k3_of_thermal_ops); bb7f95a68cbaa1 Keerthy 2022-04-27 483 if (IS_ERR(ti_thermal)) { bb7f95a68cbaa1 Keerthy 2022-04-27 484 dev_err(bgp->dev, "thermal zone device is NULL\n"); bb7f95a68cbaa1 Keerthy 2022-04-27 485 ret = PTR_ERR(ti_thermal); bb7f95a68cbaa1 Keerthy 2022-04-27 486 goto err_alloc; bb7f95a68cbaa1 Keerthy 2022-04-27 487 } bb7f95a68cbaa1 Keerthy 2022-04-27 488 } bb7f95a68cbaa1 Keerthy 2022-04-27 489 bb7f95a68cbaa1 Keerthy 2022-04-27 490 /* bb7f95a68cbaa1 Keerthy 2022-04-27 491 * Program TSHUT thresholds bb7f95a68cbaa1 Keerthy 2022-04-27 492 * Step 1: set the thresholds to ~123C and 105C WKUP_VTM_MISC_CTRL2 bb7f95a68cbaa1 Keerthy 2022-04-27 493 * Step 2: WKUP_VTM_TMPSENS_CTRL_j set the MAXT_OUTRG_EN bit bb7f95a68cbaa1 Keerthy 2022-04-27 494 * This is already taken care as per of init bb7f95a68cbaa1 Keerthy 2022-04-27 495 * Step 3: WKUP_VTM_MISC_CTRL set the ANYMAXT_OUTRG_ALERT_EN bit bb7f95a68cbaa1 Keerthy 2022-04-27 496 */ bb7f95a68cbaa1 Keerthy 2022-04-27 497 high_max = k3_j72xx_bandgap_temp_to_adc_code(MAX_TEMP); bb7f95a68cbaa1 Keerthy 2022-04-27 498 low_temp = k3_j72xx_bandgap_temp_to_adc_code(COOL_DOWN_TEMP); bb7f95a68cbaa1 Keerthy 2022-04-27 499 bb7f95a68cbaa1 Keerthy 2022-04-27 500 writel((low_temp << 16) | high_max, data[0].bgp->cfg2_base + bb7f95a68cbaa1 Keerthy 2022-04-27 501 K3_VTM_MISC_CTRL2_OFFSET); bb7f95a68cbaa1 Keerthy 2022-04-27 502 mdelay(100); bb7f95a68cbaa1 Keerthy 2022-04-27 503 writel(K3_VTM_ANYMAXT_OUTRG_ALERT_EN, data[0].bgp->cfg2_base + bb7f95a68cbaa1 Keerthy 2022-04-27 504 K3_VTM_MISC_CTRL_OFFSET); bb7f95a68cbaa1 Keerthy 2022-04-27 505 bb7f95a68cbaa1 Keerthy 2022-04-27 506 platform_set_drvdata(pdev, bgp); bb7f95a68cbaa1 Keerthy 2022-04-27 507 bb7f95a68cbaa1 Keerthy 2022-04-27 508 print_look_up_table(dev, ref_table); bb7f95a68cbaa1 Keerthy 2022-04-27 509 /* bb7f95a68cbaa1 Keerthy 2022-04-27 510 * Now that the derived_table has the appropriate look up values bb7f95a68cbaa1 Keerthy 2022-04-27 511 * Free up the ref_table bb7f95a68cbaa1 Keerthy 2022-04-27 512 */ bb7f95a68cbaa1 Keerthy 2022-04-27 513 kfree(ref_table); bb7f95a68cbaa1 Keerthy 2022-04-27 514 bb7f95a68cbaa1 Keerthy 2022-04-27 515 return 0; bb7f95a68cbaa1 Keerthy 2022-04-27 516 bb7f95a68cbaa1 Keerthy 2022-04-27 517 err_alloc: bb7f95a68cbaa1 Keerthy 2022-04-27 518 pm_runtime_put_sync(&pdev->dev); bb7f95a68cbaa1 Keerthy 2022-04-27 519 pm_runtime_disable(&pdev->dev); bb7f95a68cbaa1 Keerthy 2022-04-27 520 bb7f95a68cbaa1 Keerthy 2022-04-27 @521 return ret; bb7f95a68cbaa1 Keerthy 2022-04-27 522 } -- 0-DAY CI Kernel Test Service https://01.org/lkp ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support 2022-05-04 8:00 ` Dan Carpenter @ 2022-05-09 5:20 ` Joe Perches 0 siblings, 0 replies; 18+ messages in thread From: Joe Perches @ 2022-05-09 5:20 UTC (permalink / raw) To: Dan Carpenter, kbuild, Keerthy, robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: lkp, kbuild-all, linux-pm, devicetree, linux-kernel On Wed, 2022-05-04 at 11:00 +0300, Dan Carpenter wrote: > Hi Keerthy, [] > vim +/ref_table +521 drivers/thermal/k3_j72xx_bandgap.c [] > bb7f95a68cbaa1 Keerthy 2022-04-27 426 ref_table = kzalloc(sizeof(*ref_table) * TABLE_SIZE, GFP_KERNEL); > bb7f95a68cbaa1 Keerthy 2022-04-27 427 if (!ref_table) { > bb7f95a68cbaa1 Keerthy 2022-04-27 428 ret = -ENOMEM; > bb7f95a68cbaa1 Keerthy 2022-04-27 429 goto err_alloc; > bb7f95a68cbaa1 Keerthy 2022-04-27 430 } devm_kcalloc > bb7f95a68cbaa1 Keerthy 2022-04-27 431 > bb7f95a68cbaa1 Keerthy 2022-04-27 432 derived_table = devm_kzalloc(bgp->dev, sizeof(*derived_table) * TABLE_SIZE, > bb7f95a68cbaa1 Keerthy 2022-04-27 433 GFP_KERNEL); here too ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support 2022-04-27 6:46 ` [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy 2022-05-04 8:00 ` Dan Carpenter @ 2022-05-09 3:10 ` J, KEERTHY 2022-05-10 15:25 ` Daniel Lezcano 1 sibling, 1 reply; 18+ messages in thread From: J, KEERTHY @ 2022-05-09 3:10 UTC (permalink / raw) To: robh+dt, daniel.lezcano, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: linux-pm, devicetree, linux-kernel On 4/27/2022 12:16 PM, Keerthy wrote: > Add VTM thermal support. In the Voltage Thermal Management > Module(VTM), K3 J72XX supplies a voltage reference and a temperature > sensor feature that are gathered in the band gap voltage and > temperature sensor (VBGAPTS) module. The band gap provides current and > voltage reference for its internal circuits and other analog IP > blocks. The analog-to-digital converter (ADC) produces an output value > that is proportional to the silicon temperature. > > Currently reading temperatures only is supported. There are no > active/passive cooling agent supported. > > J721e SoCs have errata i2128: https://www.ti.com/lit/pdf/sprz455 > > The VTM Temperature Monitors (TEMPSENSORs) are trimmed during production, > with the resulting values stored in software-readable registers. Software > should use these register values when translating the Temperature > Monitor output codes to temperature values. > > It has an involved workaround. Software needs to read the error codes for > -40C, 30C, 125C from the efuse for each device & derive a new look up table > for adc to temperature conversion. Involved calculating slopes & constants > using 3 different straight line equations with adc refernce codes as the > y-axis & error codes in the x-axis. > > -40C to 30C > 30C to 125C > 125C to 150C > > With the above 2 line equations we derive the full look-up table to > workaround the errata i2128 for j721e SoC. Hi Daniel, Any feedback on this series? Let me know. - Keerthy > > Tested temperature reading on J721e SoC & J7200 SoC. > > [daniel.lezcano@linaro.org: Generate look-up tables run-time] > Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> > Signed-off-by: Keerthy <j-keerthy@ti.com> > --- > drivers/thermal/Makefile | 2 +- > drivers/thermal/k3_j72xx_bandgap.c | 566 +++++++++++++++++++++++++++++ > 2 files changed, 567 insertions(+), 1 deletion(-) > create mode 100644 drivers/thermal/k3_j72xx_bandgap.c > > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile > index f0c36a1530d5..def8e1a0399c 100644 > --- a/drivers/thermal/Makefile > +++ b/drivers/thermal/Makefile > @@ -28,7 +28,7 @@ thermal_sys-$(CONFIG_CPU_IDLE_THERMAL) += cpuidle_cooling.o > # devfreq cooling > thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o > > -obj-$(CONFIG_K3_THERMAL) += k3_bandgap.o > +obj-$(CONFIG_K3_THERMAL) += k3_bandgap.o k3_j72xx_bandgap.o > # platform thermal drivers > obj-y += broadcom/ > obj-$(CONFIG_THERMAL_MMIO) += thermal_mmio.o > diff --git a/drivers/thermal/k3_j72xx_bandgap.c b/drivers/thermal/k3_j72xx_bandgap.c > new file mode 100644 > index 000000000000..64e323158952 > --- /dev/null > +++ b/drivers/thermal/k3_j72xx_bandgap.c > @@ -0,0 +1,566 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * TI Bandgap temperature sensor driver for J72XX SoC Family > + * > + * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/ > + */ > + > +#include <linux/math.h> > +#include <linux/math64.h> > +#include <linux/module.h> > +#include <linux/init.h> > +#include <linux/kernel.h> > +#include <linux/pm_runtime.h> > +#include <linux/err.h> > +#include <linux/types.h> > +#include <linux/of_platform.h> > +#include <linux/io.h> > +#include <linux/thermal.h> > +#include <linux/of.h> > +#include <linux/delay.h> > +#include <linux/slab.h> > + > +#define K3_VTM_DEVINFO_PWR0_OFFSET 0x4 > +#define K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK 0xf0 > +#define K3_VTM_TMPSENS0_CTRL_OFFSET 0x300 > +#define K3_VTM_MISC_CTRL_OFFSET 0xc > +#define K3_VTM_TMPSENS_STAT_OFFSET 0x8 > +#define K3_VTM_ANYMAXT_OUTRG_ALERT_EN 0x1 > +#define K3_VTM_MISC_CTRL2_OFFSET 0x10 > +#define K3_VTM_TS_STAT_DTEMP_MASK 0x3ff > +#define K3_VTM_MAX_NUM_TS 8 > +#define K3_VTM_TMPSENS_CTRL_SOC BIT(5) > +#define K3_VTM_TMPSENS_CTRL_CLRZ BIT(6) > +#define K3_VTM_TMPSENS_CTRL_CLKON_REQ BIT(7) > +#define K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN BIT(11) > + > +#define K3_VTM_CORRECTION_TEMP_CNT 3 > + > +#define MINUS40CREF 5 > +#define PLUS30CREF 253 > +#define PLUS125CREF 730 > +#define PLUS150CREF 940 > + > +#define TABLE_SIZE 1024 > +#define MAX_TEMP 123000 > +#define COOL_DOWN_TEMP 105000 > + > +#define FACTORS_REDUCTION 13 > +static int *derived_table; > + > +static int compute_value(int index, const s64 *factors, int nr_factors, > + int reduction) > +{ > + s64 value = 0; > + int i; > + > + for (i = 0; i < nr_factors; i++) > + value += factors[i] * int_pow(index, i); > + > + return (int)div64_s64(value, int_pow(10, reduction)); > +} > + > +static void init_table(int factors_size, int *table, const s64 *factors) > +{ > + int i; > + > + for (i = 0; i < TABLE_SIZE; i++) > + table[i] = compute_value(i, factors, factors_size, > + FACTORS_REDUCTION); > +} > + > +/** > + * struct err_values - structure containing error/reference values > + * @refs: reference error values for -40C, 30C, 125C & 150C > + * @errs: Actual error values for -40C, 30C, 125C & 150C read from the efuse > + */ > +struct err_values { > + int refs[4]; > + int errs[4]; > +}; > + > +static void create_table_segments(struct err_values *err_vals, int seg, > + int *ref_table) > +{ > + int m = 0, c, num, den, i, err, idx1, idx2, err1, err2, ref1, ref2; > + > + if (seg == 0) > + idx1 = 0; > + else > + idx1 = err_vals->refs[seg]; > + > + idx2 = err_vals->refs[seg + 1]; > + err1 = err_vals->errs[seg]; > + err2 = err_vals->errs[seg + 1]; > + ref1 = err_vals->refs[seg]; > + ref2 = err_vals->refs[seg + 1]; > + > + /* > + * Calculate the slope with adc values read from the register > + * as the y-axis param and err in adc value as x-axis param > + */ > + num = ref2 - ref1; > + den = err2 - err1; > + if (den) > + m = num / den; > + c = ref2 - m * err2; > + > + /* > + * Take care of divide by zero error if error values are same > + * Or when the slope is 0 > + */ > + if (den != 0 && m != 0) { > + for (i = idx1; i <= idx2; i++) { > + err = (i - c) / m; > + if (((i + err) < 0) || ((i + err) >= TABLE_SIZE)) > + continue; > + derived_table[i] = ref_table[i + err]; > + } > + } else { /* Constant error take care of divide by zero */ > + for (i = idx1; i <= idx2; i++) { > + if (((i + err1) < 0) || ((i + err1) >= TABLE_SIZE)) > + continue; > + derived_table[i] = ref_table[i + err1]; > + } > + } > +} > + > +static int prep_lookup_table(struct err_values *err_vals, int *ref_table) > +{ > + int inc, i, seg; > + > + /* > + * Fill up the lookup table under 3 segments > + * region -40C to +30C > + * region +30C to +125C > + * region +125C to +150C > + */ > + for (seg = 0; seg < 3; seg++) > + create_table_segments(err_vals, seg, ref_table); > + > + /* Get to the first valid temperature */ > + i = 0; > + while (!derived_table[i]) > + i++; > + > + /* > + * Get to the last zero index and back fill the temperature for > + * sake of continuity > + */ > + if (i) { > + /* 300 milli celsius steps */ > + while (i--) > + derived_table[i] = derived_table[i + 1] - 300; > + /* case 0 */ > + derived_table[i] = derived_table[i + 1] - 300; > + } > + > + /* > + * Fill the last trailing 0s which are unfilled with increments of > + * 100 milli celsius till 1023 code > + */ > + i = TABLE_SIZE - 1; > + while (!derived_table[i]) > + i--; > + > + i++; > + inc = 1; > + while (i < TABLE_SIZE) { > + derived_table[i] = derived_table[i - 1] + inc * 100; > + i++; > + } > + > + return 0; > +} > + > +struct k3_thermal_data; > + > +struct k3_j72xx_bandgap { > + struct device *dev; > + void __iomem *base; > + void __iomem *cfg2_base; > + void __iomem *fuse_base; > + struct k3_thermal_data *ts_data[K3_VTM_MAX_NUM_TS]; > +}; > + > +/* common data structures */ > +struct k3_thermal_data { > + struct k3_j72xx_bandgap *bgp; > + u32 ctrl_offset; > + u32 stat_offset; > +}; > + > +static int two_cmp(int tmp, int mask) > +{ > + tmp = ~(tmp); > + tmp &= mask; > + tmp += 1; > + > + /* Return negative value */ > + return (0 - tmp); > +} > + > +static unsigned int vtm_get_best_value(unsigned int s0, unsigned int s1, > + unsigned int s2) > +{ > + int d01 = abs(s0 - s1); > + int d02 = abs(s0 - s2); > + int d12 = abs(s1 - s2); > + > + if (d01 <= d02 && d01 <= d12) > + return (s0 + s1) / 2; > + > + if (d02 <= d01 && d02 <= d12) > + return (s0 + s2) / 2; > + > + return (s1 + s2) / 2; > +} > + > +static inline int k3_bgp_read_temp(struct k3_thermal_data *devdata, > + int *temp) > +{ > + struct k3_j72xx_bandgap *bgp; > + unsigned int dtemp, s0, s1, s2; > + > + bgp = devdata->bgp; > + /* > + * Errata is applicable for am654 pg 1.0 silicon/J7ES. There > + * is a variation of the order for certain degree centigrade on AM654. > + * Work around that by getting the average of two closest > + * readings out of three readings everytime we want to > + * report temperatures. > + * > + * Errata workaround. > + */ > + s0 = readl(bgp->base + devdata->stat_offset) & > + K3_VTM_TS_STAT_DTEMP_MASK; > + s1 = readl(bgp->base + devdata->stat_offset) & > + K3_VTM_TS_STAT_DTEMP_MASK; > + s2 = readl(bgp->base + devdata->stat_offset) & > + K3_VTM_TS_STAT_DTEMP_MASK; > + dtemp = vtm_get_best_value(s0, s1, s2); > + > + if (dtemp < 0 || dtemp >= TABLE_SIZE) > + return -EINVAL; > + > + *temp = derived_table[dtemp]; > + > + return 0; > +} > + > +/* Get temperature callback function for thermal zone */ > +static int k3_thermal_get_temp(void *devdata, int *temp) > +{ > + struct k3_thermal_data *data = devdata; > + int ret = 0; > + > + ret = k3_bgp_read_temp(data, temp); > + if (ret) > + return ret; > + > + return ret; > +} > + > +static const struct thermal_zone_of_device_ops k3_of_thermal_ops = { > + .get_temp = k3_thermal_get_temp, > +}; > + > +static int k3_j72xx_bandgap_temp_to_adc_code(int temp) > +{ > + int low = 0, high = TABLE_SIZE - 1, mid; > + > + if (temp > 160000 || temp < -50000) > + return -EINVAL; > + > + /* Binary search to find the adc code */ > + while (low < (high - 1)) { > + mid = (low + high) / 2; > + if (temp <= derived_table[mid]) > + high = mid; > + else > + low = mid; > + } > + > + return mid; > +} > + > +static void get_efuse_values(int id, struct k3_thermal_data *data, int *err, > + struct k3_j72xx_bandgap *bgp) > +{ > + int i, tmp, pow; > + int ct_offsets[5][K3_VTM_CORRECTION_TEMP_CNT] = { > + { 0x0, 0x8, 0x4 }, > + { 0x0, 0x8, 0x4 }, > + { 0x0, -1, 0x4 }, > + { 0x0, 0xC, -1 }, > + { 0x0, 0xc, 0x8 } > + }; > + int ct_bm[5][K3_VTM_CORRECTION_TEMP_CNT] = { > + { 0x3f, 0x1fe000, 0x1ff }, > + { 0xfc0, 0x1fe000, 0x3fe00 }, > + { 0x3f000, 0x7f800000, 0x7fc0000 }, > + { 0xfc0000, 0x1fe0, 0x1f800000 }, > + { 0x3f000000, 0x1fe000, 0x1ff0 } > + }; > + > + for (i = 0; i < 3; i++) { > + /* Extract the offset value using bit-mask */ > + if (ct_offsets[id][i] == -1 && i == 1) { > + /* 25C offset Case of Sensor 2 split between 2 regs */ > + tmp = (readl(bgp->fuse_base + 0x8) & 0xE0000000) >> (29); > + tmp |= ((readl(bgp->fuse_base + 0xC) & 0x1F) << 3); > + pow = tmp & 0x80; > + } else if (ct_offsets[id][i] == -1 && i == 2) { > + /* 125C Case of Sensor 3 split between 2 regs */ > + tmp = (readl(bgp->fuse_base + 0x4) & 0xF8000000) >> (27); > + tmp |= ((readl(bgp->fuse_base + 0x8) & 0xF) << 5); > + pow = tmp & 0x100; > + } else { > + tmp = readl(bgp->fuse_base + ct_offsets[id][i]); > + tmp &= ct_bm[id][i]; > + tmp = tmp >> __ffs(ct_bm[id][i]); > + > + /* Obtain the sign bit pow*/ > + pow = ct_bm[id][i] >> __ffs(ct_bm[id][i]); > + pow += 1; > + pow /= 2; > + } > + > + /* Check for negative value */ > + if (tmp & pow) { > + /* 2's complement value */ > + tmp = two_cmp(tmp, ct_bm[id][i] >> __ffs(ct_bm[id][i])); > + } > + err[i] = tmp; > + } > + > + /* Err value for 150C is set to 0 */ > + err[i] = 0; > +} > + > +static void print_look_up_table(struct device *dev, int *ref_table) > +{ > + int i; > + > + dev_dbg(dev, "The contents of derived array\n"); > + dev_dbg(dev, "Code Temperature\n"); > + for (i = 0; i < TABLE_SIZE; i++) > + dev_dbg(dev, "%d %d %d\n", i, derived_table[i], ref_table[i]); > +} > + > +struct k3_j72xx_bandgap_data { > + unsigned int has_errata_i2128; > +}; > + > +static int k3_j72xx_bandgap_probe(struct platform_device *pdev) > +{ > + int ret = 0, cnt, val, id; > + int high_max, low_temp; > + struct resource *res; > + struct device *dev = &pdev->dev; > + struct k3_j72xx_bandgap *bgp; > + struct k3_thermal_data *data; > + int workaround_needed = 0; > + const struct k3_j72xx_bandgap_data *driver_data; > + struct thermal_zone_device *ti_thermal; > + int *ref_table; > + struct err_values err_vals; > + > + const s64 golden_factors[] = { > + -490019999999999936, > + 3251200000000000, > + -1705800000000, > + 603730000, > + -92627, > + }; > + > + const s64 pvt_wa_factors[] = { > + -415230000000000000, > + 3126600000000000, > + -1157800000000, > + }; > + > + bgp = devm_kzalloc(&pdev->dev, sizeof(*bgp), GFP_KERNEL); > + if (!bgp) > + return -ENOMEM; > + > + bgp->dev = dev; > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + bgp->base = devm_ioremap_resource(dev, res); > + if (IS_ERR(bgp->base)) > + return PTR_ERR(bgp->base); > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); > + bgp->cfg2_base = devm_ioremap_resource(dev, res); > + if (IS_ERR(bgp->cfg2_base)) > + return PTR_ERR(bgp->cfg2_base); > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, 2); > + bgp->fuse_base = devm_ioremap_resource(dev, res); > + if (IS_ERR(bgp->fuse_base)) > + return PTR_ERR(bgp->fuse_base); > + > + driver_data = of_device_get_match_data(dev); > + if (driver_data) > + workaround_needed = driver_data->has_errata_i2128; > + > + pm_runtime_enable(dev); > + ret = pm_runtime_get_sync(dev); > + if (ret < 0) { > + pm_runtime_put_noidle(dev); > + pm_runtime_disable(dev); > + return ret; > + } > + > + /* Get the sensor count in the VTM */ > + val = readl(bgp->base + K3_VTM_DEVINFO_PWR0_OFFSET); > + cnt = val & K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK; > + cnt >>= __ffs(K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK); > + > + data = devm_kcalloc(bgp->dev, cnt, sizeof(*data), GFP_KERNEL); > + if (!data) { > + ret = -ENOMEM; > + goto err_alloc; > + } > + > + ref_table = kzalloc(sizeof(*ref_table) * TABLE_SIZE, GFP_KERNEL); > + if (!ref_table) { > + ret = -ENOMEM; > + goto err_alloc; > + } > + > + derived_table = devm_kzalloc(bgp->dev, sizeof(*derived_table) * TABLE_SIZE, > + GFP_KERNEL); > + if (!derived_table) { > + ret = -ENOMEM; > + goto err_alloc; > + } > + > + /* Workaround not needed if bit30/bit31 is set even for J721e */ > + if (workaround_needed && (readl(bgp->fuse_base + 0x0) & 0xc0000000) == 0xc0000000) > + workaround_needed = false; > + > + dev_dbg(bgp->dev, "Work around %sneeded\n", > + workaround_needed ? "not " : ""); > + > + if (!workaround_needed) > + init_table(5, ref_table, golden_factors); > + else > + init_table(3, ref_table, pvt_wa_factors); > + > + /* Register the thermal sensors */ > + for (id = 0; id < cnt; id++) { > + data[id].bgp = bgp; > + data[id].ctrl_offset = K3_VTM_TMPSENS0_CTRL_OFFSET + id * 0x20; > + data[id].stat_offset = data[id].ctrl_offset + > + K3_VTM_TMPSENS_STAT_OFFSET; > + > + if (workaround_needed) { > + /* ref adc values for -40C, 30C & 125C respectively */ > + err_vals.refs[0] = MINUS40CREF; > + err_vals.refs[1] = PLUS30CREF; > + err_vals.refs[2] = PLUS125CREF; > + err_vals.refs[3] = PLUS150CREF; > + get_efuse_values(id, &data[id], err_vals.errs, bgp); > + } > + > + if (id == 0 && workaround_needed) > + prep_lookup_table(&err_vals, ref_table); > + else if (id == 0 && !workaround_needed) > + memcpy(derived_table, ref_table, TABLE_SIZE * 4); > + > + val = readl(data[id].bgp->cfg2_base + data[id].ctrl_offset); > + val |= (K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN | > + K3_VTM_TMPSENS_CTRL_SOC | > + K3_VTM_TMPSENS_CTRL_CLRZ | BIT(4)); > + writel(val, data[id].bgp->cfg2_base + data[id].ctrl_offset); > + > + bgp->ts_data[id] = &data[id]; > + ti_thermal = > + devm_thermal_zone_of_sensor_register(bgp->dev, id, > + &data[id], > + &k3_of_thermal_ops); > + if (IS_ERR(ti_thermal)) { > + dev_err(bgp->dev, "thermal zone device is NULL\n"); > + ret = PTR_ERR(ti_thermal); > + goto err_alloc; > + } > + } > + > + /* > + * Program TSHUT thresholds > + * Step 1: set the thresholds to ~123C and 105C WKUP_VTM_MISC_CTRL2 > + * Step 2: WKUP_VTM_TMPSENS_CTRL_j set the MAXT_OUTRG_EN bit > + * This is already taken care as per of init > + * Step 3: WKUP_VTM_MISC_CTRL set the ANYMAXT_OUTRG_ALERT_EN bit > + */ > + high_max = k3_j72xx_bandgap_temp_to_adc_code(MAX_TEMP); > + low_temp = k3_j72xx_bandgap_temp_to_adc_code(COOL_DOWN_TEMP); > + > + writel((low_temp << 16) | high_max, data[0].bgp->cfg2_base + > + K3_VTM_MISC_CTRL2_OFFSET); > + mdelay(100); > + writel(K3_VTM_ANYMAXT_OUTRG_ALERT_EN, data[0].bgp->cfg2_base + > + K3_VTM_MISC_CTRL_OFFSET); > + > + platform_set_drvdata(pdev, bgp); > + > + print_look_up_table(dev, ref_table); > + /* > + * Now that the derived_table has the appropriate look up values > + * Free up the ref_table > + */ > + kfree(ref_table); > + > + return 0; > + > +err_alloc: > + pm_runtime_put_sync(&pdev->dev); > + pm_runtime_disable(&pdev->dev); > + > + return ret; > +} > + > +static int k3_j72xx_bandgap_remove(struct platform_device *pdev) > +{ > + pm_runtime_put_sync(&pdev->dev); > + pm_runtime_disable(&pdev->dev); > + > + return 0; > +} > + > +const struct k3_j72xx_bandgap_data k3_j72xx_bandgap_j721e_data = { > + .has_errata_i2128 = 1, > +}; > + > +const struct k3_j72xx_bandgap_data k3_j72xx_bandgap_j7200_data = { > + .has_errata_i2128 = 0, > +}; > + > +static const struct of_device_id of_k3_j72xx_bandgap_match[] = { > + { > + .compatible = "ti,j721e-vtm", > + .data = &k3_j72xx_bandgap_j721e_data, > + }, > + { > + .compatible = "ti,j7200-vtm", > + .data = &k3_j72xx_bandgap_j7200_data, > + }, > + { /* sentinel */ }, > +}; > +MODULE_DEVICE_TABLE(of, of_k3_j72xx_bandgap_match); > + > +static struct platform_driver k3_j72xx_bandgap_sensor_driver = { > + .probe = k3_j72xx_bandgap_probe, > + .remove = k3_j72xx_bandgap_remove, > + .driver = { > + .name = "k3-j72xx-soc-thermal", > + .of_match_table = of_k3_j72xx_bandgap_match, > + }, > +}; > + > +module_platform_driver(k3_j72xx_bandgap_sensor_driver); > + > +MODULE_DESCRIPTION("K3 bandgap temperature sensor driver"); > +MODULE_LICENSE("GPL"); > +MODULE_AUTHOR("J Keerthy <j-keerthy@ti.com>"); ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support 2022-05-09 3:10 ` J, KEERTHY @ 2022-05-10 15:25 ` Daniel Lezcano 2022-05-10 17:17 ` J, KEERTHY 0 siblings, 1 reply; 18+ messages in thread From: Daniel Lezcano @ 2022-05-10 15:25 UTC (permalink / raw) To: J, KEERTHY, robh+dt, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: linux-pm, devicetree, linux-kernel On 09/05/2022 05:10, J, KEERTHY wrote: > > > On 4/27/2022 12:16 PM, Keerthy wrote: >> Add VTM thermal support. In the Voltage Thermal Management >> Module(VTM), K3 J72XX supplies a voltage reference and a temperature >> sensor feature that are gathered in the band gap voltage and >> temperature sensor (VBGAPTS) module. The band gap provides current and >> voltage reference for its internal circuits and other analog IP >> blocks. The analog-to-digital converter (ADC) produces an output value >> that is proportional to the silicon temperature. >> >> Currently reading temperatures only is supported. There are no >> active/passive cooling agent supported. >> >> J721e SoCs have errata i2128: https://www.ti.com/lit/pdf/sprz455 >> >> The VTM Temperature Monitors (TEMPSENSORs) are trimmed during production, >> with the resulting values stored in software-readable registers. Software >> should use these register values when translating the Temperature >> Monitor output codes to temperature values. >> >> It has an involved workaround. Software needs to read the error codes for >> -40C, 30C, 125C from the efuse for each device & derive a new look up >> table >> for adc to temperature conversion. Involved calculating slopes & >> constants >> using 3 different straight line equations with adc refernce codes as the >> y-axis & error codes in the x-axis. >> >> -40C to 30C >> 30C to 125C >> 125C to 150C >> >> With the above 2 line equations we derive the full look-up table to >> workaround the errata i2128 for j721e SoC. > > Hi Daniel, > > Any feedback on this series? Let me know. There are a few but that would be nit picking and I don't want to postpone this driver any longer. How do you want to proceed? Shall I take it through my tree? -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support 2022-05-10 15:25 ` Daniel Lezcano @ 2022-05-10 17:17 ` J, KEERTHY 2022-05-10 17:38 ` Daniel Lezcano 2022-05-11 4:57 ` Vignesh Raghavendra 0 siblings, 2 replies; 18+ messages in thread From: J, KEERTHY @ 2022-05-10 17:17 UTC (permalink / raw) To: Daniel Lezcano, robh+dt, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: linux-pm, devicetree, linux-kernel On 5/10/2022 8:55 PM, Daniel Lezcano wrote: > On 09/05/2022 05:10, J, KEERTHY wrote: >> >> >> On 4/27/2022 12:16 PM, Keerthy wrote: >>> Add VTM thermal support. In the Voltage Thermal Management >>> Module(VTM), K3 J72XX supplies a voltage reference and a temperature >>> sensor feature that are gathered in the band gap voltage and >>> temperature sensor (VBGAPTS) module. The band gap provides current and >>> voltage reference for its internal circuits and other analog IP >>> blocks. The analog-to-digital converter (ADC) produces an output value >>> that is proportional to the silicon temperature. >>> >>> Currently reading temperatures only is supported. There are no >>> active/passive cooling agent supported. >>> >>> J721e SoCs have errata i2128: https://www.ti.com/lit/pdf/sprz455 >>> >>> The VTM Temperature Monitors (TEMPSENSORs) are trimmed during >>> production, >>> with the resulting values stored in software-readable registers. >>> Software >>> should use these register values when translating the Temperature >>> Monitor output codes to temperature values. >>> >>> It has an involved workaround. Software needs to read the error codes >>> for >>> -40C, 30C, 125C from the efuse for each device & derive a new look up >>> table >>> for adc to temperature conversion. Involved calculating slopes & >>> constants >>> using 3 different straight line equations with adc refernce codes as the >>> y-axis & error codes in the x-axis. >>> >>> -40C to 30C >>> 30C to 125C >>> 125C to 150C >>> >>> With the above 2 line equations we derive the full look-up table to >>> workaround the errata i2128 for j721e SoC. >> >> Hi Daniel, >> >> Any feedback on this series? Let me know. > > There are a few but that would be nit picking and I don't want to > postpone this driver any longer. > > How do you want to proceed? Shall I take it through my tree? Hi Daniel, Patch 1 & 4 i.e Documentation patch and driver patch can be picked by you. I believe Vignesh will take the dts patches. Vignesh, Can you confirm? - Keerthy > > ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support 2022-05-10 17:17 ` J, KEERTHY @ 2022-05-10 17:38 ` Daniel Lezcano 2022-05-11 4:57 ` Vignesh Raghavendra 1 sibling, 0 replies; 18+ messages in thread From: Daniel Lezcano @ 2022-05-10 17:38 UTC (permalink / raw) To: J, KEERTHY, robh+dt, rui.zhang, amitk, kristo, vigneshr, krzysztof.kozlowski Cc: linux-pm, devicetree, linux-kernel On 10/05/2022 19:17, J, KEERTHY wrote: > [ ... ] > Hi Daniel, > > Patch 1 & 4 i.e Documentation patch and driver patch can be picked by > you. I believe Vignesh will take the dts patches. Will you send a V7 with Krzysztof comments fixed ? -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog ^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support 2022-05-10 17:17 ` J, KEERTHY 2022-05-10 17:38 ` Daniel Lezcano @ 2022-05-11 4:57 ` Vignesh Raghavendra 1 sibling, 0 replies; 18+ messages in thread From: Vignesh Raghavendra @ 2022-05-11 4:57 UTC (permalink / raw) To: J, KEERTHY, Daniel Lezcano, robh+dt, rui.zhang, amitk, kristo, krzysztof.kozlowski Cc: linux-pm, devicetree, linux-kernel On 10/05/22 22:47, J, KEERTHY wrote: > > > On 5/10/2022 8:55 PM, Daniel Lezcano wrote: >> On 09/05/2022 05:10, J, KEERTHY wrote: >>> >>> >>> On 4/27/2022 12:16 PM, Keerthy wrote: >>>> Add VTM thermal support. In the Voltage Thermal Management >>>> Module(VTM), K3 J72XX supplies a voltage reference and a temperature >>>> sensor feature that are gathered in the band gap voltage and >>>> temperature sensor (VBGAPTS) module. The band gap provides current and >>>> voltage reference for its internal circuits and other analog IP >>>> blocks. The analog-to-digital converter (ADC) produces an output value >>>> that is proportional to the silicon temperature. >>>> >>>> Currently reading temperatures only is supported. There are no >>>> active/passive cooling agent supported. >>>> >>>> J721e SoCs have errata i2128: https://www.ti.com/lit/pdf/sprz455 >>>> >>>> The VTM Temperature Monitors (TEMPSENSORs) are trimmed during >>>> production, >>>> with the resulting values stored in software-readable registers. >>>> Software >>>> should use these register values when translating the Temperature >>>> Monitor output codes to temperature values. >>>> >>>> It has an involved workaround. Software needs to read the error >>>> codes for >>>> -40C, 30C, 125C from the efuse for each device & derive a new look >>>> up table >>>> for adc to temperature conversion. Involved calculating slopes & >>>> constants >>>> using 3 different straight line equations with adc refernce codes as >>>> the >>>> y-axis & error codes in the x-axis. >>>> >>>> -40C to 30C >>>> 30C to 125C >>>> 125C to 150C >>>> >>>> With the above 2 line equations we derive the full look-up table to >>>> workaround the errata i2128 for j721e SoC. >>> >>> Hi Daniel, >>> >>> Any feedback on this series? Let me know. >> >> There are a few but that would be nit picking and I don't want to >> postpone this driver any longer. >> >> How do you want to proceed? Shall I take it through my tree? > > Hi Daniel, > > Patch 1 & 4 i.e Documentation patch and driver patch can be picked by > you. I believe Vignesh will take the dts patches. > > Vignesh, > > Can you confirm? > Yes, please decouple DT patches from driver+binding patches as they are to be applied to different trees. -- Regards Vignesh ^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2022-05-11 10:57 UTC | newest] Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-04-27 6:46 [PATCH v6 0/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy 2022-04-27 6:46 ` [PATCH v6 1/4] dt-bindings: thermal: k3-j72xx: Add VTM bindings documentation Keerthy 2022-05-03 0:34 ` Rob Herring 2022-05-09 3:18 ` J, KEERTHY 2022-05-09 6:42 ` Krzysztof Kozlowski 2022-05-11 7:53 ` J, KEERTHY 2022-05-11 8:15 ` Krzysztof Kozlowski 2022-05-11 10:57 ` J, KEERTHY 2022-04-27 6:46 ` [PATCH v6 2/4] arm64: dts: ti: j721e: Add VTM node Keerthy 2022-04-27 6:46 ` [PATCH v6 3/4] arm64: dts: ti: j7200: " Keerthy 2022-04-27 6:46 ` [PATCH v6 4/4] thermal: k3_j72xx_bandgap: Add the bandgap driver support Keerthy 2022-05-04 8:00 ` Dan Carpenter 2022-05-09 5:20 ` Joe Perches 2022-05-09 3:10 ` J, KEERTHY 2022-05-10 15:25 ` Daniel Lezcano 2022-05-10 17:17 ` J, KEERTHY 2022-05-10 17:38 ` Daniel Lezcano 2022-05-11 4:57 ` Vignesh Raghavendra
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