From: Peter Zijlstra <peterz@infradead.org>
To: "Liang, Kan" <kan.liang@linux.intel.com>
Cc: acme@kernel.org, mingo@kernel.org, linux-kernel@vger.kernel.org,
eranian@google.com, namhyung@kernel.org, jolsa@redhat.com,
ak@linux.intel.com, yao.jin@linux.intel.com
Subject: Re: [PATCH 03/12] perf/x86/intel: Add perf core PMU support for Sapphire Rapids
Date: Wed, 27 Jan 2021 20:16:16 +0100 [thread overview]
Message-ID: <YBG8ACJBCvZsSbW5@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <4ce07775-1076-0a2d-55be-bea3c7dc63f9@linux.intel.com>
On Tue, Jan 26, 2021 at 10:44:17AM -0500, Liang, Kan wrote:
>
>
> On 1/26/2021 9:44 AM, Peter Zijlstra wrote:
> > On Tue, Jan 19, 2021 at 12:38:22PM -0800, kan.liang@linux.intel.com wrote:
> > > @@ -3671,6 +3853,31 @@ static int intel_pmu_hw_config(struct perf_event *event)
> > > }
> > > }
> > > + /*
> > > + * To retrieve complete Memory Info of the load latency event, an
> > > + * auxiliary event has to be enabled simultaneously. Add a check for
> > > + * the load latency event.
> > > + *
> > > + * In a group, the auxiliary event must be in front of the load latency
> > > + * event. The rule is to simplify the implementation of the check.
> > > + * That's because perf cannot have a complete group at the moment.
> > > + */
> > > + if (x86_pmu.flags & PMU_FL_MEM_LOADS_AUX &&
> > > + (event->attr.sample_type & PERF_SAMPLE_DATA_SRC) &&
> > > + is_mem_loads_event(event)) {
> > > + struct perf_event *leader = event->group_leader;
> > > + struct perf_event *sibling = NULL;
> > > +
> > > + if (!is_mem_loads_aux_event(leader)) {
> > > + for_each_sibling_event(sibling, leader) {
> > > + if (is_mem_loads_aux_event(sibling))
> > > + break;
> > > + }
> > > + if (list_entry_is_head(sibling, &leader->sibling_list, sibling_list))
> > > + return -ENODATA;
> > > + }
> > > + }
> > > +
> > > if (!(event->attr.config & ARCH_PERFMON_EVENTSEL_ANY))
> > > return 0;
> >
> > I have vague memories of this getting mentioned in a call at some point.
> > Pretend I don't know anything and tell me more.
> >
>
> Adding the auxiliary event is for the new data source fields, data block &
> address block. If perf only samples the load latency event, the value of the
> data block & address block fields in a sample is not correct. To get the
> correct value, we have to sample both the auxiliary event and the load
> latency together on SPR. So I add the check in the kernel. I also modify the
> perf mem in the perf tool accordingly.
This is an active work around for a chip defect right? Something we're
normally have an errata for. Can we call it that?
next prev parent reply other threads:[~2021-01-27 19:17 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-19 20:38 [PATCH 00/12] perf core PMU support for Sapphire Rapids kan.liang
2021-01-19 20:38 ` [PATCH 01/12] perf/core: Add PERF_SAMPLE_WEIGHT_EXT kan.liang
2021-01-26 14:42 ` Peter Zijlstra
2021-01-26 15:33 ` Liang, Kan
2021-01-26 15:55 ` Peter Zijlstra
2021-01-19 20:38 ` [PATCH 02/12] perf/x86/intel: Factor out intel_update_topdown_event() kan.liang
2021-01-19 20:38 ` [PATCH 03/12] perf/x86/intel: Add perf core PMU support for Sapphire Rapids kan.liang
2021-01-26 14:43 ` Peter Zijlstra
2021-01-26 15:34 ` Liang, Kan
2021-01-26 14:44 ` Peter Zijlstra
2021-01-26 15:44 ` Liang, Kan
2021-01-27 19:16 ` Peter Zijlstra [this message]
2021-01-26 14:49 ` Peter Zijlstra
2021-01-26 15:37 ` Peter Zijlstra
2021-01-26 16:21 ` Liang, Kan
2021-01-19 20:38 ` [PATCH 04/12] perf/x86/intel: Support CPUID 10.ECX to disable fixed counters kan.liang
2021-01-26 15:44 ` Peter Zijlstra
2021-01-26 15:53 ` Peter Zijlstra
2021-01-19 20:38 ` [PATCH 05/12] tools headers uapi: Update tools's copy of linux/perf_event.h kan.liang
2021-01-19 20:38 ` [PATCH 06/12] perf tools: Support data block and addr block kan.liang
2021-01-19 20:38 ` [PATCH 07/12] perf c2c: " kan.liang
2021-01-19 20:38 ` [PATCH 08/12] perf tools: Support PERF_SAMPLE_WEIGHT_EXT kan.liang
2021-01-19 20:38 ` [PATCH 09/12] perf report: Support instruction latency kan.liang
2021-01-19 20:38 ` [PATCH 10/12] perf test: Support PERF_SAMPLE_WEIGHT_EXT kan.liang
2021-01-19 20:38 ` [PATCH 11/12] perf stat: Support L2 Topdown events kan.liang
2021-01-19 20:38 ` [PATCH 12/12] perf, tools: Update topdown documentation for Sapphire Rapids kan.liang
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