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From: "Liang, Kan" <kan.liang@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: acme@kernel.org, mingo@kernel.org, linux-kernel@vger.kernel.org,
	eranian@google.com, namhyung@kernel.org, jolsa@redhat.com,
	ak@linux.intel.com, yao.jin@linux.intel.com
Subject: Re: [PATCH 03/12] perf/x86/intel: Add perf core PMU support for Sapphire Rapids
Date: Tue, 26 Jan 2021 10:34:01 -0500	[thread overview]
Message-ID: <fc560c48-c460-688f-739a-d0068f3d4e55@linux.intel.com> (raw)
In-Reply-To: <YBAqnSlLUpBHOWRY@hirez.programming.kicks-ass.net>



On 1/26/2021 9:43 AM, Peter Zijlstra wrote:
> On Tue, Jan 19, 2021 at 12:38:22PM -0800, kan.liang@linux.intel.com wrote:
>> @@ -2319,6 +2474,17 @@ static void __icl_update_topdown_event(struct perf_event *event,
>>   {
>>   	u64 delta, last = 0;
>>   
>> +	/*
>> +	 * Although the unsupported topdown events are not exposed to users,
>> +	 * users may mistakenly use the unsupported events via RAW format.
>> +	 * For example, using L2 topdown event, cpu/event=0x00,umask=0x84/,
>> +	 * on Ice Lake. In this case, the scheduler follows the unknown
>> +	 * event handling and assigns a GP counter to the event.
>> +	 * Check the case, and avoid updating unsupported events.
>> +	 */
>> +	if (event->hw.idx < INTEL_PMC_IDX_FIXED)
>> +		return;
>> +
>>   	delta = icl_get_topdown_value(event, slots, metrics);
>>   	if (last_slots)
>>   		last = icl_get_topdown_value(event, last_slots, last_metrics);
> 
> Is this a separate patch?
> 

I will move it to a separate patch.

Thanks,
Kan

  reply	other threads:[~2021-01-26 15:56 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-19 20:38 [PATCH 00/12] perf core PMU support for Sapphire Rapids kan.liang
2021-01-19 20:38 ` [PATCH 01/12] perf/core: Add PERF_SAMPLE_WEIGHT_EXT kan.liang
2021-01-26 14:42   ` Peter Zijlstra
2021-01-26 15:33     ` Liang, Kan
2021-01-26 15:55       ` Peter Zijlstra
2021-01-19 20:38 ` [PATCH 02/12] perf/x86/intel: Factor out intel_update_topdown_event() kan.liang
2021-01-19 20:38 ` [PATCH 03/12] perf/x86/intel: Add perf core PMU support for Sapphire Rapids kan.liang
2021-01-26 14:43   ` Peter Zijlstra
2021-01-26 15:34     ` Liang, Kan [this message]
2021-01-26 14:44   ` Peter Zijlstra
2021-01-26 15:44     ` Liang, Kan
2021-01-27 19:16       ` Peter Zijlstra
2021-01-26 14:49   ` Peter Zijlstra
2021-01-26 15:37   ` Peter Zijlstra
2021-01-26 16:21     ` Liang, Kan
2021-01-19 20:38 ` [PATCH 04/12] perf/x86/intel: Support CPUID 10.ECX to disable fixed counters kan.liang
2021-01-26 15:44   ` Peter Zijlstra
2021-01-26 15:53   ` Peter Zijlstra
2021-01-19 20:38 ` [PATCH 05/12] tools headers uapi: Update tools's copy of linux/perf_event.h kan.liang
2021-01-19 20:38 ` [PATCH 06/12] perf tools: Support data block and addr block kan.liang
2021-01-19 20:38 ` [PATCH 07/12] perf c2c: " kan.liang
2021-01-19 20:38 ` [PATCH 08/12] perf tools: Support PERF_SAMPLE_WEIGHT_EXT kan.liang
2021-01-19 20:38 ` [PATCH 09/12] perf report: Support instruction latency kan.liang
2021-01-19 20:38 ` [PATCH 10/12] perf test: Support PERF_SAMPLE_WEIGHT_EXT kan.liang
2021-01-19 20:38 ` [PATCH 11/12] perf stat: Support L2 Topdown events kan.liang
2021-01-19 20:38 ` [PATCH 12/12] perf, tools: Update topdown documentation for Sapphire Rapids kan.liang

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