From: Ira Weiny <ira.weiny@intel.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Rik van Riel <riel@surriel.com>,
Dave Hansen <dave.hansen@intel.com>,
Dave Hansen <dave.hansen@linux.intel.com>, <x86@kernel.org>,
<linux-kernel@vger.kernel.org>, <kernel-team@fb.com>
Subject: Re: [RFC PATCH 2/5] entry: Add calls for save/restore auxiliary pt_regs
Date: Tue, 9 Aug 2022 14:49:19 -0700 [thread overview]
Message-ID: <YvLWX4NiqReB5CHB@iweiny-desk3> (raw)
In-Reply-To: <YvKsS3QuOu4JVzZU@zn.tnic>
On Tue, Aug 09, 2022 at 08:49:47PM +0200, Borislav Petkov wrote:
> On Tue, Aug 09, 2022 at 11:38:03AM -0700, Ira Weiny wrote:
> > Thomas did a lot of work to make the entry code generic. So I was
> > keeping that work consistent. This also helps to ensure I did not miss
> > any places.
>
> How about you worry about the other arches when you actually cross that
> bridge?
I guess I miss understood the reasoning behind Thomas' work. No one mentioned
trying to isolate this to x86 during the PKS review.
>
> > I don't believe this is correct because instrumentation is not enabled
> > here.
>
> Why do you have to run
>
> arch_save_aux_pt_regs()
>
> with instrumentation enabled?
Sorry, that was carried over from the PKS series where I did need to call it.
I pulled this series over quickly to show basically what needed to be done.
But I did not review it for this detail.
>
> Patch 5 does
>
> + struct pt_regs_auxiliary *aux_pt_regs = &to_extended_pt_regs(regs)->aux;
> +
> + aux_pt_regs->cpu = raw_smp_processor_id();
>
> only?
>
> Why does that need to run with instrumentation enabled?
This does not.
Am I wrong that instrumentation begin/end are 0 overhead in production builds?
Ira
>
> --
> Regards/Gruss,
> Boris.
>
> https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2022-08-09 21:50 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 17:30 [RFC PATCH 0/5] Print CPU at segfault time ira.weiny
2022-08-05 17:30 ` [RFC PATCH 1/5] entry: Pass pt_regs to irqentry_exit_cond_resched() ira.weiny
2022-08-05 18:33 ` Rik van Riel
2022-08-08 10:38 ` Borislav Petkov
2022-08-08 17:34 ` Ira Weiny
2022-08-08 17:38 ` Borislav Petkov
2022-08-08 17:43 ` Dave Hansen
2022-08-08 17:52 ` Borislav Petkov
2022-08-09 23:18 ` Thomas Gleixner
2022-08-10 7:25 ` Thomas Gleixner
2022-08-05 17:30 ` [RFC PATCH 2/5] entry: Add calls for save/restore auxiliary pt_regs ira.weiny
2022-08-05 18:34 ` Rik van Riel
2022-08-09 12:05 ` Borislav Petkov
2022-08-09 18:38 ` Ira Weiny
2022-08-09 18:49 ` Borislav Petkov
2022-08-09 21:14 ` Thomas Gleixner
2022-08-09 21:38 ` Borislav Petkov
2022-08-09 22:33 ` Ira Weiny
2022-08-09 21:49 ` Ira Weiny [this message]
2022-08-09 23:53 ` Thomas Gleixner
2022-08-05 17:30 ` [RFC PATCH 3/5] x86/entry: Add auxiliary pt_regs space ira.weiny
2022-08-05 18:45 ` Rik van Riel
2022-08-05 17:30 ` [RFC PATCH 4/5] x86,mm: print likely CPU at segfault time ira.weiny
2022-08-05 17:30 ` [RFC PATCH 5/5] x86/entry: Store CPU info on exception entry ira.weiny
2022-08-05 18:46 ` Rik van Riel
2022-08-05 18:47 ` Dave Hansen
2022-08-06 9:01 ` Ingo Molnar
2022-08-06 9:11 ` Borislav Petkov
2022-08-07 10:02 ` Ingo Molnar
2022-08-07 10:35 ` Borislav Petkov
2022-08-07 20:02 ` Ira Weiny
2022-08-08 11:03 ` Ingo Molnar
2022-08-08 12:01 ` Borislav Petkov
2022-08-09 20:06 ` Thomas Gleixner
2022-08-08 16:16 ` Dave Hansen
2022-08-08 17:24 ` Rik van Riel
2022-08-09 21:19 ` Andy Lutomirski
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