From: Sean Christopherson <seanjc@google.com>
To: Kai Huang <kai.huang@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Yan Zhao <yan.y.zhao@intel.com>,
Isaku Yamahata <isaku.yamahata@intel.com>,
Michael Roth <michael.roth@amd.com>,
Yu Zhang <yu.c.zhang@linux.intel.com>,
Chao Peng <chao.p.peng@linux.intel.com>,
Fuad Tabba <tabba@google.com>,
David Matlack <dmatlack@google.com>
Subject: Re: [PATCH 06/16] KVM: x86/mmu: WARN if upper 32 bits of legacy #PF error code are non-zero
Date: Thu, 29 Feb 2024 15:07:59 -0800 [thread overview]
Message-ID: <ZeEOTxUTSkYnP9Y0@google.com> (raw)
In-Reply-To: <3779953f-4d07-41d7-b450-bbc2afffaa43@intel.com>
On Fri, Mar 01, 2024, Kai Huang wrote:
>
>
> On 28/02/2024 3:41 pm, Sean Christopherson wrote:
> > WARN if bits 63:32 are non-zero when handling an intercepted legacy #PF,
>
> I found "legacy #PF" is a little bit confusing but I couldn't figure out a
> better name either :-)
>
> > as the error code for #PF is limited to 32 bits (and in practice, 16 bits
> > on Intel CPUS). This behavior is architectural, is part of KVM's ABI
> > (see kvm_vcpu_events.error_code), and is explicitly documented as being
> > preserved for intecerpted #PF in both the APM:
> >
> > The error code saved in EXITINFO1 is the same as would be pushed onto
> > the stack by a non-intercepted #PF exception in protected mode.
> >
> > and even more explicitly in the SDM as VMCS.VM_EXIT_INTR_ERROR_CODE is a
> > 32-bit field.
> >
> > Simply drop the upper bits of hardware provides garbage, as spurious
>
> "of" -> "if" ?
>
> > information should do no harm (though in all likelihood hardware is buggy
> > and the kernel is doomed).
> >
> > Handling all upper 32 bits in the #PF path will allow moving the sanity
> > check on synthetic checks from kvm_mmu_page_fault() to npf_interception(),
> > which in turn will allow deriving PFERR_PRIVATE_ACCESS from AMD's
> > PFERR_GUEST_ENC_MASK without running afoul of the sanity check.
> >
> > Note, this also why Intel uses bit 15 for SGX (highest bit on Intel CPUs)
>
> "this" -> "this is" ?
>
> > and AMD uses bit 31 for RMP (highest bit on AMD CPUs); using the highest
> > bit minimizes the probability of a collision with the "other" vendor,
> > without needing to plumb more bits through microcode.
> >
> > Signed-off-by: Sean Christopherson <seanjc@google.com>
> > ---
> > arch/x86/kvm/mmu/mmu.c | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
> > index 7807bdcd87e8..5d892bd59c97 100644
> > --- a/arch/x86/kvm/mmu/mmu.c
> > +++ b/arch/x86/kvm/mmu/mmu.c
> > @@ -4553,6 +4553,13 @@ int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
> > if (WARN_ON_ONCE(fault_address >> 32))
> > return -EFAULT;
> > #endif
> > + /*
> > + * Legacy #PF exception only have a 32-bit error code. Simply drop the
>
> "have" -> "has" ?
This one I'll fix by making "exception" plural.
Thanks much for the reviews!
>
> > + * upper bits as KVM doesn't use them for #PF (because they are never
> > + * set), and to ensure there are no collisions with KVM-defined bits.
> > + */
> > + if (WARN_ON_ONCE(error_code >> 32))
> > + error_code = lower_32_bits(error_code);
> > vcpu->arch.l1tf_flush_l1d = true;
> > if (!flags) {
> Reviewed-by: Kai Huang <kai.huang@intel.com>
next prev parent reply other threads:[~2024-02-29 23:08 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-28 2:41 [PATCH 00/16] KVM: x86/mmu: Page fault and MMIO cleanups Sean Christopherson
2024-02-28 2:41 ` [PATCH 01/16] KVM: x86/mmu: Exit to userspace with -EFAULT if private fault hits emulation Sean Christopherson
2024-03-01 8:48 ` Xiaoyao Li
2024-03-07 12:52 ` Gupta, Pankaj
2024-03-12 2:59 ` Binbin Wu
2024-04-04 16:38 ` Sean Christopherson
2024-03-08 4:22 ` Yan Zhao
2024-04-04 16:45 ` Sean Christopherson
2024-02-28 2:41 ` [PATCH 02/16] KVM: x86: Remove separate "bit" defines for page fault error code masks Sean Christopherson
2024-02-29 12:44 ` Paolo Bonzini
2024-02-29 18:40 ` Sean Christopherson
2024-02-29 20:56 ` Paolo Bonzini
2024-02-29 13:43 ` Dongli Zhang
2024-02-29 15:25 ` Sean Christopherson
2024-02-28 2:41 ` [PATCH 03/16] KVM: x86: Define more SEV+ page fault error bits/flags for #NPF Sean Christopherson
2024-02-28 4:43 ` Dongli Zhang
2024-02-28 16:16 ` Sean Christopherson
2024-02-28 2:41 ` [PATCH 04/16] KVM: x86/mmu: Pass full 64-bit error code when handling page faults Sean Christopherson
2024-02-28 7:30 ` Dongli Zhang
2024-02-28 16:22 ` Sean Christopherson
2024-02-29 13:32 ` Dongli Zhang
2024-03-05 3:55 ` Xiaoyao Li
2024-02-28 2:41 ` [PATCH 05/16] KVM: x86/mmu: Use synthetic page fault error code to indicate private faults Sean Christopherson
2024-02-29 11:16 ` Huang, Kai
2024-02-29 15:17 ` Sean Christopherson
2024-03-06 9:43 ` Xu Yilun
2024-03-06 14:45 ` Sean Christopherson
2024-03-07 9:05 ` Xu Yilun
2024-03-07 14:36 ` Sean Christopherson
2024-03-12 5:34 ` Binbin Wu
2024-02-28 2:41 ` [PATCH 06/16] KVM: x86/mmu: WARN if upper 32 bits of legacy #PF error code are non-zero Sean Christopherson
2024-02-29 22:11 ` Huang, Kai
2024-02-29 23:07 ` Sean Christopherson [this message]
2024-03-12 5:44 ` Binbin Wu
2024-02-28 2:41 ` [PATCH 07/16] KVM: x86: Move synthetic PFERR_* sanity checks to SVM's #NPF handler Sean Christopherson
2024-02-29 22:19 ` Huang, Kai
2024-02-29 22:52 ` Sean Christopherson
2024-02-29 23:14 ` Huang, Kai
2024-03-12 9:44 ` Binbin Wu
2024-02-28 2:41 ` [PATCH 08/16] KVM: x86/mmu: WARN and skip MMIO cache on private, reserved page faults Sean Christopherson
2024-02-29 22:26 ` Huang, Kai
2024-02-29 23:06 ` Sean Christopherson
2024-02-29 23:21 ` Huang, Kai
2024-03-04 15:51 ` Sean Christopherson
2024-03-05 21:32 ` Huang, Kai
2024-03-06 0:25 ` Sean Christopherson
2024-02-28 2:41 ` [PATCH 09/16] KVM: x86/mmu: Move private vs. shared check above slot validity checks Sean Christopherson
2024-03-05 23:06 ` Huang, Kai
2024-03-06 0:38 ` Sean Christopherson
2024-03-06 1:22 ` Huang, Kai
2024-03-06 2:02 ` Sean Christopherson
2024-03-06 22:06 ` Huang, Kai
2024-03-06 23:49 ` Sean Christopherson
2024-03-07 0:28 ` Huang, Kai
2024-03-08 4:54 ` Xu Yilun
2024-03-08 23:28 ` Sean Christopherson
2024-03-11 4:43 ` Xu Yilun
2024-03-12 0:08 ` Sean Christopherson
2024-02-28 2:41 ` [PATCH 10/16] KVM: x86/mmu: Don't force emulation of L2 accesses to non-APIC internal slots Sean Christopherson
2024-03-07 0:03 ` Huang, Kai
2024-02-28 2:41 ` [PATCH 11/16] KVM: x86/mmu: Explicitly disallow private accesses to emulated MMIO Sean Christopherson
2024-03-06 22:35 ` Huang, Kai
2024-03-06 22:43 ` Sean Christopherson
2024-03-06 22:49 ` Huang, Kai
2024-03-06 23:01 ` Sean Christopherson
2024-03-06 23:20 ` Huang, Kai
2024-03-07 17:10 ` Kirill A. Shutemov
2024-03-08 0:09 ` Huang, Kai
2024-02-28 2:41 ` [PATCH 12/16] KVM: x86/mmu: Move slot checks from __kvm_faultin_pfn() to kvm_faultin_pfn() Sean Christopherson
2024-03-07 0:11 ` Huang, Kai
2024-02-28 2:41 ` [PATCH 13/16] KVM: x86/mmu: Handle no-slot faults at the beginning of kvm_faultin_pfn() Sean Christopherson
2024-03-07 0:48 ` Huang, Kai
2024-03-07 0:53 ` Sean Christopherson
2024-02-28 2:41 ` [PATCH 14/16] KVM: x86/mmu: Set kvm_page_fault.hva to KVM_HVA_ERR_BAD for "no slot" faults Sean Christopherson
2024-03-07 0:50 ` Huang, Kai
2024-03-07 1:01 ` Sean Christopherson
2024-02-28 2:41 ` [PATCH 15/16] KVM: x86/mmu: Initialize kvm_page_fault's pfn and hva to error values Sean Christopherson
2024-03-07 0:46 ` Huang, Kai
2024-02-28 2:41 ` [PATCH 16/16] KVM: x86/mmu: Sanity check that __kvm_faultin_pfn() doesn't create noslot pfns Sean Christopherson
2024-03-07 0:46 ` Huang, Kai
2024-04-17 12:48 ` [PATCH 00/16] KVM: x86/mmu: Page fault and MMIO cleanups Paolo Bonzini
2024-04-18 15:40 ` Sean Christopherson
2024-04-19 6:47 ` Xiaoyao Li
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