From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Cc: hao.wu@intel.com, yilun.xu@intel.com, russell.h.weight@intel.com,
basheer.ahmed.muddebihal@intel.com, trix@redhat.com,
mdf@kernel.org, linux-fpga@vger.kernel.org,
linux-doc@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
tianfei.zhang@intel.com, corbet@lwn.net,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-serial <linux-serial@vger.kernel.org>,
Jiri Slaby <jirislaby@kernel.org>,
geert+renesas@glider.be,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
niklas.soderlund+renesas@ragnatech.se, phil.edworthy@renesas.com,
macro@orcam.me.uk, johan@kernel.org,
Lukas Wunner <lukas@wunner.de>
Subject: Re: [PATCH v2 4/6] fpga: dfl: add generic support for MSIX interrupts
Date: Fri, 23 Sep 2022 17:16:38 +0300 (EEST) [thread overview]
Message-ID: <a602677-78ac-23a0-1a63-96b325595998@linux.intel.com> (raw)
In-Reply-To: <20220923121745.129167-5-matthew.gerlach@linux.intel.com>
On Fri, 23 Sep 2022, matthew.gerlach@linux.intel.com wrote:
> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>
> Define and use a DFHv1 parameter to add generic support for MSIX
> interrupts for DFL devices.
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
> ---
> v2: fix kernel doc
> clarify use of DFH_VERSION field
> ---
> drivers/fpga/dfl.c | 60 +++++++++++++++++++++++++++++++++++++++++----
> include/linux/dfl.h | 14 +++++++++++
> 2 files changed, 69 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> index 1132f3c10440..dfd3f563c92d 100644
> --- a/drivers/fpga/dfl.c
> +++ b/drivers/fpga/dfl.c
> @@ -941,23 +941,22 @@ static int parse_feature_irqs(struct build_feature_devs_info *binfo,
> void __iomem *base = binfo->ioaddr + ofst;
> unsigned int i, ibase, inr = 0;
> enum dfl_id_type type;
> - int virq;
> + int virq, off;
> u64 v;
>
> type = feature_dev_id_type(binfo->feature_dev);
>
> /*
> * Ideally DFL framework should only read info from DFL header, but
> - * current version DFL only provides mmio resources information for
> + * current version, DFHv0, only provides mmio resources information for
> * each feature in DFL Header, no field for interrupt resources.
> * Interrupt resource information is provided by specific mmio
> * registers of each private feature which supports interrupt. So in
> * order to parse and assign irq resources, DFL framework has to look
> * into specific capability registers of these private features.
> *
> - * Once future DFL version supports generic interrupt resource
> - * information in common DFL headers, the generic interrupt parsing
> - * code will be added. But in order to be compatible to old version
> + * DFHv1 supports generic interrupt resource information in DFHv1
> + * parameter blocks. But in order to be compatible to old version
> * DFL, the driver may still fall back to these quirks.
> */
> if (type == PORT_ID) {
> @@ -981,6 +980,36 @@ static int parse_feature_irqs(struct build_feature_devs_info *binfo,
> }
> }
>
> + if (fid != FEATURE_ID_AFU && fid != PORT_FEATURE_ID_ERROR &&
> + fid != PORT_FEATURE_ID_UINT && fid != FME_FEATURE_ID_GLOBAL_ERR) {
> +
> + v = FIELD_GET(DFH_VERSION, readq(base));
I'd call this variable version (or ver) if you want to store it but it
would also fit to switch () line so that no extra variable is needed.
> + switch (v) {
> + case 0:
> + break;
> +
> + case 1:
> + v = readq(base + DFHv1_CSR_SIZE_GRP);
Extra space.
> + if (FIELD_GET(DFHv1_CSR_SIZE_GRP_HAS_PARAMS, v)) {
> + off = dfl_find_param(base + DFHv1_PARAM_HDR, ofst,
> + DFHv1_PARAM_ID_MSIX);
> + if (off >= 0) {
I'd reverse these 2 conditions and break when there's nothing to do.
> + ibase = readl(base + DFHv1_PARAM_HDR +
> + off + DFHv1_PARAM_MSIX_STARTV);
> + inr = readl(base + DFHv1_PARAM_HDR +
> + off + DFHv1_PARAM_MSIX_NUMV);
> + dev_dbg(binfo->dev, "start %d num %d fid 0x%x\n",
> + ibase, inr, fid);
> + }
> + }
> + break;
> +
> + default:
> + dev_warn(binfo->dev, "unexpected DFH version %lld\n", v);
> + break;
> + }
> + }
> +
> if (!inr) {
> *irq_base = 0;
> *nr_irqs = 0;
--
i.
next prev parent reply other threads:[~2022-09-23 14:16 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-23 12:17 [PATCH v2 0/6] Enhance definition of DFH and use enhancements for uart driver matthew.gerlach
2022-09-23 12:17 ` [PATCH v2 1/6] Documentation: fpga: dfl: Add documentation for DFHv1 matthew.gerlach
2022-09-23 14:34 ` Ilpo Järvinen
2022-09-23 14:40 ` Ilpo Järvinen
2022-09-27 12:38 ` matthew.gerlach
2022-09-27 12:54 ` Ilpo Järvinen
2022-09-24 8:29 ` Bagas Sanjaya
2022-09-23 12:17 ` [PATCH v2 2/6] fpga: dfl: Move the DFH definitions matthew.gerlach
2022-09-24 13:00 ` Tom Rix
2022-09-30 5:01 ` Xu Yilun
2022-09-30 14:09 ` matthew.gerlach
2022-09-23 12:17 ` [PATCH v2 3/6] fpga: dfl: Add DFHv1 Register Definitions matthew.gerlach
2022-09-23 12:17 ` [PATCH v2 4/6] fpga: dfl: add generic support for MSIX interrupts matthew.gerlach
2022-09-23 14:16 ` Ilpo Järvinen [this message]
2022-09-26 14:47 ` matthew.gerlach
2022-09-27 6:46 ` Ilpo Järvinen
2022-09-27 12:17 ` matthew.gerlach
2022-09-23 15:21 ` Andy Shevchenko
2022-09-26 15:13 ` matthew.gerlach
2022-09-30 3:28 ` Xu Yilun
2022-10-01 14:50 ` matthew.gerlach
2022-09-23 12:17 ` [PATCH v2 5/6] fpga: dfl: parse the location of the feature's registers from DFHv1 matthew.gerlach
2022-09-23 14:55 ` Ilpo Järvinen
2022-09-23 17:06 ` Muddebihal, Basheer Ahmed
2022-09-30 5:57 ` Xu Yilun
2022-09-23 12:17 ` [PATCH v2 6/6] tty: serial: 8250: add DFL bus driver for Altera 16550 matthew.gerlach
2022-09-23 15:22 ` Andy Shevchenko
2022-09-23 15:34 ` Ilpo Järvinen
2022-09-30 6:07 ` Xu Yilun
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a602677-78ac-23a0-1a63-96b325595998@linux.intel.com \
--to=ilpo.jarvinen@linux.intel.com \
--cc=andriy.shevchenko@linux.intel.com \
--cc=basheer.ahmed.muddebihal@intel.com \
--cc=corbet@lwn.net \
--cc=geert+renesas@glider.be \
--cc=gregkh@linuxfoundation.org \
--cc=hao.wu@intel.com \
--cc=jirislaby@kernel.org \
--cc=johan@kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-fpga@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=lukas@wunner.de \
--cc=macro@orcam.me.uk \
--cc=matthew.gerlach@linux.intel.com \
--cc=mdf@kernel.org \
--cc=niklas.soderlund+renesas@ragnatech.se \
--cc=phil.edworthy@renesas.com \
--cc=russell.h.weight@intel.com \
--cc=tianfei.zhang@intel.com \
--cc=trix@redhat.com \
--cc=yilun.xu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).