linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: John Garry <john.garry@huawei.com>
To: Robin Murphy <robin.murphy@arm.com>,
	Nick Forrington <nick.forrington@arm.com>,
	<linux-kernel@vger.kernel.org>,
	<linux-perf-users@vger.kernel.org>, <acme@kernel.org>
Cc: Will Deacon <will@kernel.org>,
	Mathieu Poirier <mathieu.poirier@linaro.org>,
	Leo Yan <leo.yan@linaro.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>,
	"Namhyung Kim" <namhyung@kernel.org>,
	Andi Kleen <ak@linux.intel.com>, Kajol Jain <kjain@linux.ibm.com>,
	James Clark <james.clark@arm.com>,
	Andrew Kilroy <andrew.kilroy@arm.com>
Subject: Re: [PATCH 00/20] perf vendors events arm64: Multiple Arm CPUs
Date: Wed, 18 May 2022 14:48:17 +0100	[thread overview]
Message-ID: <cf7d8003-9700-880f-0e46-ff40e6348bb1@huawei.com> (raw)
In-Reply-To: <5773b630-8159-1eba-481a-1bf3c406c055@arm.com>

On 18/05/2022 13:32, Robin Murphy wrote:
>> If we were to add to arm32/arm then the common event numbers and maybe 
>> other JSONs in future would need to be duplicated.
>>
>> Would there be any reason to add to arm32/arm apart to from being 
>> strictly proper? Maybe if lots of other 32b support for other vendors 
>> came along then it could make sense (to separate them out).
> 
> That's the heart of the question, really. At best it seems unnecessarily 
> confusing as-is. 

I think it comes down to the first core supported was TX2 and the build 
system relies on the target arch to decide which arch from 
pmu-events/arch to compile.

> AFAICS either the naming isn't functional, wherein it 
> would potentially make the most sense to rename the whole thing 
> "pmu-events/arch/arm" if it's merely for categorising Arm architectures 
> in general, or it is actually tied to the host triplet, in which case 
> the above patches are most likely useless.

Today ARCH=arm has no pmu-events support. I think that it should be easy 
to add plumbing for that. It becomes more tricky with supporting a 
single "arm" folder.

But then do people really care enough about pmu-events for these 32b 
cores? Until now, it seems not.

> 
> I'd agree that there doesn't seem much point in trying to separate 
> things along relatively arbitrary lines if it *isn't* functionally 
> necessary - the PMUv2 common events look to be a straightforward subset 
> of the PMUv3 ones, but then there's Cortex-A32 anyway, plus most of the 
> already-supported CPUs could equally run an AArch32 perf tool as well.

Sure, we should have these 32b cores supported for ARCH=arm if they are 
supported for ARCH=arm64. But then does it even make sense to have A7 
support in arch/arm64?

Thanks,
John

  reply	other threads:[~2022-05-18 13:48 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-10 10:47 [PATCH 00/20] perf vendors events arm64: Multiple Arm CPUs Nick Forrington
2022-05-10 10:47 ` [PATCH 01/20] perf vendors events arm64: Arm Cortex-A5 Nick Forrington
2022-05-12 15:32   ` John Garry
2022-05-10 10:47 ` [PATCH 02/20] perf vendors events arm64: Arm Cortex-A7 Nick Forrington
2022-05-10 10:47 ` [PATCH 03/20] perf vendors events arm64: Arm Cortex-A8 Nick Forrington
2022-05-10 10:47 ` [PATCH 04/20] perf vendors events arm64: Arm Cortex-A9 Nick Forrington
2022-05-10 10:47 ` [PATCH 05/20] perf vendors events arm64: Arm Cortex-A15 Nick Forrington
2022-05-10 10:47 ` [PATCH 06/20] perf vendors events arm64: Arm Cortex-A17 Nick Forrington
2022-05-18 12:58   ` Robin Murphy
2022-05-10 10:47 ` [PATCH 07/20] perf vendors events arm64: Arm Cortex-A32 Nick Forrington
2022-05-10 10:47 ` [PATCH 08/20] perf vendors events arm64: Arm Cortex-A34 Nick Forrington
2022-05-10 10:47 ` [PATCH 09/20] perf vendors events arm64: Arm Cortex-A35 Nick Forrington
2022-05-10 10:47 ` [PATCH 10/20] perf vendors events arm64: Arm Cortex-A55 Nick Forrington
2022-05-10 10:47 ` [PATCH 11/20] perf vendors events arm64: Arm Cortex-A510 Nick Forrington
2022-05-10 10:47 ` [PATCH 12/20] perf vendors events arm64: Arm Cortex-A65 Nick Forrington
2022-05-10 10:47 ` [PATCH 13/20] perf vendors events arm64: Arm Cortex-A73 Nick Forrington
2022-05-10 10:47 ` [PATCH 14/20] perf vendors events arm64: Arm Cortex-A75 Nick Forrington
2022-05-10 10:47 ` [PATCH 15/20] perf vendors events arm64: Arm Cortex-A77 Nick Forrington
2022-05-10 10:47 ` [PATCH 16/20] perf vendors events arm64: Arm Cortex-A78 Nick Forrington
2022-05-10 10:47 ` [PATCH 17/20] perf vendors events arm64: Arm Cortex-A710 Nick Forrington
2022-05-10 10:47 ` [PATCH 18/20] perf vendors events arm64: Arm Cortex-X1 Nick Forrington
2022-05-10 10:47 ` [PATCH 19/20] perf vendors events arm64: Arm Cortex-X2 Nick Forrington
2022-05-10 10:47 ` [PATCH 20/20] perf vendors events arm64: Arm Neoverse E1 Nick Forrington
2022-05-10 15:50 ` [PATCH 00/20] perf vendors events arm64: Multiple Arm CPUs Arnaldo Carvalho de Melo
2022-05-10 15:55   ` John Garry
2022-05-12 13:01     ` Nick Forrington
2022-05-12 15:52       ` John Garry
2022-05-15 22:03         ` Ian Rogers
2022-05-16 11:10           ` John Garry
2022-05-16 20:29             ` Ian Rogers
2022-05-16 18:05           ` Nick Forrington
2022-05-16  9:25         ` Nick Forrington
2022-05-17 14:32 ` Robin Murphy
2022-05-18  8:15   ` John Garry
2022-05-18 12:32     ` Robin Murphy
2022-05-18 13:48       ` John Garry [this message]
2022-05-18 14:14         ` Robin Murphy
2022-05-19  7:59           ` John Garry
2022-05-19 13:50             ` Nick Forrington
2022-05-20 17:28               ` Ian Rogers
2022-05-19 13:42     ` Nick Forrington

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=cf7d8003-9700-880f-0e46-ff40e6348bb1@huawei.com \
    --to=john.garry@huawei.com \
    --cc=acme@kernel.org \
    --cc=ak@linux.intel.com \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=andrew.kilroy@arm.com \
    --cc=james.clark@arm.com \
    --cc=jolsa@kernel.org \
    --cc=kjain@linux.ibm.com \
    --cc=leo.yan@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-perf-users@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mathieu.poirier@linaro.org \
    --cc=mingo@redhat.com \
    --cc=namhyung@kernel.org \
    --cc=nick.forrington@arm.com \
    --cc=peterz@infradead.org \
    --cc=robin.murphy@arm.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).