From: Dmitry Osipenko <digetx@gmail.com>
To: Sameer Pujar <spujar@nvidia.com>,
perex@perex.cz, tiwai@suse.com, robh+dt@kernel.org
Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org,
atalambedu@nvidia.com, linux-kernel@vger.kernel.org,
lgirdwood@gmail.com, jonathanh@nvidia.com, viswanathl@nvidia.com,
sharadg@nvidia.com, broonie@kernel.org, thierry.reding@gmail.com,
linux-tegra@vger.kernel.org, rlokhande@nvidia.com,
mkumard@nvidia.com, dramesh@nvidia.com
Subject: Re: [alsa-devel] [PATCH 2/9] ASoC: tegra: add support for CIF programming
Date: Mon, 20 Jan 2020 18:58:11 +0300 [thread overview]
Message-ID: <d01ed171-d949-19b2-3390-ee30eada2779@gmail.com> (raw)
In-Reply-To: <1579530198-13431-3-git-send-email-spujar@nvidia.com>
Hello Sameer,
20.01.2020 17:23, Sameer Pujar пишет:
[snip]
> Tegra30 and Tegra124 have an identical CIF programming helper function.
[snip]
> -#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT 24
> -#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK_US 0x3f
> -#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK (TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK_US << TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT)
> -
> -/* Channel count minus 1 */
> -#define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT 24
> -#define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK_US 7
> -#define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK (TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK_US << TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT)
The AUDIOCIF_CTRL bitfields are not the same on T30 and T124, why are
you claiming that programming is identical? Have you actually tried to
test these patches on T30?
next prev parent reply other threads:[~2020-01-20 15:58 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-20 14:23 [PATCH 0/9] add ASoC components for AHUB Sameer Pujar
2020-01-20 14:23 ` [PATCH 1/9] dt-bindings: sound: tegra: add DT binding " Sameer Pujar
2020-01-20 14:23 ` [PATCH 2/9] ASoC: tegra: add support for CIF programming Sameer Pujar
2020-01-20 15:58 ` Dmitry Osipenko [this message]
2020-01-21 4:41 ` [alsa-devel] " Sameer Pujar
2020-01-21 16:04 ` Dmitry Osipenko
2020-01-27 5:11 ` Sameer Pujar
2020-01-28 22:40 ` Dmitry Osipenko
2020-01-20 14:23 ` [PATCH 3/9] ASoC: tegra: add Tegra210 based DMIC driver Sameer Pujar
2020-01-20 14:23 ` [PATCH 4/9] ASoC: tegra: add Tegra210 based I2S driver Sameer Pujar
2020-01-21 5:15 ` [alsa-devel] " Dmitry Osipenko
2020-01-21 14:21 ` Sameer Pujar
2020-01-21 16:03 ` Dmitry Osipenko
2020-01-22 4:32 ` Sameer Pujar
2020-01-22 6:23 ` Dmitry Osipenko
2020-01-22 7:16 ` Sameer Pujar
2020-01-22 11:52 ` Jon Hunter
2020-01-22 16:27 ` Dmitry Osipenko
2020-01-23 9:22 ` Sameer Pujar
2020-01-23 15:16 ` Dmitry Osipenko
2020-01-24 9:07 ` Jon Hunter
2020-01-24 9:51 ` Jon Hunter
2020-01-24 14:04 ` Dmitry Osipenko
2020-01-27 5:22 ` Sameer Pujar
2020-01-29 3:41 ` Dmitry Osipenko
2020-02-14 14:05 ` Jon Hunter
2020-02-18 1:00 ` Dmitry Osipenko
2020-02-19 16:10 ` Sameer Pujar
2020-01-22 16:26 ` Dmitry Osipenko
2020-01-20 14:23 ` [PATCH 5/9] ASoC: tegra: add Tegra210 based AHUB driver Sameer Pujar
2020-01-24 1:18 ` [alsa-devel] " Dmitry Osipenko
2020-01-24 3:39 ` Sameer Pujar
2020-01-24 4:28 ` Dmitry Osipenko
2020-01-27 9:45 ` Jon Hunter
2020-01-20 14:23 ` [PATCH 6/9] ASoC: tegra: add Tegra186 based DSPK driver Sameer Pujar
2020-01-20 14:23 ` [PATCH 7/9] ASoC: tegra: add Tegra210 based ADMAIF driver Sameer Pujar
2020-01-24 1:28 ` [alsa-devel] " Dmitry Osipenko
2020-01-24 3:27 ` Sameer Pujar
2020-01-24 4:25 ` Dmitry Osipenko
2020-01-27 5:08 ` Sameer Pujar
2020-01-20 14:23 ` [PATCH 8/9] arm64: tegra: add AHUB components for few Tegra chips Sameer Pujar
2020-01-20 14:23 ` [PATCH 9/9] arm64: tegra: enable AHUB modules " Sameer Pujar
2020-01-28 10:49 ` [PATCH 0/9] add ASoC components for AHUB Sameer Pujar
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