From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: james.hogan@imgtec.com, aurelien@aurel32.net
Subject: [Qemu-devel] [PATCH 12/15] tcg-mips: Use mips64r6 instructions in tcg_out_ldst
Date: Tue, 9 Feb 2016 21:40:00 +1100 [thread overview]
Message-ID: <1455014403-10742-13-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1455014403-10742-1-git-send-email-rth@twiddle.net>
The DAUI, DAHI, and DATI insns can be used to eliminate
one extra instruction in these cases.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/mips/tcg-target.c | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index f7f4331..bda31c2 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -422,6 +422,7 @@ typedef enum {
/* Aliases for convenience. */
ALIAS_PADD = sizeof(void *) == 4 ? OPC_ADDU : OPC_DADDU,
ALIAS_PADDI = sizeof(void *) == 4 ? OPC_ADDIU : OPC_DADDIU,
+ ALIAS_PAUI = sizeof(void *) == 4 ? OPC_AUI : OPC_DAUI,
ALIAS_TSRL = TARGET_LONG_BITS == 32 || TCG_TARGET_REG_BITS == 32
? OPC_SRL : OPC_DSRL,
} MIPSInsn;
@@ -779,9 +780,48 @@ static inline void tcg_out_ext32u(TCGContext *s, TCGReg ret, TCGReg arg)
}
}
+static void tcg_out_r6_ofs(TCGContext *s, MIPSInsn opl, MIPSInsn oph,
+ TCGReg reg0, TCGReg reg1, tcg_target_long ofs)
+{
+ TCGReg scratch = TCG_TMP0;
+ int16_t lo = ofs;
+ int32_t hi = ofs - lo;
+
+ ofs = ofs - hi - lo;
+ if (oph == OPC_DAUI && ofs != 0) {
+ tcg_target_long tmp;
+
+ /* Bits are set in the high 32-bit half. Thus we require th
+ use of DAHI and/or DATI. The R6 manual recommends addition
+ of immediates in order of mid to high (DAUI, DAHI, DATI, OPL)
+ in order to simplify hardware recognizing these sequences. */
+
+ tcg_out_opc_imm(s, OPC_DAUI, scratch, reg1, hi >> 16);
+
+ tmp = ofs >> 16 >> 16;
+ if (tmp & 0xffff) {
+ tcg_out_opc_imm(s, OPC_DAHI, scratch, 0, tmp);
+ }
+ tmp = (tmp - (int16_t)tmp) >> 16;
+ if (tmp) {
+ tcg_out_opc_imm(s, OPC_DATI, scratch, 0, tmp);
+ }
+ reg1 = scratch;
+ } else if (hi != 0) {
+ tcg_out_opc_imm(s, oph, scratch, reg1, hi >> 16);
+ reg1 = scratch;
+ }
+ tcg_out_opc_imm(s, opc, reg0, reg1, lo);
+}
+
static void tcg_out_ldst(TCGContext *s, MIPSInsn opc, TCGReg data,
TCGReg addr, intptr_t ofs)
{
+ if (use_mips32r6_instructions) {
+ tcg_out_r6_ofs(s, opc, ALIAS_PAUI, data, addr, ofs);
+ return;
+ }
+
int16_t lo = ofs;
if (ofs != lo) {
tcg_out_movi(s, TCG_TYPE_PTR, TCG_TMP0, ofs - lo);
--
2.5.0
next prev parent reply other threads:[~2016-02-09 10:40 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-09 10:39 [Qemu-devel] [PATCH 00/15] tcg mips64 and mipsr6 improvements Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 01/15] tcg-mips: Add mips64 opcodes Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 02/15] tcg-mips: Support 64-bit opcodes Richard Henderson
2016-02-09 15:24 ` James Hogan
2016-02-09 17:16 ` Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 03/15] tcg-mips: Adjust move functions for mips64 Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 04/15] tcg-mips: Adjust load/store " Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 05/15] tcg-mips: Adjust prologue " Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 06/15] tcg-mips: Add tcg unwind info Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 07/15] tcg-mips: Adjust qemu_ld/st for mips64 Richard Henderson
2016-02-10 16:34 ` James Hogan
2016-02-10 17:35 ` Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 08/15] tcg-mips: Adjust calling conventions " Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 09/15] tcg-mips: Fix exit_tb " Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 10/15] tcg-mips: Move bswap code to subroutines Richard Henderson
2016-02-09 10:39 ` [Qemu-devel] [PATCH 11/15] tcg-mips: Use mips64r6 instructions in tcg_out_movi Richard Henderson
2016-02-09 16:50 ` James Hogan
2016-02-09 17:20 ` Richard Henderson
2016-02-09 17:25 ` Richard Henderson
2016-02-10 0:32 ` James Hogan
2016-02-09 10:40 ` Richard Henderson [this message]
2016-02-09 10:40 ` [Qemu-devel] [PATCH 13/15] tcg-mips: Use mips64r6 instructions in constant addition Richard Henderson
2016-02-09 10:40 ` [Qemu-devel] [PATCH 14/15] tcg-mips: Use mipsr6 instructions in branches Richard Henderson
2016-02-09 16:22 ` James Hogan
2016-02-09 17:13 ` Richard Henderson
2016-02-09 18:46 ` Maciej W. Rozycki
2016-02-10 0:20 ` James Hogan
2016-02-09 10:40 ` [Qemu-devel] [PATCH 15/15] tcg-mips: Use mipsr6 instructions in calls Richard Henderson
2016-02-10 12:49 ` James Hogan
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