Re: [PATCH v4 7/7] hw/ppc/e500: Add Freescale eSDHC to e500plat

[Daniel Henrique Barboza <danielhb413@gmail.com>]

On 10/18/22 18:01, Bernhard Beschow wrote:
> Adds missing functionality to e500plat machine which increases the
> chance of given "real" firmware images to access SD cards.
> 
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>

>   docs/system/ppc/ppce500.rst | 12 ++++++++++++
>   hw/ppc/Kconfig              |  1 +
>   hw/ppc/e500.c               | 35 ++++++++++++++++++++++++++++++++++-
>   hw/ppc/e500.h               |  1 +
>   hw/ppc/e500plat.c           |  1 +
>   5 files changed, 49 insertions(+), 1 deletion(-)
> 
> diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst
> index 38f8ceb0cf..c9fe0915dc 100644
> --- a/docs/system/ppc/ppce500.rst
> +++ b/docs/system/ppc/ppce500.rst
> @@ -19,6 +19,7 @@ The ``ppce500`` machine supports the following devices:
>   * Power-off functionality via one GPIO pin
>   * 1 Freescale MPC8xxx PCI host controller
>   * VirtIO devices via PCI bus
> +* 1 Freescale Enhanced Secure Digital Host controller (eSDHC)
>   * 1 Freescale Enhanced Triple Speed Ethernet controller (eTSEC)
>   
>   Hardware configuration information
> @@ -181,3 +182,14 @@ as follows:
>         -drive if=pflash,file=/path/to/rootfs.ext2,format=raw \
>         -append "rootwait root=/dev/mtdblock0"
>   
> +Alternatively, the root file system can also reside on an emulated SD card
> +whose size must again be a power of two:
> +
> +.. code-block:: bash
> +
> +  $ qemu-system-ppc64 -M ppce500 -cpu e500mc -smp 4 -m 2G \
> +      -display none -serial stdio \
> +      -kernel vmlinux \
> +      -device sd-card,drive=mydrive \
> +      -drive id=mydrive,if=none,file=/path/to/rootfs.ext2,format=raw \
> +      -append "rootwait root=/dev/mmcblk0"
> diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
> index 769a1ead1c..6e31f568ba 100644
> --- a/hw/ppc/Kconfig
> +++ b/hw/ppc/Kconfig
> @@ -129,6 +129,7 @@ config E500
>       select PFLASH_CFI01
>       select PLATFORM_BUS
>       select PPCE500_PCI
> +    select SDHCI
>       select SERIAL
>       select MPC_I2C
>       select FDT_PPC
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index 73198adac8..15d1f5ea00 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -48,6 +48,7 @@
>   #include "hw/net/fsl_etsec/etsec.h"
>   #include "hw/i2c/i2c.h"
>   #include "hw/irq.h"
> +#include "hw/sd/sdhci.h"
>   
>   #define EPAPR_MAGIC                (0x45504150)
>   #define DTC_LOAD_PAD               0x1800000
> @@ -66,11 +67,14 @@
>   #define MPC8544_SERIAL1_REGS_OFFSET 0x4600ULL
>   #define MPC8544_PCI_REGS_OFFSET    0x8000ULL
>   #define MPC8544_PCI_REGS_SIZE      0x1000ULL
> +#define MPC85XX_ESDHC_REGS_OFFSET  0x2e000ULL
> +#define MPC85XX_ESDHC_REGS_SIZE    0x1000ULL
>   #define MPC8544_UTIL_OFFSET        0xe0000ULL
>   #define MPC8XXX_GPIO_OFFSET        0x000FF000ULL
>   #define MPC8544_I2C_REGS_OFFSET    0x3000ULL
>   #define MPC8XXX_GPIO_IRQ           47
>   #define MPC8544_I2C_IRQ            43
> +#define MPC85XX_ESDHC_IRQ          72
>   #define RTC_REGS_OFFSET            0x68
>   
>   #define PLATFORM_CLK_FREQ_HZ       (400 * 1000 * 1000)
> @@ -203,6 +207,22 @@ static void dt_i2c_create(void *fdt, const char *soc, const char *mpic,
>       g_free(i2c);
>   }
>   
> +static void dt_sdhc_create(void *fdt, const char *parent, const char *mpic)
> +{
> +    hwaddr mmio = MPC85XX_ESDHC_REGS_OFFSET;
> +    hwaddr size = MPC85XX_ESDHC_REGS_SIZE;
> +    int irq = MPC85XX_ESDHC_IRQ;
> +    g_autofree char *name = NULL;
> +
> +    name = g_strdup_printf("%s/sdhc@%" PRIx64, parent, mmio);
> +    qemu_fdt_add_subnode(fdt, name);
> +    qemu_fdt_setprop(fdt, name, "sdhci,auto-cmd12", NULL, 0);
> +    qemu_fdt_setprop_phandle(fdt, name, "interrupt-parent", mpic);
> +    qemu_fdt_setprop_cells(fdt, name, "bus-width", 4);
> +    qemu_fdt_setprop_cells(fdt, name, "interrupts", irq, 0x2);
> +    qemu_fdt_setprop_cells(fdt, name, "reg", mmio, size);
> +    qemu_fdt_setprop_string(fdt, name, "compatible", "fsl,esdhc");
> +}
>   
>   typedef struct PlatformDevtreeData {
>       void *fdt;
> @@ -553,6 +573,10 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
>   
>       dt_rtc_create(fdt, "i2c", "rtc");
>   
> +    /* sdhc */
> +    if (pmc->has_esdhc) {
> +        dt_sdhc_create(fdt, soc, mpic);
> +    }
>   
>       gutil = g_strdup_printf("%s/global-utilities@%llx", soc,
>                               MPC8544_UTIL_OFFSET);
> @@ -982,7 +1006,8 @@ void ppce500_init(MachineState *machine)
>                          0, qdev_get_gpio_in(mpicdev, 42), 399193,
>                          serial_hd(1), DEVICE_BIG_ENDIAN);
>       }
> -        /* I2C */
> +
> +    /* I2C */
>       dev = qdev_new("mpc-i2c");
>       s = SYS_BUS_DEVICE(dev);
>       sysbus_realize_and_unref(s, &error_fatal);
> @@ -992,6 +1017,14 @@ void ppce500_init(MachineState *machine)
>       i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
>       i2c_slave_create_simple(i2c, "ds1338", RTC_REGS_OFFSET);
>   
> +    /* eSDHC */
> +    if (pmc->has_esdhc) {
> +        dev = qdev_new(TYPE_FSL_ESDHC);
> +        s = SYS_BUS_DEVICE(dev);
> +        sysbus_realize_and_unref(s, &error_fatal);
> +        sysbus_mmio_map(s, 0, pmc->ccsrbar_base + MPC85XX_ESDHC_REGS_OFFSET);
> +        sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC85XX_ESDHC_IRQ));
> +    }
>   
>       /* General Utility device */
>       dev = qdev_new("mpc8544-guts");
> diff --git a/hw/ppc/e500.h b/hw/ppc/e500.h
> index 68f754ce50..8c09ef92e4 100644
> --- a/hw/ppc/e500.h
> +++ b/hw/ppc/e500.h
> @@ -27,6 +27,7 @@ struct PPCE500MachineClass {
>   
>       int mpic_version;
>       bool has_mpc8xxx_gpio;
> +    bool has_esdhc;
>       hwaddr platform_bus_base;
>       hwaddr platform_bus_size;
>       int platform_bus_first_irq;
> diff --git a/hw/ppc/e500plat.c b/hw/ppc/e500plat.c
> index 5bb1c603da..44bf874b0f 100644
> --- a/hw/ppc/e500plat.c
> +++ b/hw/ppc/e500plat.c
> @@ -86,6 +86,7 @@ static void e500plat_machine_class_init(ObjectClass *oc, void *data)
>       pmc->fixup_devtree = e500plat_fixup_devtree;
>       pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_42;
>       pmc->has_mpc8xxx_gpio = true;
> +    pmc->has_esdhc = true;
>       pmc->platform_bus_base = 0xf00000000ULL;
>       pmc->platform_bus_size = 128 * MiB;
>       pmc->platform_bus_first_irq = 5;