From: Claudiu <claudiu.beznea@tuxon.dev> To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, magnus.damm@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, claudiu.beznea@tuxon.dev, Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Subject: [PATCH 12/17] arm64: dts: renesas: rzg3s-smarc-som: Guard the ethernet IRQ GPIOs with proper flags Date: Thu, 8 Feb 2024 14:42:55 +0200 [thread overview] Message-ID: <20240208124300.2740313-13-claudiu.beznea.uj@bp.renesas.com> (raw) In-Reply-To: <20240208124300.2740313-1-claudiu.beznea.uj@bp.renesas.com> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Ethernet IRQ GPIOs are marked as gpio-hog. Thus, these GPIOs are requested at probe w/o considering if there are other peripherals that needs them. The Ethernet IRQ GPIOs are shared w/ SDHI2. Selection b/w Ethernet and SDHI2 is done through a hardware switch. To avoid scenarios where one wants to boot with SDHI2 support and some SDHI pins are not propertly configured because of gpio-hog guard Ethernet IRQ GPIO with proper build flag. Fixes: 932ff0c802c6 ("arm64: dts: renesas: rzg3s-smarc-som: Enable the Ethernet interfaces") Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> --- arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 2b7fa5817d58..acac4666ae59 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -193,12 +193,14 @@ &sdhi2 { #endif &pinctrl { +#if SW_CONFIG3 == SW_ON eth0-phy-irq-hog { gpio-hog; gpios = <RZG2L_GPIO(12, 0) GPIO_ACTIVE_LOW>; input; line-name = "eth0-phy-irq"; }; +#endif eth0_pins: eth0 { txc { @@ -234,12 +236,14 @@ mux { }; }; +#if SW_CONFIG3 == SW_ON eth1-phy-irq-hog { gpio-hog; gpios = <RZG2L_GPIO(12, 1) GPIO_ACTIVE_LOW>; input; line-name = "eth1-phy-irq"; }; +#endif eth1_pins: eth1 { txc { -- 2.39.2
WARNING: multiple messages have this Message-ID (diff)
From: Claudiu <claudiu.beznea@tuxon.dev> To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, magnus.damm@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, claudiu.beznea@tuxon.dev, Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Subject: [PATCH 12/17] arm64: dts: renesas: rzg3s-smarc-som: Guard the ethernet IRQ GPIOs with proper flags Date: Thu, 8 Feb 2024 14:42:55 +0200 [thread overview] Message-ID: <20240208124300.2740313-13-claudiu.beznea.uj@bp.renesas.com> (raw) In-Reply-To: <20240208124300.2740313-1-claudiu.beznea.uj@bp.renesas.com> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Ethernet IRQ GPIOs are marked as gpio-hog. Thus, these GPIOs are requested at probe w/o considering if there are other peripherals that needs them. The Ethernet IRQ GPIOs are shared w/ SDHI2. Selection b/w Ethernet and SDHI2 is done through a hardware switch. To avoid scenarios where one wants to boot with SDHI2 support and some SDHI pins are not propertly configured because of gpio-hog guard Ethernet IRQ GPIO with proper build flag. Fixes: 932ff0c802c6 ("arm64: dts: renesas: rzg3s-smarc-som: Enable the Ethernet interfaces") Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> --- arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi index 2b7fa5817d58..acac4666ae59 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -193,12 +193,14 @@ &sdhi2 { #endif &pinctrl { +#if SW_CONFIG3 == SW_ON eth0-phy-irq-hog { gpio-hog; gpios = <RZG2L_GPIO(12, 0) GPIO_ACTIVE_LOW>; input; line-name = "eth0-phy-irq"; }; +#endif eth0_pins: eth0 { txc { @@ -234,12 +236,14 @@ mux { }; }; +#if SW_CONFIG3 == SW_ON eth1-phy-irq-hog { gpio-hog; gpios = <RZG2L_GPIO(12, 1) GPIO_ACTIVE_LOW>; input; line-name = "eth1-phy-irq"; }; +#endif eth1_pins: eth1 { txc { -- 2.39.2 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2024-02-08 12:44 UTC|newest] Thread overview: 120+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-02-08 12:42 [PATCH 00/17] clk: renesas: rzg2l: Add support for power domains Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-08 12:42 ` [PATCH 01/17] dt-bindings: clock: r9a07g043-cpg: Add power domain IDs Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-08 14:30 ` Biju Das 2024-02-08 14:30 ` Biju Das 2024-02-08 15:45 ` claudiu beznea 2024-02-08 15:45 ` claudiu beznea 2024-02-08 16:28 ` Biju Das 2024-02-08 16:28 ` Biju Das 2024-02-08 16:53 ` claudiu beznea 2024-02-08 16:53 ` claudiu beznea 2024-02-08 19:20 ` Biju Das 2024-02-08 19:20 ` Biju Das 2024-02-12 8:02 ` claudiu beznea 2024-02-12 8:02 ` claudiu beznea 2024-02-12 8:59 ` Biju Das 2024-02-12 8:59 ` Biju Das 2024-02-12 10:17 ` claudiu beznea 2024-02-12 10:17 ` claudiu beznea 2024-02-12 10:32 ` Biju Das 2024-02-12 10:32 ` Biju Das 2024-02-12 11:08 ` claudiu beznea 2024-02-12 11:08 ` claudiu beznea 2024-02-16 14:01 ` Geert Uytterhoeven 2024-02-16 14:01 ` Geert Uytterhoeven 2024-02-19 7:36 ` claudiu beznea 2024-02-19 7:36 ` claudiu beznea 2024-02-08 12:42 ` [PATCH 02/17] dt-bindings: clock: r9a07g044-cpg: " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-08 14:39 ` Biju Das 2024-02-08 14:39 ` Biju Das 2024-02-08 15:55 ` claudiu beznea 2024-02-08 15:55 ` claudiu beznea 2024-02-16 14:02 ` Geert Uytterhoeven 2024-02-16 14:02 ` Geert Uytterhoeven 2024-02-08 12:42 ` [PATCH 03/17] dt-bindings: clock: r9a07g054-cpg: " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:02 ` Geert Uytterhoeven 2024-02-16 14:02 ` Geert Uytterhoeven 2024-02-08 12:42 ` [PATCH 04/17] dt-bindings: clock: r9a08g045-cpg: " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:03 ` Geert Uytterhoeven 2024-02-16 14:03 ` Geert Uytterhoeven 2024-02-08 12:42 ` [PATCH 05/17] dt-bindings: clock: r9a09g011-cpg: Add always-on " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:03 ` Geert Uytterhoeven 2024-02-16 14:03 ` Geert Uytterhoeven 2024-02-19 7:39 ` claudiu beznea 2024-02-19 7:39 ` claudiu beznea 2024-02-08 12:42 ` [PATCH 06/17] dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = <1> Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-09 7:56 ` Krzysztof Kozlowski 2024-02-09 7:56 ` Krzysztof Kozlowski 2024-02-09 11:57 ` claudiu beznea 2024-02-09 11:57 ` claudiu beznea 2024-02-16 14:04 ` Geert Uytterhoeven 2024-02-16 14:04 ` Geert Uytterhoeven 2024-02-19 8:18 ` claudiu beznea 2024-02-19 8:18 ` claudiu beznea 2024-02-08 12:42 ` [PATCH 07/17] clk: renesas: rzg2l: Extend power domain support Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:08 ` Geert Uytterhoeven 2024-02-16 14:08 ` Geert Uytterhoeven 2024-02-19 8:24 ` claudiu beznea 2024-02-19 8:24 ` claudiu beznea 2024-02-19 8:48 ` Geert Uytterhoeven 2024-02-19 8:48 ` Geert Uytterhoeven 2024-02-19 9:04 ` claudiu beznea 2024-02-19 9:04 ` claudiu beznea 2024-02-20 19:32 ` Geert Uytterhoeven 2024-02-20 19:32 ` Geert Uytterhoeven 2024-02-21 6:14 ` claudiu beznea 2024-02-21 6:14 ` claudiu beznea 2024-02-08 12:42 ` [PATCH 08/17] clk: renesas: r9a07g043: Add initial support for power domains Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:09 ` Geert Uytterhoeven 2024-02-16 14:09 ` Geert Uytterhoeven 2024-02-19 8:25 ` claudiu beznea 2024-02-19 8:25 ` claudiu beznea 2024-02-08 12:42 ` [PATCH 09/17] clk: renesas: r9a07g044: " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:09 ` Geert Uytterhoeven 2024-02-16 14:09 ` Geert Uytterhoeven 2024-02-08 12:42 ` [PATCH 10/17] clk: renesas: r9a08g045: Add " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:10 ` Geert Uytterhoeven 2024-02-16 14:10 ` Geert Uytterhoeven 2024-02-21 13:35 ` claudiu beznea 2024-02-21 13:35 ` claudiu beznea 2024-02-08 12:42 ` [PATCH 11/17] clk: renesas: r9a09g011: Add initial " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:10 ` Geert Uytterhoeven 2024-02-16 14:10 ` Geert Uytterhoeven 2024-02-08 12:42 ` Claudiu [this message] 2024-02-08 12:42 ` [PATCH 12/17] arm64: dts: renesas: rzg3s-smarc-som: Guard the ethernet IRQ GPIOs with proper flags Claudiu 2024-02-16 14:17 ` Geert Uytterhoeven 2024-02-16 14:17 ` Geert Uytterhoeven 2024-02-19 8:29 ` claudiu beznea 2024-02-19 8:29 ` claudiu beznea 2024-02-08 12:42 ` [PATCH 13/17] arm64: dts: renesas: r9a07g043: Update #power-domain-cells = <1> Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:11 ` Geert Uytterhoeven 2024-02-16 14:11 ` Geert Uytterhoeven 2024-02-08 12:42 ` [PATCH 14/17] arm64: dts: renesas: r9a07g044: " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:11 ` Geert Uytterhoeven 2024-02-16 14:11 ` Geert Uytterhoeven 2024-02-08 12:42 ` [PATCH 15/17] arm64: dts: renesas: r9a07g054: " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:11 ` Geert Uytterhoeven 2024-02-16 14:11 ` Geert Uytterhoeven 2024-02-08 12:42 ` [PATCH 16/17] arm64: dts: renesas: r9a08g045: " Claudiu 2024-02-08 12:42 ` Claudiu 2024-02-16 14:12 ` Geert Uytterhoeven 2024-02-16 14:12 ` Geert Uytterhoeven 2024-02-08 12:43 ` [PATCH 17/17] arm64: dts: renesas: r9a09g011: " Claudiu 2024-02-08 12:43 ` Claudiu 2024-02-16 14:12 ` Geert Uytterhoeven 2024-02-16 14:12 ` Geert Uytterhoeven
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