From: Greentime Hu <greentime.hu@sifive.com> To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, palmer@dabbelt.com, paul.walmsley@sifive.com, vincent.chen@sifive.com Subject: [RFC PATCH v8 19/21] riscv: Allocate space for vector registers in start_thread() Date: Thu, 9 Sep 2021 01:45:31 +0800 [thread overview] Message-ID: <5d99eab37a683d21e0cec75bfcec96ad8b480d02.1631121222.git.greentime.hu@sifive.com> (raw) In-Reply-To: <cover.1631121222.git.greentime.hu@sifive.com> It allocates memory space for vector registers in start_thread() instead of allocating in vstate_restore() in this patch. We can allocate memory here so that it will be more readable. Co-developed-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Greentime Hu <greentime.hu@sifive.com> --- arch/riscv/include/asm/switch_to.h | 7 +------ arch/riscv/kernel/process.c | 15 +++++++++++++-- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index de0573dad78f..b48c9c974564 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -103,12 +103,6 @@ static inline void vstate_restore(struct task_struct *task, { if ((regs->status & SR_VS) != SR_VS_OFF) { struct __riscv_v_state *vstate = &(task->thread.vstate); - - /* Allocate space for vector registers. */ - if (!vstate->datap) { - vstate->datap = kzalloc(riscv_vsize, GFP_ATOMIC); - vstate->size = riscv_vsize; - } __vstate_restore(vstate, vstate->datap); __vstate_clean(regs); } @@ -127,6 +121,7 @@ static inline void __switch_to_vector(struct task_struct *prev, #else #define has_vector false +#define riscv_vsize (0) #define vstate_save(task, regs) do { } while (0) #define vstate_restore(task, regs) do { } while (0) #define __switch_to_vector(__prev, __next) do { } while (0) diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 0b86e9e531c9..05ff5f934e7e 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -97,7 +97,16 @@ void start_thread(struct pt_regs *regs, unsigned long pc, } if (has_vector) { + struct __riscv_v_state *vstate = &(current->thread.vstate); + + /* Enable vector and allocate memory for vector registers. */ + if (!vstate->datap) { + vstate->datap = kzalloc(riscv_vsize, GFP_KERNEL); + if (WARN_ON(!vstate->datap)) + return; + } regs->status |= SR_VS_INITIAL; + /* * Restore the initial value to the vector register * before starting the user program. @@ -121,9 +130,11 @@ void flush_thread(void) memset(¤t->thread.fstate, 0, sizeof(current->thread.fstate)); #endif #ifdef CONFIG_VECTOR - /* Reset vector state */ + /* Reset vector state and keep datap pointer. */ vstate_off(current, task_pt_regs(current)); - memset(¤t->thread.vstate, 0, sizeof(current->thread.vstate)); + memset(¤t->thread.vstate, 0, RISCV_V_STATE_DATAP); + if (current->thread.vstate.datap) + memset(current->thread.vstate.datap, 0, riscv_vsize); #endif } -- 2.31.1
WARNING: multiple messages have this Message-ID (diff)
From: Greentime Hu <greentime.hu@sifive.com> To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, palmer@dabbelt.com, paul.walmsley@sifive.com, vincent.chen@sifive.com Subject: [RFC PATCH v8 19/21] riscv: Allocate space for vector registers in start_thread() Date: Thu, 9 Sep 2021 01:45:31 +0800 [thread overview] Message-ID: <5d99eab37a683d21e0cec75bfcec96ad8b480d02.1631121222.git.greentime.hu@sifive.com> (raw) In-Reply-To: <cover.1631121222.git.greentime.hu@sifive.com> It allocates memory space for vector registers in start_thread() instead of allocating in vstate_restore() in this patch. We can allocate memory here so that it will be more readable. Co-developed-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Greentime Hu <greentime.hu@sifive.com> --- arch/riscv/include/asm/switch_to.h | 7 +------ arch/riscv/kernel/process.c | 15 +++++++++++++-- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index de0573dad78f..b48c9c974564 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -103,12 +103,6 @@ static inline void vstate_restore(struct task_struct *task, { if ((regs->status & SR_VS) != SR_VS_OFF) { struct __riscv_v_state *vstate = &(task->thread.vstate); - - /* Allocate space for vector registers. */ - if (!vstate->datap) { - vstate->datap = kzalloc(riscv_vsize, GFP_ATOMIC); - vstate->size = riscv_vsize; - } __vstate_restore(vstate, vstate->datap); __vstate_clean(regs); } @@ -127,6 +121,7 @@ static inline void __switch_to_vector(struct task_struct *prev, #else #define has_vector false +#define riscv_vsize (0) #define vstate_save(task, regs) do { } while (0) #define vstate_restore(task, regs) do { } while (0) #define __switch_to_vector(__prev, __next) do { } while (0) diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index 0b86e9e531c9..05ff5f934e7e 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -97,7 +97,16 @@ void start_thread(struct pt_regs *regs, unsigned long pc, } if (has_vector) { + struct __riscv_v_state *vstate = &(current->thread.vstate); + + /* Enable vector and allocate memory for vector registers. */ + if (!vstate->datap) { + vstate->datap = kzalloc(riscv_vsize, GFP_KERNEL); + if (WARN_ON(!vstate->datap)) + return; + } regs->status |= SR_VS_INITIAL; + /* * Restore the initial value to the vector register * before starting the user program. @@ -121,9 +130,11 @@ void flush_thread(void) memset(¤t->thread.fstate, 0, sizeof(current->thread.fstate)); #endif #ifdef CONFIG_VECTOR - /* Reset vector state */ + /* Reset vector state and keep datap pointer. */ vstate_off(current, task_pt_regs(current)); - memset(¤t->thread.vstate, 0, sizeof(current->thread.vstate)); + memset(¤t->thread.vstate, 0, RISCV_V_STATE_DATAP); + if (current->thread.vstate.datap) + memset(current->thread.vstate.datap, 0, riscv_vsize); #endif } -- 2.31.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-09-08 17:46 UTC|newest] Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-08 17:45 [RFC PATCH v8 00/21] riscv: Add vector ISA support Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 01/21] riscv: Separate patch for cflags and aflags Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 02/21] riscv: Rename __switch_to_aux -> fpu Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 03/21] riscv: Extending cpufeature.c to detect V-extension Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 04/21] riscv: Add new csr defines related to vector extension Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 05/21] riscv: Add vector feature to compile Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 06/21] riscv: Add has_vector/riscv_vsize to save vector features Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 07/21] riscv: Reset vector register Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 08/21] riscv: Add vector struct and assembler definitions Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 09/21] riscv: Add task switch support for vector Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 20:47 ` kernel test robot 2021-09-08 20:47 ` kernel test robot 2021-09-13 12:21 ` Darius Rad 2021-09-13 12:21 ` Darius Rad 2021-09-28 14:56 ` Greentime Hu 2021-09-28 14:56 ` Greentime Hu 2021-09-29 13:28 ` Darius Rad 2021-09-29 13:28 ` Darius Rad 2021-10-01 2:46 ` Ley Foon Tan 2021-10-01 2:46 ` Ley Foon Tan 2021-10-04 12:41 ` Greentime Hu 2021-10-04 12:41 ` Greentime Hu 2021-10-05 2:12 ` Ley Foon Tan 2021-10-05 2:12 ` Ley Foon Tan 2021-10-05 15:46 ` Greentime Hu 2021-10-05 15:46 ` Greentime Hu 2021-10-07 10:10 ` Ley Foon Tan 2021-10-07 10:10 ` Ley Foon Tan 2021-10-04 12:36 ` Greentime Hu 2021-10-04 12:36 ` Greentime Hu 2021-10-05 13:57 ` Darius Rad 2021-10-05 13:57 ` Darius Rad 2021-10-21 1:01 ` Paul Walmsley 2021-10-21 1:01 ` Paul Walmsley 2021-10-21 10:50 ` Darius Rad 2021-10-21 10:50 ` Darius Rad 2021-10-22 3:52 ` Vincent Chen 2021-10-22 3:52 ` Vincent Chen 2021-10-22 10:40 ` Darius Rad 2021-10-22 10:40 ` Darius Rad 2021-10-25 4:47 ` Greentime Hu 2021-10-25 4:47 ` Greentime Hu 2021-10-25 16:22 ` Darius Rad 2021-10-25 16:22 ` Darius Rad 2021-10-26 4:44 ` Greentime Hu 2021-10-26 4:44 ` Greentime Hu 2021-10-27 12:58 ` Darius Rad 2021-10-27 12:58 ` Darius Rad 2021-11-09 9:49 ` Greentime Hu 2021-11-09 9:49 ` Greentime Hu 2021-11-09 19:21 ` Darius Rad 2021-11-09 19:21 ` Darius Rad 2021-10-26 14:58 ` Heiko Stübner 2021-10-26 14:58 ` Heiko Stübner 2021-09-08 17:45 ` [RFC PATCH v8 10/21] riscv: Add ptrace vector support Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 11/21] riscv: Add sigcontext save/restore for vector Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-30 2:37 ` Ley Foon Tan 2021-09-30 2:37 ` Ley Foon Tan 2021-09-08 17:45 ` [RFC PATCH v8 12/21] riscv: signal: Report signal frame size to userspace via auxv Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 13/21] riscv: Add support for kernel mode vector Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-09 6:17 ` Christoph Hellwig 2021-09-09 6:17 ` Christoph Hellwig 2021-09-08 17:45 ` [RFC PATCH v8 14/21] riscv: Use CSR_STATUS to replace sstatus in vector.S Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 15/21] riscv: Add vector extension XOR implementation Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-09 6:12 ` Christoph Hellwig 2021-09-09 6:12 ` Christoph Hellwig 2021-09-28 7:00 ` Greentime Hu 2021-09-28 7:00 ` Greentime Hu 2021-09-14 8:29 ` Ley Foon Tan 2021-09-14 8:29 ` Ley Foon Tan 2021-09-28 7:01 ` Greentime Hu 2021-09-28 7:01 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 16/21] riscv: Initialize vector registers with proper vsetvli then it can work normally Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 17/21] riscv: Optimize vector registers initialization Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 18/21] riscv: Fix an illegal instruction exception when accessing vlenb without enable vector first Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-08 17:45 ` Greentime Hu [this message] 2021-09-08 17:45 ` [RFC PATCH v8 19/21] riscv: Allocate space for vector registers in start_thread() Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 20/21] riscv: Optimize task switch codes of vector Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-15 14:29 ` Jisheng Zhang 2021-09-15 14:29 ` Jisheng Zhang 2021-10-04 14:13 ` Greentime Hu 2021-10-04 14:13 ` Greentime Hu 2021-09-08 17:45 ` [RFC PATCH v8 21/21] riscv: Turn has_vector into a static key if VECTOR=y Greentime Hu 2021-09-08 17:45 ` Greentime Hu 2021-09-15 14:24 ` Jisheng Zhang 2021-09-15 14:24 ` Jisheng Zhang 2021-10-04 15:04 ` Greentime Hu 2021-10-04 15:04 ` Greentime Hu 2021-09-13 1:47 ` [RFC PATCH v8 00/21] riscv: Add vector ISA support Vincent Chen 2021-09-13 1:47 ` Vincent Chen 2021-09-13 17:18 ` Vineet Gupta 2021-09-13 17:18 ` Vineet Gupta
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