Re: [PATCH u-boot-marvell 00/10] PCI mvebu and aardvark changes

["Pali Rohár" <pali@kernel.org>]

On Wednesday 15 December 2021 09:10:50 Stefan Roese wrote:
> Hi Pali,
> 
> On 12/13/21 11:27, Pali Rohár wrote:
> > On Monday 13 December 2021 08:41:30 Stefan Roese wrote:
> > > Hi Pali,
> > > 
> > > On 12/12/21 12:23, Pali Rohár wrote:
> > > > On Thursday 11 November 2021 16:35:39 Marek Behún wrote:
> > > > > From: Marek Behún <marek.behun@nic.cz>
> > > > > 
> > > > > Hello Stefan,
> > > > > 
> > > > > we have some more fixes for PCI (mvebu and aardvark), and one patch
> > > > > for Turris MOX board code.
> > > > > 
> > > > > Marek
> > > > 
> > > > Hello Stefan, patches 1, 2 and 7 still needs some modifications. But
> > > > other remaining patches should be OK. Would you merge remaining patches?
> > > > And then we can focus on issues with link initialization.
> > > 
> > > Sure, I can pull the "remaining patches" into next (for master it's too
> > > late in the release cycle) if this helps. Just let me know and I'll go
> > > through the patch queue in the next days to push more Marvell related
> > > patches into next.
> > 
> > Ok. But please consider applying patches 5, 6 and 9 to master as they
> > have Fixes tag for commits which are already in master branch.
> 
> Okay, thanks for the reminder. The Azure world build is running. So I'll
> send the pull request for these 3 patches most likely later today.

Hello and thank you! Could you include patches prepared for next into
some branch, so I can prepare new patches on top of that branch to so
patches would be correctly rebased?

> Thanks,
> Stefan
> 
> 
> > > Thanks,
> > > Stefan
> > > 
> > > > > Marek Behún (2):
> > > > >     pci: pci_mvebu, pci_aardvark: Fix size of configuration cache
> > > > >     arm: mvebu: turris_mox: Remove extra newline after module topology
> > > > > 
> > > > > Pali Rohár (8):
> > > > >     pci: pci_mvebu: Wait 100ms for Link Up in mvebu_pcie_probe()
> > > > >     arm: mvebu: a38x: serdes: Move non-serdes PCIe code to pci_mvebu.c
> > > > >     pci: pci_mvebu: Move setup for BAR[0] where other BARs are setup
> > > > >     pci: pci_mvebu: Replace MBUS_PCI_*_SIZE by resource_size()
> > > > >     pci: pci_mvebu: Do not allow setting ROM BAR on PCI Bridge
> > > > >     pci: pci_mvebu: Fix PCIe MEM and IO resources assignment and mbus
> > > > >       mapping
> > > > >     pci: pci_mvebu: Remove unused DECLARE_GLOBAL_DATA_PTR
> > > > >     arm: a37xx: pci: Do not allow setting ROM BAR on PCI Bridge
> > > > > 
> > > > >    arch/arm/mach-mvebu/include/mach/cpu.h        |   4 +-
> > > > >    arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h    |   4 -
> > > > >    .../serdes/a38x/high_speed_env_spec.c         |  15 --
> > > > >    board/CZ.NIC/turris_mox/turris_mox.c          |   3 -
> > > > >    drivers/pci/pci-aardvark.c                    |  54 +++--
> > > > >    drivers/pci/pci_mvebu.c                       | 205 ++++++++++++------
> > > > >    6 files changed, 175 insertions(+), 110 deletions(-)
> > > > > 
> > > > > -- 
> > > > > 2.32.0
> > > > > 
> > > 
> > > Viele Grüße,
> > > Stefan Roese
> > > 
> > > -- 
> > > DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> > > Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
> 
> Viele Grüße,
> Stefan Roese
> 
> -- 
> DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de