[PATCH 1/3] net: mvpp2: Replace PHY_INTERFACE_MODE_SGMII_2500 with SGMII and speed

[PATCH 1/3] net: mvpp2: Replace PHY_INTERFACE_MODE_SGMII_2500 with SGMII and speed

[Marek Vasut]

Replace PHY_INTERFACE_MODE_SGMII_2500 with PHY_INTERFACE_MODE_SGMII and
phydev->speed check where applicable. The PHY_INTERFACE_MODE_SGMII_2500
does not exist in Linux, so remove it from U-Boot too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: "Ariel D'Alessandro" <ariel.dalessandro@collabora.com>
Cc: "Marek Behún" <kabel@kernel.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Marek Vasut <marek.vasut+renesas@mailbox.org>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
---
 drivers/net/mvpp2.c | 18 ++++++------------
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 1bad50d344c..71347b7e69c 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -2871,7 +2871,6 @@ static void mvpp2_port_mii_set(struct mvpp2_port *port)
 
 	switch (port->phy_interface) {
 	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_SGMII_2500:
 		val |= MVPP2_GMAC_INBAND_AN_MASK;
 		break;
 	case PHY_INTERFACE_MODE_1000BASEX:
@@ -2939,7 +2938,6 @@ static void mvpp2_port_loopback_set(struct mvpp2_port *port)
 		val &= ~MVPP2_GMAC_GMII_LB_EN_MASK;
 
 	if (port->phy_interface == PHY_INTERFACE_MODE_SGMII ||
-	    port->phy_interface == PHY_INTERFACE_MODE_SGMII_2500 ||
 	    port->phy_interface == PHY_INTERFACE_MODE_1000BASEX ||
 	    port->phy_interface == PHY_INTERFACE_MODE_2500BASEX)
 		val |= MVPP2_GMAC_PCS_LB_EN_MASK;
@@ -3237,10 +3235,12 @@ static int gop_gmac_mode_cfg(struct mvpp2_port *port)
 	/* Set TX FIFO thresholds */
 	switch (port->phy_interface) {
 	case PHY_INTERFACE_MODE_SGMII:
-		gop_gmac_sgmii_cfg(port);
-		break;
-	case PHY_INTERFACE_MODE_SGMII_2500:
-		gop_gmac_sgmii2_5_cfg(port);
+		if (port->speed == SPEED_1000)
+			gop_gmac_sgmii_cfg(port);
+		else if (port->speed == 2500)
+			gop_gmac_sgmii2_5_cfg(port);
+		else
+			return -1;
 		break;
 	case PHY_INTERFACE_MODE_1000BASEX:
 		gop_gmac_1000basex_cfg(port);
@@ -3422,7 +3422,6 @@ static int gop_port_init(struct mvpp2_port *port)
 		break;
 
 	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_SGMII_2500:
 	case PHY_INTERFACE_MODE_1000BASEX:
 	case PHY_INTERFACE_MODE_2500BASEX:
 		/* configure PCS */
@@ -3482,7 +3481,6 @@ static void gop_port_enable(struct mvpp2_port *port, int enable)
 	case PHY_INTERFACE_MODE_RGMII:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_SGMII_2500:
 	case PHY_INTERFACE_MODE_1000BASEX:
 	case PHY_INTERFACE_MODE_2500BASEX:
 		if (enable)
@@ -3519,7 +3517,6 @@ static u32 mvpp2_netc_cfg_create(int gop_id, phy_interface_t phy_type)
 
 	if (gop_id == 2) {
 		if (phy_type == PHY_INTERFACE_MODE_SGMII ||
-		    phy_type == PHY_INTERFACE_MODE_SGMII_2500 ||
 		    phy_type == PHY_INTERFACE_MODE_1000BASEX ||
 		    phy_type == PHY_INTERFACE_MODE_2500BASEX)
 			val |= MV_NETC_GE_MAC2_SGMII;
@@ -3530,7 +3527,6 @@ static u32 mvpp2_netc_cfg_create(int gop_id, phy_interface_t phy_type)
 
 	if (gop_id == 3) {
 		if (phy_type == PHY_INTERFACE_MODE_SGMII ||
-		    phy_type == PHY_INTERFACE_MODE_SGMII_2500 ||
 		    phy_type == PHY_INTERFACE_MODE_1000BASEX ||
 		    phy_type == PHY_INTERFACE_MODE_2500BASEX)
 			val |= MV_NETC_GE_MAC3_SGMII;
@@ -4529,7 +4525,6 @@ static void mvpp2_start_dev(struct mvpp2_port *port)
 	case PHY_INTERFACE_MODE_RGMII:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_SGMII_2500:
 	case PHY_INTERFACE_MODE_1000BASEX:
 	case PHY_INTERFACE_MODE_2500BASEX:
 		mvpp2_gmac_max_rx_size_set(port);
@@ -5263,7 +5258,6 @@ static int mvpp2_start(struct udevice *dev)
 	case PHY_INTERFACE_MODE_RGMII:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_SGMII:
-	case PHY_INTERFACE_MODE_SGMII_2500:
 	case PHY_INTERFACE_MODE_1000BASEX:
 	case PHY_INTERFACE_MODE_2500BASEX:
 		mvpp2_port_power_up(port);
-- 
2.39.2

[PATCH 2/3] net: mvpp2: Replace PHY_INTERFACE_MODE_SFI with 5GBASER/10GBASER/XAUI

[Marek Vasut]

Replace PHY_INTERFACE_MODE_SFI with PHY_INTERFACE_MODE_5GBASER,
PHY_INTERFACE_MODE_10GBASER and PHY_INTERFACE_MODE_XAUI to match
Linux PHY interface modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: "Ariel D'Alessandro" <ariel.dalessandro@collabora.com>
Cc: "Marek Behún" <kabel@kernel.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Marek Vasut <marek.vasut+renesas@mailbox.org>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
---
 drivers/net/mvpp2.c     | 8 ++++++--
 include/phy_interface.h | 2 ++
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index 71347b7e69c..096b8a35853 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -3438,7 +3438,9 @@ static int gop_port_init(struct mvpp2_port *port)
 		gop_gmac_reset(port, 0);
 		break;
 
-	case PHY_INTERFACE_MODE_SFI:
+	case PHY_INTERFACE_MODE_10GBASER:
+	case PHY_INTERFACE_MODE_5GBASER:
+	case PHY_INTERFACE_MODE_XAUI:
 		num_of_act_lanes = 2;
 		mac_num = 0;
 		/* configure PCS */
@@ -3489,7 +3491,9 @@ static void gop_port_enable(struct mvpp2_port *port, int enable)
 			mvpp2_port_disable(port);
 		break;
 
-	case PHY_INTERFACE_MODE_SFI:
+	case PHY_INTERFACE_MODE_10GBASER:
+	case PHY_INTERFACE_MODE_5GBASER:
+	case PHY_INTERFACE_MODE_XAUI:
 		gop_xlg_mac_port_enable(port, enable);
 
 		break;
diff --git a/include/phy_interface.h b/include/phy_interface.h
index fed3357b9a2..52af7e612b6 100644
--- a/include/phy_interface.h
+++ b/include/phy_interface.h
@@ -31,6 +31,7 @@ typedef enum {
 	PHY_INTERFACE_MODE_XGMII,
 	PHY_INTERFACE_MODE_XAUI,
 	PHY_INTERFACE_MODE_RXAUI,
+	PHY_INTERFACE_MODE_5GBASER,
 	PHY_INTERFACE_MODE_SFI,
 	PHY_INTERFACE_MODE_INTERNAL,
 	PHY_INTERFACE_MODE_25G_AUI,
@@ -62,6 +63,7 @@ static const char * const phy_interface_strings[] = {
 	[PHY_INTERFACE_MODE_XGMII]		= "xgmii",
 	[PHY_INTERFACE_MODE_XAUI]		= "xaui",
 	[PHY_INTERFACE_MODE_RXAUI]		= "rxaui",
+	[PHY_INTERFACE_MODE_5GBASER]		= "5gbase-r",
 	[PHY_INTERFACE_MODE_SFI]		= "sfi",
 	[PHY_INTERFACE_MODE_INTERNAL]		= "internal",
 	[PHY_INTERFACE_MODE_25G_AUI]		= "25g-aui",
-- 
2.39.2

Re: [PATCH 2/3] net: mvpp2: Replace PHY_INTERFACE_MODE_SFI with 5GBASER/10GBASER/XAUI

[Ramon Fried]

On Sun, Mar 19, 2023 at 7:07 PM Marek Vasut
<marek.vasut+renesas@mailbox.org> wrote:
>
> Replace PHY_INTERFACE_MODE_SFI with PHY_INTERFACE_MODE_5GBASER,
> PHY_INTERFACE_MODE_10GBASER and PHY_INTERFACE_MODE_XAUI to match
> Linux PHY interface modes.
>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
> ---
> Cc: "Ariel D'Alessandro" <ariel.dalessandro@collabora.com>
> Cc: "Marek Behún" <kabel@kernel.org>
> Cc: Joe Hershberger <joe.hershberger@ni.com>
> Cc: Marek Vasut <marek.vasut+renesas@mailbox.org>
> Cc: Ramon Fried <rfried.dev@gmail.com>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Tim Harvey <tharvey@gateworks.com>
> Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---
>  drivers/net/mvpp2.c     | 8 ++++++--
>  include/phy_interface.h | 2 ++
>  2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
> index 71347b7e69c..096b8a35853 100644
> --- a/drivers/net/mvpp2.c
> +++ b/drivers/net/mvpp2.c
> @@ -3438,7 +3438,9 @@ static int gop_port_init(struct mvpp2_port *port)
>                 gop_gmac_reset(port, 0);
>                 break;
>
> -       case PHY_INTERFACE_MODE_SFI:
> +       case PHY_INTERFACE_MODE_10GBASER:
> +       case PHY_INTERFACE_MODE_5GBASER:
> +       case PHY_INTERFACE_MODE_XAUI:
>                 num_of_act_lanes = 2;
>                 mac_num = 0;
>                 /* configure PCS */
> @@ -3489,7 +3491,9 @@ static void gop_port_enable(struct mvpp2_port *port, int enable)
>                         mvpp2_port_disable(port);
>                 break;
>
> -       case PHY_INTERFACE_MODE_SFI:
> +       case PHY_INTERFACE_MODE_10GBASER:
> +       case PHY_INTERFACE_MODE_5GBASER:
> +       case PHY_INTERFACE_MODE_XAUI:
>                 gop_xlg_mac_port_enable(port, enable);
>
>                 break;
> diff --git a/include/phy_interface.h b/include/phy_interface.h
> index fed3357b9a2..52af7e612b6 100644
> --- a/include/phy_interface.h
> +++ b/include/phy_interface.h
> @@ -31,6 +31,7 @@ typedef enum {
>         PHY_INTERFACE_MODE_XGMII,
>         PHY_INTERFACE_MODE_XAUI,
>         PHY_INTERFACE_MODE_RXAUI,
> +       PHY_INTERFACE_MODE_5GBASER,
>         PHY_INTERFACE_MODE_SFI,
>         PHY_INTERFACE_MODE_INTERNAL,
>         PHY_INTERFACE_MODE_25G_AUI,
> @@ -62,6 +63,7 @@ static const char * const phy_interface_strings[] = {
>         [PHY_INTERFACE_MODE_XGMII]              = "xgmii",
>         [PHY_INTERFACE_MODE_XAUI]               = "xaui",
>         [PHY_INTERFACE_MODE_RXAUI]              = "rxaui",
> +       [PHY_INTERFACE_MODE_5GBASER]            = "5gbase-r",
>         [PHY_INTERFACE_MODE_SFI]                = "sfi",
>         [PHY_INTERFACE_MODE_INTERNAL]           = "internal",
>         [PHY_INTERFACE_MODE_25G_AUI]            = "25g-aui",
> --
> 2.39.2
>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>

[PATCH 3/3] net: phy: Synchronize PHY interface modes with Linux

[Marek Vasut]

Synchronize PHY interface modes with Linux next 6.2.y commit:
0194b64578e90 ("net: phy: improve phy_read_poll_timeout")

Retain LX2160A/LX2162A PHY modes as those are not yet supported
by the Linux kernel, but isolate those with ifdeffery.

Isolate NCSI which are also not supported by Linux kernel. Note
that the ifdeffery cannot be avoided with IS_ENABLED() here due
to compilation of the entire conditional, which would fail in
case NCSI symbols are not available.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Cc: "Ariel D'Alessandro" <ariel.dalessandro@collabora.com>
Cc: "Marek Behún" <kabel@kernel.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Marek Vasut <marek.vasut+renesas@mailbox.org>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
---
 drivers/net/phy/phy.c   |  4 +++
 include/phy_interface.h | 68 +++++++++++++++++++++++++++++------------
 2 files changed, 53 insertions(+), 19 deletions(-)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 9b0e497f223..f720d0a7920 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -1160,7 +1160,11 @@ int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val
 
 bool phy_interface_is_ncsi(void)
 {
+#ifdef CONFIG_PHY_NCSI
 	struct eth_pdata *pdata = dev_get_plat(eth_get_dev());
 
 	return pdata->phy_interface == PHY_INTERFACE_MODE_NCSI;
+#else
+	return 0;
+#endif
 }
diff --git a/include/phy_interface.h b/include/phy_interface.h
index 52af7e612b6..31be3228c7c 100644
--- a/include/phy_interface.h
+++ b/include/phy_interface.h
@@ -14,65 +14,95 @@
 
 typedef enum {
 	PHY_INTERFACE_MODE_NA, /* don't touch */
+	PHY_INTERFACE_MODE_INTERNAL,
 	PHY_INTERFACE_MODE_MII,
 	PHY_INTERFACE_MODE_GMII,
 	PHY_INTERFACE_MODE_SGMII,
-	PHY_INTERFACE_MODE_SGMII_2500,
-	PHY_INTERFACE_MODE_QSGMII,
 	PHY_INTERFACE_MODE_TBI,
+	PHY_INTERFACE_MODE_REVMII,
 	PHY_INTERFACE_MODE_RMII,
+	PHY_INTERFACE_MODE_REVRMII,
 	PHY_INTERFACE_MODE_RGMII,
 	PHY_INTERFACE_MODE_RGMII_ID,
 	PHY_INTERFACE_MODE_RGMII_RXID,
 	PHY_INTERFACE_MODE_RGMII_TXID,
 	PHY_INTERFACE_MODE_RTBI,
+	PHY_INTERFACE_MODE_SMII,
+	PHY_INTERFACE_MODE_XGMII,
+	PHY_INTERFACE_MODE_XLGMII,
+	PHY_INTERFACE_MODE_MOCA,
+	PHY_INTERFACE_MODE_QSGMII,
+	PHY_INTERFACE_MODE_TRGMII,
+	PHY_INTERFACE_MODE_100BASEX,
 	PHY_INTERFACE_MODE_1000BASEX,
 	PHY_INTERFACE_MODE_2500BASEX,
-	PHY_INTERFACE_MODE_XGMII,
-	PHY_INTERFACE_MODE_XAUI,
-	PHY_INTERFACE_MODE_RXAUI,
 	PHY_INTERFACE_MODE_5GBASER,
-	PHY_INTERFACE_MODE_SFI,
-	PHY_INTERFACE_MODE_INTERNAL,
+	PHY_INTERFACE_MODE_RXAUI,
+	PHY_INTERFACE_MODE_XAUI,
+	/* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
+	PHY_INTERFACE_MODE_10GBASER,
+	PHY_INTERFACE_MODE_25GBASER,
+	PHY_INTERFACE_MODE_USXGMII,
+	/* 10GBASE-KR - with Clause 73 AN */
+	PHY_INTERFACE_MODE_10GKR,
+	PHY_INTERFACE_MODE_QUSGMII,
+	PHY_INTERFACE_MODE_1000BASEKX,
+#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
+	/* LX2160A SERDES modes */
 	PHY_INTERFACE_MODE_25G_AUI,
 	PHY_INTERFACE_MODE_XLAUI,
 	PHY_INTERFACE_MODE_CAUI2,
 	PHY_INTERFACE_MODE_CAUI4,
+#endif
+#if defined(CONFIG_PHY_NCSI)
 	PHY_INTERFACE_MODE_NCSI,
-	PHY_INTERFACE_MODE_10GBASER,
-	PHY_INTERFACE_MODE_USXGMII,
+#endif
 	PHY_INTERFACE_MODE_MAX,
 } phy_interface_t;
 
 static const char * const phy_interface_strings[] = {
-	[PHY_INTERFACE_MODE_NA]		= "",
+	[PHY_INTERFACE_MODE_NA]			= "",
+	[PHY_INTERFACE_MODE_INTERNAL]		= "internal",
 	[PHY_INTERFACE_MODE_MII]		= "mii",
 	[PHY_INTERFACE_MODE_GMII]		= "gmii",
 	[PHY_INTERFACE_MODE_SGMII]		= "sgmii",
-	[PHY_INTERFACE_MODE_SGMII_2500]		= "sgmii-2500",
-	[PHY_INTERFACE_MODE_QSGMII]		= "qsgmii",
 	[PHY_INTERFACE_MODE_TBI]		= "tbi",
+	[PHY_INTERFACE_MODE_REVMII]		= "rev-mii",
 	[PHY_INTERFACE_MODE_RMII]		= "rmii",
+	[PHY_INTERFACE_MODE_REVRMII]		= "rev-rmii",
 	[PHY_INTERFACE_MODE_RGMII]		= "rgmii",
 	[PHY_INTERFACE_MODE_RGMII_ID]		= "rgmii-id",
 	[PHY_INTERFACE_MODE_RGMII_RXID]		= "rgmii-rxid",
 	[PHY_INTERFACE_MODE_RGMII_TXID]		= "rgmii-txid",
 	[PHY_INTERFACE_MODE_RTBI]		= "rtbi",
+	[PHY_INTERFACE_MODE_SMII]		= "smii",
+	[PHY_INTERFACE_MODE_XGMII]		= "xgmii",
+	[PHY_INTERFACE_MODE_XLGMII]		= "xlgmii",
+	[PHY_INTERFACE_MODE_MOCA]		= "moca",
+	[PHY_INTERFACE_MODE_QSGMII]		= "qsgmii",
+	[PHY_INTERFACE_MODE_TRGMII]		= "trgmii",
 	[PHY_INTERFACE_MODE_1000BASEX]		= "1000base-x",
+	[PHY_INTERFACE_MODE_1000BASEKX]		= "1000base-kx",
 	[PHY_INTERFACE_MODE_2500BASEX]		= "2500base-x",
-	[PHY_INTERFACE_MODE_XGMII]		= "xgmii",
-	[PHY_INTERFACE_MODE_XAUI]		= "xaui",
-	[PHY_INTERFACE_MODE_RXAUI]		= "rxaui",
 	[PHY_INTERFACE_MODE_5GBASER]		= "5gbase-r",
-	[PHY_INTERFACE_MODE_SFI]		= "sfi",
-	[PHY_INTERFACE_MODE_INTERNAL]		= "internal",
+	[PHY_INTERFACE_MODE_RXAUI]		= "rxaui",
+	[PHY_INTERFACE_MODE_XAUI]		= "xaui",
+	[PHY_INTERFACE_MODE_10GBASER]		= "10gbase-r",
+	[PHY_INTERFACE_MODE_25GBASER]		= "25gbase-r",
+	[PHY_INTERFACE_MODE_USXGMII]		= "usxgmii",
+	[PHY_INTERFACE_MODE_10GKR]		= "10gbase-kr",
+	[PHY_INTERFACE_MODE_100BASEX]		= "100base-x",
+	[PHY_INTERFACE_MODE_QUSGMII]		= "qusgmii",
+#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
+	/* LX2160A SERDES modes */
 	[PHY_INTERFACE_MODE_25G_AUI]		= "25g-aui",
 	[PHY_INTERFACE_MODE_XLAUI]		= "xlaui4",
 	[PHY_INTERFACE_MODE_CAUI2]		= "caui2",
 	[PHY_INTERFACE_MODE_CAUI4]		= "caui4",
+#endif
+#if defined(CONFIG_PHY_NCSI)
 	[PHY_INTERFACE_MODE_NCSI]		= "NC-SI",
-	[PHY_INTERFACE_MODE_10GBASER]		= "10gbase-r",
-	[PHY_INTERFACE_MODE_USXGMII]		= "usxgmii",
+#endif
 };
 
 /* Backplane modes:
-- 
2.39.2

Re: [PATCH 3/3] net: phy: Synchronize PHY interface modes with Linux

[Ramon Fried]

On Sun, Mar 19, 2023 at 7:07 PM Marek Vasut
<marek.vasut+renesas@mailbox.org> wrote:
>
> Synchronize PHY interface modes with Linux next 6.2.y commit:
> 0194b64578e90 ("net: phy: improve phy_read_poll_timeout")
>
> Retain LX2160A/LX2162A PHY modes as those are not yet supported
> by the Linux kernel, but isolate those with ifdeffery.
>
> Isolate NCSI which are also not supported by Linux kernel. Note
> that the ifdeffery cannot be avoided with IS_ENABLED() here due
> to compilation of the entire conditional, which would fail in
> case NCSI symbols are not available.
>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
> ---
> Cc: "Ariel D'Alessandro" <ariel.dalessandro@collabora.com>
> Cc: "Marek Behún" <kabel@kernel.org>
> Cc: Joe Hershberger <joe.hershberger@ni.com>
> Cc: Marek Vasut <marek.vasut+renesas@mailbox.org>
> Cc: Ramon Fried <rfried.dev@gmail.com>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Tim Harvey <tharvey@gateworks.com>
> Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
> ---
>  drivers/net/phy/phy.c   |  4 +++
>  include/phy_interface.h | 68 +++++++++++++++++++++++++++++------------
>  2 files changed, 53 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
> index 9b0e497f223..f720d0a7920 100644
> --- a/drivers/net/phy/phy.c
> +++ b/drivers/net/phy/phy.c
> @@ -1160,7 +1160,11 @@ int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val
>
>  bool phy_interface_is_ncsi(void)
>  {
> +#ifdef CONFIG_PHY_NCSI
>         struct eth_pdata *pdata = dev_get_plat(eth_get_dev());
>
>         return pdata->phy_interface == PHY_INTERFACE_MODE_NCSI;
> +#else
> +       return 0;
> +#endif
>  }
> diff --git a/include/phy_interface.h b/include/phy_interface.h
> index 52af7e612b6..31be3228c7c 100644
> --- a/include/phy_interface.h
> +++ b/include/phy_interface.h
> @@ -14,65 +14,95 @@
>
>  typedef enum {
>         PHY_INTERFACE_MODE_NA, /* don't touch */
> +       PHY_INTERFACE_MODE_INTERNAL,
>         PHY_INTERFACE_MODE_MII,
>         PHY_INTERFACE_MODE_GMII,
>         PHY_INTERFACE_MODE_SGMII,
> -       PHY_INTERFACE_MODE_SGMII_2500,
> -       PHY_INTERFACE_MODE_QSGMII,
>         PHY_INTERFACE_MODE_TBI,
> +       PHY_INTERFACE_MODE_REVMII,
>         PHY_INTERFACE_MODE_RMII,
> +       PHY_INTERFACE_MODE_REVRMII,
>         PHY_INTERFACE_MODE_RGMII,
>         PHY_INTERFACE_MODE_RGMII_ID,
>         PHY_INTERFACE_MODE_RGMII_RXID,
>         PHY_INTERFACE_MODE_RGMII_TXID,
>         PHY_INTERFACE_MODE_RTBI,
> +       PHY_INTERFACE_MODE_SMII,
> +       PHY_INTERFACE_MODE_XGMII,
> +       PHY_INTERFACE_MODE_XLGMII,
> +       PHY_INTERFACE_MODE_MOCA,
> +       PHY_INTERFACE_MODE_QSGMII,
> +       PHY_INTERFACE_MODE_TRGMII,
> +       PHY_INTERFACE_MODE_100BASEX,
>         PHY_INTERFACE_MODE_1000BASEX,
>         PHY_INTERFACE_MODE_2500BASEX,
> -       PHY_INTERFACE_MODE_XGMII,
> -       PHY_INTERFACE_MODE_XAUI,
> -       PHY_INTERFACE_MODE_RXAUI,
>         PHY_INTERFACE_MODE_5GBASER,
> -       PHY_INTERFACE_MODE_SFI,
> -       PHY_INTERFACE_MODE_INTERNAL,
> +       PHY_INTERFACE_MODE_RXAUI,
> +       PHY_INTERFACE_MODE_XAUI,
> +       /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
> +       PHY_INTERFACE_MODE_10GBASER,
> +       PHY_INTERFACE_MODE_25GBASER,
> +       PHY_INTERFACE_MODE_USXGMII,
> +       /* 10GBASE-KR - with Clause 73 AN */
> +       PHY_INTERFACE_MODE_10GKR,
> +       PHY_INTERFACE_MODE_QUSGMII,
> +       PHY_INTERFACE_MODE_1000BASEKX,
> +#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
> +       /* LX2160A SERDES modes */
>         PHY_INTERFACE_MODE_25G_AUI,
>         PHY_INTERFACE_MODE_XLAUI,
>         PHY_INTERFACE_MODE_CAUI2,
>         PHY_INTERFACE_MODE_CAUI4,
> +#endif
> +#if defined(CONFIG_PHY_NCSI)
>         PHY_INTERFACE_MODE_NCSI,
> -       PHY_INTERFACE_MODE_10GBASER,
> -       PHY_INTERFACE_MODE_USXGMII,
> +#endif
>         PHY_INTERFACE_MODE_MAX,
>  } phy_interface_t;
>
>  static const char * const phy_interface_strings[] = {
> -       [PHY_INTERFACE_MODE_NA]         = "",
> +       [PHY_INTERFACE_MODE_NA]                 = "",
> +       [PHY_INTERFACE_MODE_INTERNAL]           = "internal",
>         [PHY_INTERFACE_MODE_MII]                = "mii",
>         [PHY_INTERFACE_MODE_GMII]               = "gmii",
>         [PHY_INTERFACE_MODE_SGMII]              = "sgmii",
> -       [PHY_INTERFACE_MODE_SGMII_2500]         = "sgmii-2500",
> -       [PHY_INTERFACE_MODE_QSGMII]             = "qsgmii",
>         [PHY_INTERFACE_MODE_TBI]                = "tbi",
> +       [PHY_INTERFACE_MODE_REVMII]             = "rev-mii",
>         [PHY_INTERFACE_MODE_RMII]               = "rmii",
> +       [PHY_INTERFACE_MODE_REVRMII]            = "rev-rmii",
>         [PHY_INTERFACE_MODE_RGMII]              = "rgmii",
>         [PHY_INTERFACE_MODE_RGMII_ID]           = "rgmii-id",
>         [PHY_INTERFACE_MODE_RGMII_RXID]         = "rgmii-rxid",
>         [PHY_INTERFACE_MODE_RGMII_TXID]         = "rgmii-txid",
>         [PHY_INTERFACE_MODE_RTBI]               = "rtbi",
> +       [PHY_INTERFACE_MODE_SMII]               = "smii",
> +       [PHY_INTERFACE_MODE_XGMII]              = "xgmii",
> +       [PHY_INTERFACE_MODE_XLGMII]             = "xlgmii",
> +       [PHY_INTERFACE_MODE_MOCA]               = "moca",
> +       [PHY_INTERFACE_MODE_QSGMII]             = "qsgmii",
> +       [PHY_INTERFACE_MODE_TRGMII]             = "trgmii",
>         [PHY_INTERFACE_MODE_1000BASEX]          = "1000base-x",
> +       [PHY_INTERFACE_MODE_1000BASEKX]         = "1000base-kx",
>         [PHY_INTERFACE_MODE_2500BASEX]          = "2500base-x",
> -       [PHY_INTERFACE_MODE_XGMII]              = "xgmii",
> -       [PHY_INTERFACE_MODE_XAUI]               = "xaui",
> -       [PHY_INTERFACE_MODE_RXAUI]              = "rxaui",
>         [PHY_INTERFACE_MODE_5GBASER]            = "5gbase-r",
> -       [PHY_INTERFACE_MODE_SFI]                = "sfi",
> -       [PHY_INTERFACE_MODE_INTERNAL]           = "internal",
> +       [PHY_INTERFACE_MODE_RXAUI]              = "rxaui",
> +       [PHY_INTERFACE_MODE_XAUI]               = "xaui",
> +       [PHY_INTERFACE_MODE_10GBASER]           = "10gbase-r",
> +       [PHY_INTERFACE_MODE_25GBASER]           = "25gbase-r",
> +       [PHY_INTERFACE_MODE_USXGMII]            = "usxgmii",
> +       [PHY_INTERFACE_MODE_10GKR]              = "10gbase-kr",
> +       [PHY_INTERFACE_MODE_100BASEX]           = "100base-x",
> +       [PHY_INTERFACE_MODE_QUSGMII]            = "qusgmii",
> +#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
> +       /* LX2160A SERDES modes */
>         [PHY_INTERFACE_MODE_25G_AUI]            = "25g-aui",
>         [PHY_INTERFACE_MODE_XLAUI]              = "xlaui4",
>         [PHY_INTERFACE_MODE_CAUI2]              = "caui2",
>         [PHY_INTERFACE_MODE_CAUI4]              = "caui4",
> +#endif
> +#if defined(CONFIG_PHY_NCSI)
>         [PHY_INTERFACE_MODE_NCSI]               = "NC-SI",
> -       [PHY_INTERFACE_MODE_10GBASER]           = "10gbase-r",
> -       [PHY_INTERFACE_MODE_USXGMII]            = "usxgmii",
> +#endif
>  };
>
>  /* Backplane modes:
> --
> 2.39.2
>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>

Re: [PATCH 1/3] net: mvpp2: Replace PHY_INTERFACE_MODE_SGMII_2500 with SGMII and speed

[Marek Behún]

On Sun, 19 Mar 2023 18:06:45 +0100
Marek Vasut <marek.vasut+renesas@mailbox.org> wrote:

> Replace PHY_INTERFACE_MODE_SGMII_2500 with PHY_INTERFACE_MODE_SGMII and
> phydev->speed check where applicable. The PHY_INTERFACE_MODE_SGMII_2500
> does not exist in Linux, so remove it from U-Boot too.
> 
> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

SGMII cannot operate on 2500mbps. As I explained to the author who added
PHY_INTERFACE_MODE_SGMII_2500 to U-Boot (and the conversation didn't lead
anywhere then), what I think happened here is that for some reason
Marvell sometimes calls 2500base-x mode SGMII_2500. Meaning that they
incorrectly interchange the names 2500base-x and sgmii_2500 as if they
were the same thing. This is probably due to how 1000base-x and SGMII
are similar and they do the same with those.

The thing is, 1000base-x and SGMII are different protocols / interface
modes. The difference is that they have different autonegotiation. SGMII
allows also for speed autonegotiation, whilst 1000base-x only for flow
control. The bits in the clause 37 link ability advertisement word have
different meaning for 1000base-x than for sgmii.

When SGMII negotiates lower speed, the actual serdes frequency does not
change. The lower speed of 100mbps or 10mbps is achieved by repeating
the word 10 or 100 times.

The 2500base-x mode works the same way as 1000base-x mode, but at 2.5x
the frequency. Calling it sgmii-2500 is wrong because it would mean that
it also allows for lower speeds by repeating the words. In reality it
is possible, on many controllers you can set SGMII mode at 2.5x normal
frequency and then instead of 1000/100/10mbps speeds achieve
2500/250/25mbps. But this is not standardized anyway.

Marek, your patch does a good thing getting rid of the sgmii-2500
constant, but you are still leaving the possibility of 2500mbps speed
in SGMII mode...

Marek

Re: [PATCH 1/3] net: mvpp2: Replace PHY_INTERFACE_MODE_SGMII_2500 with SGMII and speed

[Marek Vasut]

On 3/19/23 20:45, Marek Behún wrote:
> On Sun, 19 Mar 2023 18:06:45 +0100
> Marek Vasut <marek.vasut+renesas@mailbox.org> wrote:
> 
>> Replace PHY_INTERFACE_MODE_SGMII_2500 with PHY_INTERFACE_MODE_SGMII and
>> phydev->speed check where applicable. The PHY_INTERFACE_MODE_SGMII_2500
>> does not exist in Linux, so remove it from U-Boot too.
>>
>> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
> 
> SGMII cannot operate on 2500mbps. As I explained to the author who added
> PHY_INTERFACE_MODE_SGMII_2500 to U-Boot (and the conversation didn't lead
> anywhere then), what I think happened here is that for some reason
> Marvell sometimes calls 2500base-x mode SGMII_2500. Meaning that they
> incorrectly interchange the names 2500base-x and sgmii_2500 as if they
> were the same thing. This is probably due to how 1000base-x and SGMII
> are similar and they do the same with those.
> 
> The thing is, 1000base-x and SGMII are different protocols / interface
> modes. The difference is that they have different autonegotiation. SGMII
> allows also for speed autonegotiation, whilst 1000base-x only for flow
> control. The bits in the clause 37 link ability advertisement word have
> different meaning for 1000base-x than for sgmii.
> 
> When SGMII negotiates lower speed, the actual serdes frequency does not
> change. The lower speed of 100mbps or 10mbps is achieved by repeating
> the word 10 or 100 times.
> 
> The 2500base-x mode works the same way as 1000base-x mode, but at 2.5x
> the frequency. Calling it sgmii-2500 is wrong because it would mean that
> it also allows for lower speeds by repeating the words. In reality it
> is possible, on many controllers you can set SGMII mode at 2.5x normal
> frequency and then instead of 1000/100/10mbps speeds achieve
> 2500/250/25mbps. But this is not standardized anyway.
> 
> Marek, your patch does a good thing getting rid of the sgmii-2500
> constant, but you are still leaving the possibility of 2500mbps speed
> in SGMII mode...

Thanks for the detailed explanation, I sent a V2 where I remove the 
SGMII 2500 . I hope I got the differences right in the V2 commit message.