[PATCH 9/9] x86/amd: Offer MSR_VIRT_SPEC_CTRL to guests

[Andrew Cooper <andrew.cooper3@citrix.com>]

With all other infrastructure now in place, offer X86_FEATURE_VIRT_SC_SSBD to
guests in cases where Xen thinks it has a working LEGACY_SSBD interface.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Wei Liu <wei.liu2@citrix.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Brian Woods <brian.woods@amd.com>
---
 xen/arch/x86/cpuid.c                        | 10 ++++++++++
 xen/include/public/arch-x86/cpufeatureset.h |  2 +-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index eb86a86..4ff1ea2 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -370,6 +370,16 @@ static void __init guest_common_feature_adjustments(uint32_t *fs)
      */
     if ( host_cpuid_policy.feat.ibrsb )
         __set_bit(X86_FEATURE_IBPB, fs);
+
+    /*
+     * In practice, we can offer VIRT_SC_SSBD on any hardware with legacy_ssbd
+     * or msr_spec_ctrl, but until we've got a proper split between default
+     * and max policies, avoid offering it in cases where the guest shouldn't
+     * be using it.
+     */
+    __clear_bit(X86_FEATURE_VIRT_SC_SSBD, fs);
+    if ( cpu_has_legacy_ssbd )
+        __set_bit(X86_FEATURE_VIRT_SC_SSBD, fs);
 }
 
 static void __init calculate_pv_max_policy(void)
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index 8f80195..eb298cd 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -241,7 +241,7 @@ XEN_CPUFEATURE(IBPB,          8*32+12) /*A  IBPB support only (no IBRS, used by
 XEN_CPUFEATURE(AMD_IBRS,      8*32+14) /*   MSR_SPEC_CTRL.IBRS available */
 XEN_CPUFEATURE(AMD_STIBP,     8*32+15) /*   MSR_SPEC_CTRL.STIBP available */
 XEN_CPUFEATURE(AMD_SSBD,      8*32+24) /*   MSR_SPEC_CTRL.SSBD available */
-XEN_CPUFEATURE(VIRT_SC_SSBD,  8*32+25) /*   MSR_VIRT_SPEC_CTRL.SSBD available. */
+XEN_CPUFEATURE(VIRT_SC_SSBD,  8*32+25) /*A  MSR_VIRT_SPEC_CTRL.SSBD available. */
 XEN_CPUFEATURE(AMD_SSB_NO,    8*32+26) /*   Hardware not vulnerable to SSB */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:0.edx, word 9 */
-- 
2.1.4


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