xen-devel.lists.xenproject.org archive mirror
 help / color / mirror / Atom feed
From: Bertrand Marquis <Bertrand.Marquis@arm.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Ian Jackson" <iwj@xenproject.org>, "Paul Durrant" <paul@xen.org>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>,
	"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v6 1/3] xen/vpci: Move ecam access functions to common code
Date: Thu, 14 Oct 2021 17:09:13 +0000	[thread overview]
Message-ID: <6C71E132-0A78-4DA4-AA52-E62833912145@arm.com> (raw)
In-Reply-To: <20c73f4e-5a8b-c127-f3a7-b841f50b1a4a@suse.com>

Hi Jan,

> On 14 Oct 2021, at 17:06, Jan Beulich <jbeulich@suse.com> wrote:
> 
> On 14.10.2021 16:49, Bertrand Marquis wrote:
>> @@ -305,7 +291,7 @@ static int vpci_portio_read(const struct hvm_io_handler *handler,
>> 
>>     reg = hvm_pci_decode_addr(cf8, addr, &sbdf);
>> 
>> -    if ( !vpci_access_allowed(reg, size) )
>> +    if ( !vpci_ecam_access_allowed(reg, size) )
>>         return X86EMUL_OKAY;
>> 
>>     *data = vpci_read(sbdf, reg, size);
>> @@ -335,7 +321,7 @@ static int vpci_portio_write(const struct hvm_io_handler *handler,
>> 
>>     reg = hvm_pci_decode_addr(cf8, addr, &sbdf);
>> 
>> -    if ( !vpci_access_allowed(reg, size) )
>> +    if ( !vpci_ecam_access_allowed(reg, size) )
>>         return X86EMUL_OKAY;
>> 
>>     vpci_write(sbdf, reg, size, data);
> 
> Why would port I/O functions call an ECAM helper? And in how far is
> that helper actually ECAM-specific?

The function was global before.

> 
>> @@ -434,25 +420,8 @@ static int vpci_mmcfg_read(struct vcpu *v, unsigned long addr,
>>     reg = vpci_mmcfg_decode_addr(mmcfg, addr, &sbdf);
>>     read_unlock(&d->arch.hvm.mmcfg_lock);
>> 
>> -    if ( !vpci_access_allowed(reg, len) ||
>> -         (reg + len) > PCI_CFG_SPACE_EXP_SIZE )
>> -        return X86EMUL_OKAY;
> 
> While I assume this earlier behavior is the reason for ...

Yes :-)

> 
>> -    /*
>> -     * According to the PCIe 3.1A specification:
>> -     *  - Configuration Reads and Writes must usually be DWORD or smaller
>> -     *    in size.
>> -     *  - Because Root Complex implementations are not required to support
>> -     *    accesses to a RCRB that cross DW boundaries [...] software
>> -     *    should take care not to cause the generation of such accesses
>> -     *    when accessing a RCRB unless the Root Complex will support the
>> -     *    access.
>> -     *  Xen however supports 8byte accesses by splitting them into two
>> -     *  4byte accesses.
>> -     */
>> -    *data = vpci_read(sbdf, reg, min(4u, len));
>> -    if ( len == 8 )
>> -        *data |= (uint64_t)vpci_read(sbdf, reg + 4, 4) << 32;
>> +    /* Ignore return code */
>> +    vpci_ecam_mmio_read(sbdf, reg, len, data);
> 
> ... the commented-upon ignoring of the return value, I don't think
> that's a good way to deal with things anymore. Instead I think
> *data should be written to ~0 upon failure, unless it is intended
> for vpci_ecam_mmio_read() to take care of that case (in which case
> I'm not sure I would see why it needs to return an error indicator
> in the first place).

I am not sure in the first place why this is actually ignored and just
returning a -1 value.
If an access is not right, an exception should be generated to the
Guest instead.
When we do that on arm the function is returning an error to the upper
layer in that case, that’s why I did keep a generic function informing the
caller.

So I think it is right for the function to return an error if the access is not allowed but I agree the comment on x86 could get a better justification.
@Roger: could you help finding one here as I do not quite understand why it is ok to ignore this case ?

> 
>> @@ -476,13 +445,8 @@ static int vpci_mmcfg_write(struct vcpu *v, unsigned long addr,
>>     reg = vpci_mmcfg_decode_addr(mmcfg, addr, &sbdf);
>>     read_unlock(&d->arch.hvm.mmcfg_lock);
>> 
>> -    if ( !vpci_access_allowed(reg, len) ||
>> -         (reg + len) > PCI_CFG_SPACE_EXP_SIZE )
>> -        return X86EMUL_OKAY;
>> -
>> -    vpci_write(sbdf, reg, min(4u, len), data);
>> -    if ( len == 8 )
>> -        vpci_write(sbdf, reg + 4, 4, data >> 32);
>> +    /* Ignore return code */
>> +    vpci_ecam_mmio_write(sbdf, reg, len, data);
> 
> Here ignoring is fine imo, but if you feel it is important to
> comment on this, then I think you need to prefer "why" over "what".

Agree I would just need some help on the why.
Now there was no comment before to explain why so I could also
remove the comment altogether.

> 
>> --- a/xen/drivers/vpci/vpci.c
>> +++ b/xen/drivers/vpci/vpci.c
>> @@ -478,6 +478,66 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
>>     spin_unlock(&pdev->vpci->lock);
>> }
>> 
>> +/* Helper function to check an access size and alignment on vpci space. */
>> +bool vpci_ecam_access_allowed(unsigned int reg, unsigned int len)
>> +{
>> +    /*
>> +     * Check access size.
>> +     *
>> +     * On arm32 or for 32bit guests on arm, 64bit accesses should be forbidden
>> +     * but as for those platform ISV register, which gives the access size,
>> +     * cannot have a value 3, checking this would just harden the code.
>> +     */
>> +    if ( len != 1 && len != 2 && len != 4 && len != 8 )
>> +        return false;
> 
> I'm not convinced talking about Arm specifically here is
> warranted, unless there's something there that's clearly
> different from all other architectures. Otherwise the comment
> should imo be written in more general terms.

Other architectures might allow this case. So this is specific to Arm.

> 
>> +int vpci_ecam_mmio_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int len,
>> +                         unsigned long data)
>> +{
>> +    if ( !vpci_ecam_access_allowed(reg, len) ||
>> +         (reg + len) > PCI_CFG_SPACE_EXP_SIZE )
>> +        return 0;
>> +
>> +    vpci_write(sbdf, reg, min(4u, len), data);
>> +    if ( len == 8 )
>> +        vpci_write(sbdf, reg + 4, 4, data >> 32);
>> +
>> +    return 1;
>> +}
>> +
>> +int vpci_ecam_mmio_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int len,
>> +                        unsigned long *data)
>> +{
>> +    if ( !vpci_ecam_access_allowed(reg, len) ||
>> +         (reg + len) > PCI_CFG_SPACE_EXP_SIZE )
>> +        return 0;
>> +
>> +    /*
>> +     * According to the PCIe 3.1A specification:
>> +     *  - Configuration Reads and Writes must usually be DWORD or smaller
>> +     *    in size.
>> +     *  - Because Root Complex implementations are not required to support
>> +     *    accesses to a RCRB that cross DW boundaries [...] software
>> +     *    should take care not to cause the generation of such accesses
>> +     *    when accessing a RCRB unless the Root Complex will support the
>> +     *    access.
>> +     *  Xen however supports 8byte accesses by splitting them into two
>> +     *  4byte accesses.
>> +     */
>> +    *data = vpci_read(sbdf, reg, min(4u, len));
>> +    if ( len == 8 )
>> +        *data |= (uint64_t)vpci_read(sbdf, reg + 4, 4) << 32;
>> +
>> +    return 1;
>> +}
> 
> Why do these two functions return int/0/1 instead of
> bool/false/true (assuming, as per above, that them returning non-
> void is warranted at all)?

This is what the mmio handlers should return to say that an access
was ok or not so the function stick to this standard.

> 
> Also both of these functions will silently misbehave on 32-bit due to
> the use of unsigned long in the parameter types. I think you want e.g.
> CONFIG_64BIT conditionals here as well as in vpci_access_allowed()
> (omitting the questionable "ecam" part of the name) to reject len == 8
> there in that case.

Right using CONFIG_64BIT is a good idea here in fact.
I can do that in the next version.

> 
> Finally, to me, having both "ecam" and "mmio" in the names feels
> redundant - the PCI spec doesn't mention any non-MMIO mechanism there
> afaics.

I was thinking the mmio here stands more for “mmio handler” as to function
handling emulation through mmio access.
I have no objection to remove the mmio part though.

Regards
Bertrand

> 
> Jan
> 


  reply	other threads:[~2021-10-14 17:09 UTC|newest]

Thread overview: 190+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-06 17:40 [PATCH v5 00/11] PCI devices passthrough on Arm Rahul Singh
2021-10-06 17:40 ` [PATCH v5 01/11] xen/arm: xc_domain_ioport_permission(..) not supported on ARM Rahul Singh
2021-10-11 11:47   ` Roger Pau Monné
2021-10-11 12:11     ` Bertrand Marquis
2021-10-11 13:20       ` Roger Pau Monné
2021-10-11 13:40         ` Bertrand Marquis
2021-10-11 13:57           ` Roger Pau Monné
2021-10-11 14:16             ` Bertrand Marquis
2021-10-11 16:32               ` Roger Pau Monné
2021-10-11 17:11                 ` Bertrand Marquis
2021-10-12  8:29                   ` Jan Beulich
2021-10-12  8:41                     ` Bertrand Marquis
2021-10-12  9:32                       ` Jan Beulich
2021-10-12  9:38                         ` Oleksandr Andrushchenko
2021-10-12 10:01                           ` Jan Beulich
2021-10-12 10:06                             ` Oleksandr Andrushchenko
2021-10-12 10:20                               ` Jan Beulich
2021-10-12 10:41                                 ` Bertrand Marquis
2021-10-12 10:44                                   ` Jan Beulich
2021-10-12 14:53                                   ` Ian Jackson
2021-10-12 16:15                                     ` Bertrand Marquis
2021-10-12 16:29                                       ` Ian Jackson
2021-10-12 20:42                                         ` Stefano Stabellini
2021-10-13  8:07                                           ` Roger Pau Monné
2021-10-13 11:52                                             ` Ian Jackson
2021-10-13  8:02                                       ` Roger Pau Monné
2021-10-13 12:02                                         ` Ian Jackson
2021-10-12  9:40                         ` Bertrand Marquis
2021-10-12 10:03                           ` Jan Beulich
2021-10-11 14:16           ` Oleksandr Andrushchenko
2021-10-06 17:40 ` [PATCH v5 02/11] xen/arm: Add PHYSDEVOP_pci_device_(*add/remove) support for ARM Rahul Singh
2021-10-07  0:05   ` Stefano Stabellini
2021-10-07 12:58     ` Jan Beulich
2021-10-21  9:28   ` xen/arm: Missing appropriate locking for the IOMMU (WAS Re: [PATCH v5 02/11] xen/arm: Add PHYSDEVOP_pci_device_(*add/remove) support for ARM) Julien Grall
2021-10-21 13:15     ` Bertrand Marquis
2021-10-21 13:47       ` Julien Grall
2021-10-21 13:52         ` Bertrand Marquis
2021-10-06 17:40 ` [PATCH v5 03/11] xen/arm: Add cmdline boot option "pci-passthrough = <boolean>" Rahul Singh
2021-10-07  8:27   ` Jan Beulich
2021-10-07  8:32     ` Rahul Singh
2021-10-07 12:59   ` Jan Beulich
2021-10-06 17:40 ` [PATCH v5 04/11] xen/arm: PCI host bridge discovery within XEN on ARM Rahul Singh
2021-10-06 17:40 ` [PATCH v5 05/11] xen/arm: Add support for Xilinx ZynqMP PCI host controller Rahul Singh
2021-10-06 17:40 ` [PATCH v5 06/11] xen/arm: Implement pci access functions Rahul Singh
2021-10-06 17:40 ` [PATCH v5 07/11] xen/domctl: Introduce XEN_DOMCTL_CDF_vpci flag Rahul Singh
2021-10-07 13:08   ` Jan Beulich
2021-10-08 18:06   ` Andrew Cooper
2021-10-08 21:12     ` Julien Grall
2021-10-08 21:46       ` Stefano Stabellini
2021-10-11  9:24         ` Julien Grall
2021-10-11 11:29         ` Michal Orzel
2021-10-11 11:35           ` Jan Beulich
2021-10-11 13:17             ` Roger Pau Monné
2021-10-11  9:48     ` Ian Jackson
2021-10-11  9:27   ` Roger Pau Monné
2021-10-11 12:06     ` Michal Orzel
2021-10-12 10:38     ` Michal Orzel
2021-10-13  8:30       ` Roger Pau Monné
2021-10-13  9:36         ` Bertrand Marquis
2021-10-13 10:56           ` Roger Pau Monné
2021-10-13 12:11             ` Bertrand Marquis
2021-10-13 12:57               ` Jan Beulich
2021-10-13 20:41                 ` Stefano Stabellini
2021-10-14  6:23                   ` Jan Beulich
2021-10-14  7:53                     ` Bertrand Marquis
2021-10-13 14:28               ` Roger Pau Monné
2021-10-13 20:53             ` Stefano Stabellini
2021-10-13 23:21               ` Stefano Stabellini
2021-10-12 21:48     ` Stefano Stabellini
2021-10-13  6:18       ` Jan Beulich
2021-10-13  7:11         ` Michal Orzel
2021-10-06 17:40 ` [PATCH v5 08/11] xen/arm: Enable the existing x86 virtual PCI support for ARM Rahul Singh
2021-10-07 13:43   ` Jan Beulich
2021-10-11 12:41     ` Bertrand Marquis
2021-10-11 13:09       ` Jan Beulich
2021-10-11 13:34         ` Bertrand Marquis
2021-10-11 14:10           ` Jan Beulich
2021-10-11 14:52             ` Bertrand Marquis
2021-10-11 18:18             ` Stefano Stabellini
2021-10-12  8:04               ` Jan Beulich
2021-10-12 21:37                 ` Stefano Stabellini
2021-10-13  6:10                   ` Jan Beulich
2021-10-13 10:02                     ` Bertrand Marquis
2021-10-13 12:21                       ` Jan Beulich
2021-10-12 15:04       ` Julien Grall
2021-10-12 16:12         ` Bertrand Marquis
2021-10-12 16:20           ` Julien Grall
2021-10-12 17:50             ` Bertrand Marquis
2021-10-11 10:51   ` Roger Pau Monné
2021-10-11 16:12     ` Bertrand Marquis
2021-10-11 16:20       ` Oleksandr Andrushchenko
2021-10-11 16:43         ` Roger Pau Monné
2021-10-11 17:15           ` Bertrand Marquis
2021-10-11 18:30             ` Oleksandr Andrushchenko
2021-10-11 19:27               ` Stefano Stabellini
2021-10-12  5:34                 ` Oleksandr Andrushchenko
2021-10-12  7:44                 ` Bertrand Marquis
2021-10-12 14:32   ` Julien Grall
2021-10-12 14:34     ` Bertrand Marquis
2021-10-13  8:45   ` Roger Pau Monné
2021-10-13  9:48     ` Bertrand Marquis
2021-10-13 10:33       ` Roger Pau Monné
2021-10-13 13:00     ` Jan Beulich
2021-10-13 14:51       ` Oleksandr Andrushchenko
2021-10-13 15:15         ` Jan Beulich
2021-10-13 19:27           ` Stefano Stabellini
2021-10-14  6:33             ` Jan Beulich
2021-10-14  7:53               ` Bertrand Marquis
2021-10-14  9:03               ` Bertrand Marquis
2021-10-14  9:24                 ` Jan Beulich
2021-10-06 17:40 ` [PATCH v5 09/11] xen/arm: Transitional change to build HAS_VPCI on ARM Rahul Singh
2021-10-11 11:43   ` Roger Pau Monné
2021-10-11 12:15     ` Bertrand Marquis
2021-10-12  1:32       ` Stefano Stabellini
2021-10-06 17:40 ` [PATCH v5 10/11] arm/libxl: Emulated PCI device tree node in libxl Rahul Singh
2021-10-06 18:01   ` Julien Grall
2021-10-07  0:26     ` Stefano Stabellini
2021-10-07 15:31       ` Rahul Singh
2021-10-07 10:53     ` Ian Jackson
2021-10-07 15:29       ` Rahul Singh
2021-10-07 16:11         ` Ian Jackson
2021-10-11 13:46           ` Roger Pau Monné
2021-10-14 17:16           ` Bertrand Marquis
2021-10-14 14:49             ` [PATCH v6 0/3] PCI devices passthrough on Arm Bertrand Marquis
2021-10-14 14:49               ` [PATCH v6 1/3] xen/vpci: Move ecam access functions to common code Bertrand Marquis
2021-10-14 16:06                 ` Jan Beulich
2021-10-14 17:09                   ` Bertrand Marquis [this message]
2021-10-15  6:29                     ` Jan Beulich
2021-10-15  7:37                       ` Bertrand Marquis
2021-10-15  8:13                         ` Jan Beulich
2021-10-15  8:20                           ` Bertrand Marquis
2021-10-15  8:24                             ` Jan Beulich
2021-10-15  9:49                           ` Roger Pau Monné
2021-10-14 23:47                 ` Stefano Stabellini
2021-10-15  7:44                 ` Roger Pau Monné
2021-10-15  7:53                   ` Bertrand Marquis
2021-10-15  9:53                     ` Roger Pau Monné
2021-10-15 10:12                       ` Bertrand Marquis
2021-10-15 10:14                       ` Jan Beulich
2021-10-14 14:49               ` [PATCH v6 2/3] xen/arm: Enable the existing x86 virtual PCI support for ARM Bertrand Marquis
2021-10-14 23:49                 ` Stefano Stabellini
2021-10-15  6:40                   ` Jan Beulich
2021-10-15  9:59                     ` Ian Jackson
2021-10-15 10:10                   ` Bertrand Marquis
2021-10-15  8:00                 ` Jan Beulich
2021-10-15 10:09                   ` Bertrand Marquis
2021-10-15 10:14                     ` Ian Jackson
2021-10-15 10:18                       ` Jan Beulich
2021-10-15 11:35                         ` Roger Pau Monné
2021-10-15 12:13                           ` Bertrand Marquis
2021-10-15 12:18                             ` Jan Beulich
2021-10-15 12:28                               ` Bertrand Marquis
2021-10-15 13:00                                 ` Jan Beulich
2021-10-15 13:10                                   ` Bertrand Marquis
2021-10-15 10:38                     ` Jan Beulich
2021-10-15  8:32                 ` Roger Pau Monné
2021-10-15  8:42                   ` Michal Orzel
2021-10-15  9:52                   ` Bertrand Marquis
2021-10-15 10:13                     ` Luca Fancellu
2021-10-15 10:17                       ` Bertrand Marquis
2021-10-15 10:19                     ` Roger Pau Monné
2021-10-15 10:31                       ` Bertrand Marquis
2021-10-15 10:24                     ` Jan Beulich
2021-10-15 10:33                       ` Bertrand Marquis
2021-10-15 10:41                         ` Jan Beulich
2021-10-15 10:48                           ` Bertrand Marquis
2021-10-15 10:51                             ` Jan Beulich
2021-10-15 11:08                               ` Bertrand Marquis
2021-10-15 13:47                             ` Roger Pau Monné
2021-10-15 14:00                               ` Luca Fancellu
2021-10-15 14:32                                 ` Roger Pau Monné
2021-10-14 14:49               ` [PATCH v6 3/3] arm/libxl: Emulated PCI device tree node in libxl Bertrand Marquis
2021-10-14 17:54                 ` [PATCH v6 3/3] arm/libxl: Emulated PCI device tree node in libxl [and 1 more messages] Ian Jackson
2021-10-14 23:50                   ` Stefano Stabellini
2021-10-15  7:28                   ` Julien Grall
2021-10-15  7:41                     ` Michal Orzel
2021-10-15  9:01                       ` Julien Grall
2021-10-15 10:02                     ` Ian Jackson
2021-10-15 10:58                       ` Michal Orzel
2021-10-15 11:04                         ` Michal Orzel
2021-10-15 11:46                         ` Ian Jackson
2021-10-15 11:53                           ` Michal Orzel
2021-10-15 12:10                             ` Julien Grall
2021-10-15 12:14                               ` Ian Jackson
2021-10-15 12:13                             ` Ian Jackson
2021-10-12 15:03   ` [PATCH v5 10/11] arm/libxl: Emulated PCI device tree node in libxl Ian Jackson
2021-10-06 17:40 ` [PATCH v5 11/11] xen/arm: Add linux,pci-domain property for hwdom if not available Rahul Singh
2021-10-13 20:54   ` Stefano Stabellini
2021-10-07 19:54 ` [PATCH v5 00/11] PCI devices passthrough on Arm Stefano Stabellini
2021-10-07 21:29   ` Rahul Singh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6C71E132-0A78-4DA4-AA52-E62833912145@arm.com \
    --to=bertrand.marquis@arm.com \
    --cc=andrew.cooper3@citrix.com \
    --cc=iwj@xenproject.org \
    --cc=jbeulich@suse.com \
    --cc=paul@xen.org \
    --cc=roger.pau@citrix.com \
    --cc=wl@xen.org \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).