All of lore.kernel.org
 help / color / mirror / Atom feed
From: Alistair Francis <alistair23@gmail.com>
To: Kito Cheng <kito.cheng@sifive.com>, frank.chang@sifive.com
Cc: qemu-riscv@nongnu.org,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	qemu-devel@nongnu.org,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [RFC 15/15] target/riscv: rvb: support and turn on B-extension from command line
Date: Fri, 20 Nov 2020 08:24:51 -0800	[thread overview]
Message-ID: <104fea2e-5c9a-8331-b9f5-4d5967651427@gmail.com> (raw)
In-Reply-To: <CALLt3TgGATbAK5TFw-QBUFYTcC_CeAZ1AkMeeYuqgVxcyktT7g@mail.gmail.com>



On 19/11/2020 7:02 pm, Kito Cheng wrote:
>> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
>> index 0bbfd7f4574..bc29e118c6d 100644
>> --- a/target/riscv/cpu.c
>> +++ b/target/riscv/cpu.c
>> @@ -438,6 +438,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
>>           if (cpu->cfg.ext_h) {
>>               target_misa |= RVH;
>>           }
>> +        if (cpu->cfg.ext_b) {
>> +            target_misa |= RVB;
>> +        }
>>           if (cpu->cfg.ext_v) {
>>               target_misa |= RVV;
>>               if (!is_power_of_2(cpu->cfg.vlen)) {
>> @@ -515,6 +518,7 @@ static Property riscv_cpu_properties[] = {
>>       DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
>>       DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
>>       /* This is experimental so mark with 'x-' */
>> +    DEFINE_PROP_BOOL("x-b", RISCVCPU, cfg.ext_b, true),
> 
> I think the default value should be false?

Good catch, I missed that.

Yes it should be false.

Alistair

> 
>>       DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false),
>>       DEFINE_PROP_BOOL("x-v", RISCVCPU, cfg.ext_v, false),
>>       DEFINE_PROP_BOOL("Counters", RISCVCPU, cfg.ext_counters, true),
> 


WARNING: multiple messages have this Message-ID (diff)
From: Alistair Francis <alistair23@gmail.com>
To: Kito Cheng <kito.cheng@sifive.com>, frank.chang@sifive.com
Cc: qemu-riscv@nongnu.org,
	Sagar Karandikar <sagark@eecs.berkeley.edu>,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	qemu-devel@nongnu.org, Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [RFC 15/15] target/riscv: rvb: support and turn on B-extension from command line
Date: Fri, 20 Nov 2020 08:24:51 -0800	[thread overview]
Message-ID: <104fea2e-5c9a-8331-b9f5-4d5967651427@gmail.com> (raw)
In-Reply-To: <CALLt3TgGATbAK5TFw-QBUFYTcC_CeAZ1AkMeeYuqgVxcyktT7g@mail.gmail.com>



On 19/11/2020 7:02 pm, Kito Cheng wrote:
>> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
>> index 0bbfd7f4574..bc29e118c6d 100644
>> --- a/target/riscv/cpu.c
>> +++ b/target/riscv/cpu.c
>> @@ -438,6 +438,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
>>           if (cpu->cfg.ext_h) {
>>               target_misa |= RVH;
>>           }
>> +        if (cpu->cfg.ext_b) {
>> +            target_misa |= RVB;
>> +        }
>>           if (cpu->cfg.ext_v) {
>>               target_misa |= RVV;
>>               if (!is_power_of_2(cpu->cfg.vlen)) {
>> @@ -515,6 +518,7 @@ static Property riscv_cpu_properties[] = {
>>       DEFINE_PROP_BOOL("s", RISCVCPU, cfg.ext_s, true),
>>       DEFINE_PROP_BOOL("u", RISCVCPU, cfg.ext_u, true),
>>       /* This is experimental so mark with 'x-' */
>> +    DEFINE_PROP_BOOL("x-b", RISCVCPU, cfg.ext_b, true),
> 
> I think the default value should be false?

Good catch, I missed that.

Yes it should be false.

Alistair

> 
>>       DEFINE_PROP_BOOL("x-h", RISCVCPU, cfg.ext_h, false),
>>       DEFINE_PROP_BOOL("x-v", RISCVCPU, cfg.ext_v, false),
>>       DEFINE_PROP_BOOL("Counters", RISCVCPU, cfg.ext_counters, true),
> 


  reply	other threads:[~2020-11-20 16:27 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-18  8:29 [RFC 00/15] support subsets of bitmanip extension frank.chang
2020-11-18  8:29 ` [RFC 01/15] target/riscv: reformat @sh format encoding for B-extension frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 19:03   ` Richard Henderson
2020-11-19 19:03     ` Richard Henderson
2020-11-18  8:29 ` [RFC 02/15] target/riscv: rvb: count leading/trailing zeros frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 19:24   ` Richard Henderson
2020-11-19 19:24     ` Richard Henderson
2020-11-19 19:48   ` Richard Henderson
2020-11-19 19:48     ` Richard Henderson
2020-11-18  8:29 ` [RFC 03/15] target/riscv: rvb: count bits set frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 19:27   ` Richard Henderson
2020-11-19 19:27     ` Richard Henderson
2020-11-18  8:29 ` [RFC 04/15] target/riscv: rvb: logic-with-negate frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 19:28   ` Richard Henderson
2020-11-19 19:28     ` Richard Henderson
2020-11-18  8:29 ` [RFC 05/15] target/riscv: rvb: pack two words into one register frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 19:43   ` Richard Henderson
2020-11-19 19:43     ` Richard Henderson
2020-11-18  8:29 ` [RFC 06/15] target/riscv: rvb: min/max instructions frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 19:46   ` Richard Henderson
2020-11-19 19:46     ` Richard Henderson
2020-11-18  8:29 ` [RFC 07/15] target/riscv: rvb: sign-extend instructions frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 19:48   ` Richard Henderson
2020-11-19 19:48     ` Richard Henderson
2020-11-18  8:29 ` [RFC 08/15] target/riscv: rvb: single-bit instructions frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 20:05   ` Richard Henderson
2020-11-19 20:05     ` Richard Henderson
2020-11-19 20:35   ` Richard Henderson
2020-11-19 20:35     ` Richard Henderson
2020-11-19 21:04     ` Richard Henderson
2020-11-19 21:04       ` Richard Henderson
2020-12-04 17:10       ` Frank Chang
2020-12-04 17:10         ` Frank Chang
2020-11-18  8:29 ` [RFC 09/15] target/riscv: rvb: shift ones frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 20:54   ` Richard Henderson
2020-11-19 20:54     ` Richard Henderson
2020-11-18  8:29 ` [RFC 10/15] target/riscv: rvb: rotate (left/right) frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 21:06   ` Richard Henderson
2020-11-19 21:06     ` Richard Henderson
2020-11-18  8:29 ` [RFC 11/15] target/riscv: rvb: generalized reverse frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 21:24   ` Richard Henderson
2020-11-19 21:24     ` Richard Henderson
2020-11-18  8:29 ` [RFC 12/15] target/riscv: rvb: generalized or-combine frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 21:28   ` Richard Henderson
2020-11-19 21:28     ` Richard Henderson
2020-11-18  8:29 ` [RFC 13/15] target/riscv: rvb: address calculation frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 21:38   ` Richard Henderson
2020-11-19 21:38     ` Richard Henderson
2020-11-18  8:29 ` [RFC 14/15] target/riscv: rvb: add/sub with postfix zero-extend frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 22:15   ` Richard Henderson
2020-11-19 22:15     ` Richard Henderson
2020-11-18  8:29 ` [RFC 15/15] target/riscv: rvb: support and turn on B-extension from command line frank.chang
2020-11-18  8:29   ` frank.chang
2020-11-19 18:54   ` Alistair Francis
2020-11-19 18:54     ` Alistair Francis
2020-11-20  3:02   ` Kito Cheng
2020-11-20  3:02     ` Kito Cheng
2020-11-20 16:24     ` Alistair Francis [this message]
2020-11-20 16:24       ` Alistair Francis
2020-11-23  1:22       ` Frank Chang
2020-11-23  1:22         ` Frank Chang
2020-11-19 22:26 ` [RFC 00/15] support subsets of bitmanip extension Richard Henderson
2020-11-20  1:45   ` Frank Chang
2020-11-20  1:45     ` Frank Chang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=104fea2e-5c9a-8331-b9f5-4d5967651427@gmail.com \
    --to=alistair23@gmail.com \
    --cc=Alistair.Francis@wdc.com \
    --cc=frank.chang@sifive.com \
    --cc=kbastian@mail.uni-paderborn.de \
    --cc=kito.cheng@sifive.com \
    --cc=palmer@dabbelt.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=sagark@eecs.berkeley.edu \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.