From: "Larson, Bradley" <Bradley.Larson@amd.com> To: Serge Semin <fancer.lancer@gmail.com>, Brad Larson <brad@pensando.io>, Andy Shevchenko <andy.shevchenko@gmail.com> Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>, "adrian.hunter@intel.com" <adrian.hunter@intel.com>, "alcooperx@gmail.com" <alcooperx@gmail.com>, "arnd@arndb.de" <arnd@arndb.de>, "brijeshkumar.singh@amd.com" <brijeshkumar.singh@amd.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "gsomlo@gmail.com" <gsomlo@gmail.com>, "gerg@linux-m68k.org" <gerg@linux-m68k.org>, "krzk@kernel.org" <krzk@kernel.org>, "krzysztof.kozlowski+dt@linaro.org" <krzysztof.kozlowski+dt@linaro.org>, "lee.jones@linaro.org" <lee.jones@linaro.org>, "broonie@kernel.org" <broonie@kernel.org>, "yamada.masahiro@socionext.com" <yamada.masahiro@socionext.com>, "p.zabel@pengutronix.de" <p.zabel@pengutronix.de>, "piotrs@cadence.com" <piotrs@cadence.com>, "p.yadav@ti.com" <p.yadav@ti.com>, "rdunlap@infradead.org" <rdunlap@infradead.org>, "robh+dt@kernel.org" <robh+dt@kernel.org>, "samuel@sholland.org" <samuel@sholland.org>, "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>, "Lendacky, Thomas" <Thomas.Lendacky@amd.com>, "ulf.hansson@linaro.org" <ulf.hansson@linaro.org>, "will@kernel.org" <will@kernel.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org> Subject: Re: [PATCH v6 12/17] spi: dw: Add support for AMD Pensando Elba SoC Date: Wed, 31 Aug 2022 18:04:02 +0000 [thread overview] Message-ID: <4aab1595-53a6-32af-8cfb-90f5e258d29e@amd.com> (raw) In-Reply-To: <20220821181848.cxjpv2f4cqvdtnq3@mobilestation> On 8/21/22 11:18 AM, Serge Semin wrote: > On Sat, Aug 20, 2022 at 12:57:45PM -0700, Brad Larson wrote: >> From: Brad Larson <blarson@amd.com> >> >> The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller >> with device specific chip-select control. The Elba SoC >> provides four chip-selects where the native DW IP supports >> two chip-selects. The Elba DW_SPI instance has two native >> CS signals that are always overridden. >> >> Signed-off-by: Brad Larson <blarson@amd.com> >> --- >> drivers/spi/spi-dw-mmio.c | 77 +++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 77 insertions(+) >> >> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c >> index 26c40ea6dd12..36b8c5e10bb3 100644 >> --- a/drivers/spi/spi-dw-mmio.c >> +++ b/drivers/spi/spi-dw-mmio.c >> @@ -53,6 +53,24 @@ struct dw_spi_mscc { >> void __iomem *spi_mst; /* Not sparx5 */ >> }; >> >> +struct dw_spi_elba { >> + struct regmap *syscon; >> +}; >> + >> +/* >> + * Elba SoC does not use ssi, pin override is used for cs 0,1 and >> + * gpios for cs 2,3 as defined in the device tree. >> + * >> + * cs: | 1 0 >> + * bit: |---3-------2-------1-------0 >> + * | cs1 cs1_ovr cs0 cs0_ovr >> + */ >> +#define ELBA_SPICS_REG 0x2468 >> +#define ELBA_SPICS_SHIFT(cs) (2 * (cs)) >> +#define ELBA_SPICS_MASK(cs) (0x3 << ELBA_SPICS_SHIFT(cs)) >> +#define ELBA_SPICS_SET(cs, val) \ >> + ((((val) << 1) | 0x1) << ELBA_SPICS_SHIFT(cs)) > Please take the @Andy' notes into account: > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Flkml%2FCAHp75Vex0VkECYd%3DkY0m6%3DjXBYSXg2UFu7vn271%2BQ49WZn22GA%40mail.gmail.com%2F&data=05%7C01%7CBradley.Larson%40amd.com%7C25d0f17dfcbd44f661c808da83a19a98%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637967027418603429%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=VFI%2FptM79YYbZm%2FyQmtssLsNIQ75AOU05ronZ1QStlU%3D&reserved=0 Yes, I had a tested change for this but missed adding to the patch update. This is the change and I'll resend just this patch. --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -66,10 +66,6 @@ struct dw_spi_elba { * | cs1 cs1_ovr cs0 cs0_ovr */ #define ELBA_SPICS_REG 0x2468 -#define ELBA_SPICS_SHIFT(cs) (2 * (cs)) -#define ELBA_SPICS_MASK(cs) (0x3 << ELBA_SPICS_SHIFT(cs)) -#define ELBA_SPICS_SET(cs, val) \ - ((((val) << 1) | 0x1) << ELBA_SPICS_SHIFT(cs)) /* * The Designware SPI controller (referred to as master in the documentation) @@ -257,8 +253,9 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev, static void dw_spi_elba_override_cs(struct dw_spi_elba *dwselba, int cs, int enable) { - regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG, ELBA_SPICS_MASK(cs), - ELBA_SPICS_SET(cs, enable)); + regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG, + (GENMASK(1, 0) << ((cs) << 1)), + ((enable) << 1 | BIT(0)) << ((cs) << 1)); } > One more nitpick below. > > +static int dw_spi_elba_init(struct platform_device *pdev, > + struct dw_spi_mmio *dwsmmio) > +{ > + const char *syscon_name = "amd,pensando-elba-syscon"; > + struct device_node *np = pdev->dev.of_node; >> + struct device_node *node; >> + struct dw_spi_elba *dwselba; > Please, use the reverse xmas tree order of the local variables > as the rest of the driver mainly implies. Changed to reverse xmas tree ordering. Regards, Brad
WARNING: multiple messages have this Message-ID (diff)
From: "Larson, Bradley" <Bradley.Larson@amd.com> To: Serge Semin <fancer.lancer@gmail.com>, Brad Larson <brad@pensando.io>, Andy Shevchenko <andy.shevchenko@gmail.com> Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>, "adrian.hunter@intel.com" <adrian.hunter@intel.com>, "alcooperx@gmail.com" <alcooperx@gmail.com>, "arnd@arndb.de" <arnd@arndb.de>, "brijeshkumar.singh@amd.com" <brijeshkumar.singh@amd.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "gsomlo@gmail.com" <gsomlo@gmail.com>, "gerg@linux-m68k.org" <gerg@linux-m68k.org>, "krzk@kernel.org" <krzk@kernel.org>, "krzysztof.kozlowski+dt@linaro.org" <krzysztof.kozlowski+dt@linaro.org>, "lee.jones@linaro.org" <lee.jones@linaro.org>, "broonie@kernel.org" <broonie@kernel.org>, "yamada.masahiro@socionext.com" <yamada.masahiro@socionext.com>, "p.zabel@pengutronix.de" <p.zabel@pengutronix.de>, "piotrs@cadence.com" <piotrs@cadence.com>, "p.yadav@ti.com" <p.yadav@ti.com>, "rdunlap@infradead.org" <rdunlap@infradead.org>, "robh+dt@kernel.org" <robh+dt@kernel.org>, "samuel@sholland.org" <samuel@sholland.org>, "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>, "Lendacky, Thomas" <Thomas.Lendacky@amd.com>, "ulf.hansson@linaro.org" <ulf.hansson@linaro.org>, "will@kernel.org" <will@kernel.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org> Subject: Re: [PATCH v6 12/17] spi: dw: Add support for AMD Pensando Elba SoC Date: Wed, 31 Aug 2022 18:04:02 +0000 [thread overview] Message-ID: <4aab1595-53a6-32af-8cfb-90f5e258d29e@amd.com> (raw) In-Reply-To: <20220821181848.cxjpv2f4cqvdtnq3@mobilestation> On 8/21/22 11:18 AM, Serge Semin wrote: > On Sat, Aug 20, 2022 at 12:57:45PM -0700, Brad Larson wrote: >> From: Brad Larson <blarson@amd.com> >> >> The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller >> with device specific chip-select control. The Elba SoC >> provides four chip-selects where the native DW IP supports >> two chip-selects. The Elba DW_SPI instance has two native >> CS signals that are always overridden. >> >> Signed-off-by: Brad Larson <blarson@amd.com> >> --- >> drivers/spi/spi-dw-mmio.c | 77 +++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 77 insertions(+) >> >> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c >> index 26c40ea6dd12..36b8c5e10bb3 100644 >> --- a/drivers/spi/spi-dw-mmio.c >> +++ b/drivers/spi/spi-dw-mmio.c >> @@ -53,6 +53,24 @@ struct dw_spi_mscc { >> void __iomem *spi_mst; /* Not sparx5 */ >> }; >> >> +struct dw_spi_elba { >> + struct regmap *syscon; >> +}; >> + >> +/* >> + * Elba SoC does not use ssi, pin override is used for cs 0,1 and >> + * gpios for cs 2,3 as defined in the device tree. >> + * >> + * cs: | 1 0 >> + * bit: |---3-------2-------1-------0 >> + * | cs1 cs1_ovr cs0 cs0_ovr >> + */ >> +#define ELBA_SPICS_REG 0x2468 >> +#define ELBA_SPICS_SHIFT(cs) (2 * (cs)) >> +#define ELBA_SPICS_MASK(cs) (0x3 << ELBA_SPICS_SHIFT(cs)) >> +#define ELBA_SPICS_SET(cs, val) \ >> + ((((val) << 1) | 0x1) << ELBA_SPICS_SHIFT(cs)) > Please take the @Andy' notes into account: > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Flkml%2FCAHp75Vex0VkECYd%3DkY0m6%3DjXBYSXg2UFu7vn271%2BQ49WZn22GA%40mail.gmail.com%2F&data=05%7C01%7CBradley.Larson%40amd.com%7C25d0f17dfcbd44f661c808da83a19a98%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637967027418603429%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=VFI%2FptM79YYbZm%2FyQmtssLsNIQ75AOU05ronZ1QStlU%3D&reserved=0 Yes, I had a tested change for this but missed adding to the patch update. This is the change and I'll resend just this patch. --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -66,10 +66,6 @@ struct dw_spi_elba { * | cs1 cs1_ovr cs0 cs0_ovr */ #define ELBA_SPICS_REG 0x2468 -#define ELBA_SPICS_SHIFT(cs) (2 * (cs)) -#define ELBA_SPICS_MASK(cs) (0x3 << ELBA_SPICS_SHIFT(cs)) -#define ELBA_SPICS_SET(cs, val) \ - ((((val) << 1) | 0x1) << ELBA_SPICS_SHIFT(cs)) /* * The Designware SPI controller (referred to as master in the documentation) @@ -257,8 +253,9 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev, static void dw_spi_elba_override_cs(struct dw_spi_elba *dwselba, int cs, int enable) { - regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG, ELBA_SPICS_MASK(cs), - ELBA_SPICS_SET(cs, enable)); + regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG, + (GENMASK(1, 0) << ((cs) << 1)), + ((enable) << 1 | BIT(0)) << ((cs) << 1)); } > One more nitpick below. > > +static int dw_spi_elba_init(struct platform_device *pdev, > + struct dw_spi_mmio *dwsmmio) > +{ > + const char *syscon_name = "amd,pensando-elba-syscon"; > + struct device_node *np = pdev->dev.of_node; >> + struct device_node *node; >> + struct dw_spi_elba *dwselba; > Please, use the reverse xmas tree order of the local variables > as the rest of the driver mainly implies. Changed to reverse xmas tree ordering. Regards, Brad _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-08-31 18:04 UTC|newest] Thread overview: 110+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-08-20 19:57 [PATCH v6 00/17] Support AMD Pensando Elba SoC Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-20 19:57 ` [PATCH v6 01/17] dt-bindings: arm: add AMD Pensando boards Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-22 18:15 ` Krzysztof Kozlowski 2022-08-22 18:15 ` Krzysztof Kozlowski 2022-08-31 22:40 ` Larson, Bradley 2022-08-31 22:40 ` Larson, Bradley 2022-08-20 19:57 ` [PATCH v6 02/17] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-22 21:29 ` Rob Herring 2022-08-22 21:29 ` Rob Herring 2022-08-31 22:36 ` Larson, Bradley 2022-08-31 22:36 ` Larson, Bradley 2022-08-20 19:57 ` [PATCH v6 03/17] dt-bindings: spi: cdns: Add compatible for " Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-22 18:22 ` Krzysztof Kozlowski 2022-08-22 18:22 ` Krzysztof Kozlowski 2022-08-31 18:37 ` Larson, Bradley 2022-08-31 18:37 ` Larson, Bradley 2022-08-20 19:57 ` [PATCH v6 04/17] dt-bindings: spi: dw: Add AMD Pensando Elba SoC SPI Controller bindings Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-21 17:49 ` Serge Semin 2022-08-21 17:49 ` Serge Semin 2022-08-31 18:28 ` Larson, Bradley 2022-08-31 18:28 ` Larson, Bradley 2022-09-11 18:34 ` Serge Semin 2022-09-11 18:34 ` Serge Semin 2022-09-14 18:47 ` Larson, Bradley 2022-09-14 18:47 ` Larson, Bradley 2022-08-22 18:19 ` Krzysztof Kozlowski 2022-08-22 18:19 ` Krzysztof Kozlowski 2022-08-31 18:45 ` Larson, Bradley 2022-08-31 18:45 ` Larson, Bradley 2022-08-20 19:57 ` [PATCH v6 05/17] dt-bindings: mfd: syscon: Add amd,pensando-elba-syscon compatible Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-22 18:23 ` Krzysztof Kozlowski 2022-08-22 18:23 ` Krzysztof Kozlowski 2022-08-31 18:35 ` Larson, Bradley 2022-08-31 18:35 ` Larson, Bradley 2022-08-20 19:57 ` [PATCH v6 06/17] dt-bindings: mfd: amd,pensando-elbasr: Add AMD Pensando Elba System Resource chip Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-21 20:21 ` Rob Herring 2022-08-21 20:21 ` Rob Herring 2022-08-22 14:25 ` Rob Herring 2022-08-22 14:25 ` Rob Herring 2022-08-31 23:01 ` Larson, Bradley 2022-08-31 23:01 ` Larson, Bradley 2022-09-01 7:20 ` Krzysztof Kozlowski 2022-09-01 7:20 ` Krzysztof Kozlowski 2022-09-01 20:37 ` Larson, Bradley 2022-09-01 20:37 ` Larson, Bradley 2022-09-08 11:27 ` Krzysztof Kozlowski 2022-09-08 11:27 ` Krzysztof Kozlowski 2022-09-13 21:57 ` Larson, Bradley 2022-09-13 21:57 ` Larson, Bradley 2022-09-16 9:56 ` Krzysztof Kozlowski 2022-09-16 9:56 ` Krzysztof Kozlowski 2022-09-29 22:50 ` Larson, Bradley 2022-09-29 22:50 ` Larson, Bradley 2022-10-07 15:53 ` Krzysztof Kozlowski 2022-10-07 15:53 ` Krzysztof Kozlowski 2022-08-20 19:57 ` [PATCH v6 07/17] dt-bindings: reset: amd,pensando-elbasr-reset: Add AMD Pensando SR Reset Controller bindings Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-21 20:21 ` Rob Herring 2022-08-21 20:21 ` Rob Herring 2022-08-20 19:57 ` [PATCH v6 08/17] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-20 19:57 ` [PATCH v6 09/17] arm64: Add config for AMD Pensando SoC platforms Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-20 19:57 ` [PATCH v6 10/17] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-09-30 7:27 ` Krzysztof Kozlowski 2022-09-30 7:27 ` Krzysztof Kozlowski 2022-10-04 19:46 ` Larson, Bradley 2022-10-04 19:46 ` Larson, Bradley 2022-08-20 19:57 ` [PATCH v6 11/17] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-20 19:57 ` [PATCH v6 12/17] spi: dw: Add support " Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-21 18:18 ` Serge Semin 2022-08-21 18:18 ` Serge Semin 2022-08-31 18:04 ` Larson, Bradley [this message] 2022-08-31 18:04 ` Larson, Bradley 2022-09-11 18:20 ` Serge Semin 2022-09-11 18:20 ` Serge Semin 2022-09-14 17:03 ` Larson, Bradley 2022-09-14 17:03 ` Larson, Bradley 2022-08-20 19:57 ` [PATCH v6 13/17] mmc: sdhci-cadence: Enable device specific override of writel() Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-20 19:57 ` [PATCH v6 14/17] mfd: pensando-elbasr: Add AMD Pensando Elba System Resource chip Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-20 19:57 ` [PATCH v6 15/17] reset: elbasr: Add AMD Pensando Elba SR Reset Controller Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-22 7:04 ` Philipp Zabel 2022-08-22 7:04 ` Philipp Zabel 2022-08-20 19:57 ` [PATCH v6 16/17] mmc: sdhci-cadence: Add AMD Pensando Elba SoC support Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-20 19:57 ` [PATCH v6 17/17] mmc: sdhci-cadence: Support mmc hardware reset Brad Larson 2022-08-20 19:57 ` Brad Larson 2022-08-22 7:03 ` Philipp Zabel 2022-08-22 7:03 ` Philipp Zabel 2022-08-31 22:49 ` Larson, Bradley 2022-08-31 22:49 ` Larson, Bradley 2022-08-22 10:53 ` Ulf Hansson 2022-08-22 10:53 ` Ulf Hansson 2022-08-22 12:25 ` Mark Brown 2022-08-22 12:25 ` Mark Brown 2022-08-31 23:29 ` Larson, Bradley 2022-08-31 23:29 ` Larson, Bradley
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