Re: [PATCH v6 17/17] mmc: sdhci-cadence: Support mmc hardware reset

["Larson, Bradley" <Bradley.Larson@amd.com>]

On 8/22/22 12:03 AM, Philipp Zabel wrote:
> Hi Brad,
>
> On Sa, 2022-08-20 at 12:57 -0700, Brad Larson wrote:
> [...]
>> +static void sdhci_mmc_hw_reset(struct mmc_host *mmc)
>> +{
>> +     struct sdhci_host *host = mmc_priv(mmc);
>> +     struct sdhci_cdns_priv *priv = sdhci_cdns_priv(host);
>> +
>> +     dev_info(mmc_dev(host->mmc), "emmc hardware reset\n");
>> +
>> +     reset_control_assert(priv->rst_hw);
>> +     /* For eMMC, minimum is 1us but give it 9us for good measure */
>> +     udelay(9);
> At a glance, this seems excessive. Is there a reason 9 us is better
> than, say, 2 or 3?

Yes, 3x the minimum should be fine. Changed to 3 usec.


> [...]
>> @@ -520,6 +538,17 @@ static int sdhci_cdns_probe(struct platform_device *pdev)
>>        if (ret)
>>                goto free;
>>
>>
>>
>>
>> +     if (host->mmc->caps & MMC_CAP_HW_RESET) {
>> +             priv->rst_hw = devm_reset_control_get_optional_exclusive(dev, "hw");
> This should be described in cdns,sdhci.yaml first.

Adding this to cdns,sdhci.yaml and running through schema checker.

--- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml
@@ -114,6 +114,16 @@ properties:
      minimum: 0
      maximum: 0x7f

+  reset-names:
+    items:
+      - const: hw
+
+  resets:
+    description:
+      optional. phandle to the system reset controller with line index
+      for mmc hw reset line if exists.
+    maxItems: 1
+
  required:
    - compatible


Regards,
Brad