Re: [PATCH v2 06/16] x86/mce/amd: Prep DFR handler before enabling banks

[Yazen Ghannam <yazen.ghannam@amd.com>]

On 4/24/2024 2:34 PM, Borislav Petkov wrote:
> On Thu, Apr 04, 2024 at 10:13:49AM -0500, Yazen Ghannam wrote:
>> Scalable MCA systems use the per-bank MCA_CONFIG register to enable
>> deferred error interrupts. This is done as part of SMCA configuration.
>>
>> Currently, the deferred error interrupt handler is set up after SMCA
>> configuration.
>>
>> Move the deferred error interrupt handler set up before SMCA
>> configuration. This ensures the kernel is ready to receive the
>> interrupts before the hardware is configured to send them.
>>
>> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
>> ---
>>
>> Notes:
>>     Link:
>>     https://lkml.kernel.org/r/20231118193248.1296798-11-yazen.ghannam@amd.com
>>     
>>     v1->v2:
>>     * No change.
>>
>>  arch/x86/kernel/cpu/mce/amd.c | 7 ++++---
>>  1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
>> index 3093fed06194..e8e78d91082b 100644
>> --- a/arch/x86/kernel/cpu/mce/amd.c
>> +++ b/arch/x86/kernel/cpu/mce/amd.c
>> @@ -589,6 +589,9 @@ static void deferred_error_interrupt_enable(struct cpuinfo_x86 *c)
>>  	u32 low = 0, high = 0;
>>  	int def_offset = -1, def_new;
>>  
>> +	if (!mce_flags.succor)
> 
> Does succor imply smca?
> 
> Because you have now this order:
> 
> 	deferred_error_interrupt_enable(c);
> 
> 	...
> 
> 	configure_smca(bank);
> 
> and that one tests mce_flags.smca
> 
> Now, if succor didn't imply smca, we'll enable the DF irq handler for
> no good reason on (succor=true && smca=false) systems.
> 
> If the implication is given:
> 
> Reviewed-by: Borislav Petkov (AMD) <bp@alien8.de>
> 

They are independent features. SUCCOR is the feature that defines the deferred
error interrupt and data poisoning. This predates SMCA. SUCCOR was introduced
in the later Family 15h systems.

Thanks,
Yazen