From: "Luck, Tony" <tony.luck@intel.com>
To: "Naik, Avadhut" <avadnaik@amd.com>,
Yazen Ghannam <yazen.ghannam@amd.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"x86@kernel.org" <x86@kernel.org>,
"Avadhut.Naik@amd.com" <Avadhut.Naik@amd.com>,
"John.Allen@amd.com" <John.Allen@amd.com>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Subject: RE: [PATCH v2 16/16] EDAC/mce_amd: Add support for FRU Text in MCA
Date: Mon, 8 Apr 2024 19:57:38 +0000 [thread overview]
Message-ID: <SJ1PR11MB60838B718317B171D2935C16FC002@SJ1PR11MB6083.namprd11.prod.outlook.com> (raw)
In-Reply-To: <0c903e3b-093e-461a-aa70-c2d58fc6d82d@amd.com>
> All of the above registers including the newly added config MSR will only
> be logged if the smca flag is set in mce_flags.
> Doesn't that already serve as a vendor check of sorts?
> Something that I am missing here?
Avadhut,
Yes. That's a sufficient vendor check. I was looking at the bits in the patch,
not at the broader context. Sorry for the noise.
-Tony
prev parent reply other threads:[~2024-04-08 19:57 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-04 15:13 [PATCH v2 00/16] MCA Updates Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 01/16] x86/mce: Define mce_setup() helpers for common and per-CPU fields Yazen Ghannam
2024-04-16 10:02 ` Borislav Petkov
2024-04-17 13:50 ` Yazen Ghannam
2024-04-22 8:13 ` Borislav Petkov
2024-04-04 15:13 ` [PATCH v2 02/16] x86/mce: Use mce_setup() helpers for apei_smca_report_x86_error() Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 03/16] x86/mce/amd: Use fixed bank number for quirks Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 04/16] x86/mce/amd: Look up bank type by IPID Yazen Ghannam
2024-04-23 17:06 ` Borislav Petkov
2024-04-23 19:16 ` Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 05/16] x86/mce/amd: Clean up SMCA configuration Yazen Ghannam
2024-04-23 19:06 ` Borislav Petkov
2024-04-23 19:32 ` Yazen Ghannam
2024-04-24 2:29 ` Borislav Petkov
2024-04-24 13:44 ` Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 06/16] x86/mce/amd: Prep DFR handler before enabling banks Yazen Ghannam
2024-04-24 18:34 ` Borislav Petkov
2024-04-25 13:31 ` Yazen Ghannam
2024-04-29 12:38 ` Borislav Petkov
2024-04-29 13:22 ` Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 07/16] x86/mce/amd: Simplify DFR handler setup Yazen Ghannam
2024-04-24 19:06 ` Borislav Petkov
2024-04-25 14:12 ` Yazen Ghannam
2024-04-29 12:59 ` Borislav Petkov
2024-04-29 13:56 ` Yazen Ghannam
2024-04-29 14:12 ` Borislav Petkov
2024-04-29 14:25 ` Yazen Ghannam
2024-04-30 13:47 ` Borislav Petkov
2024-04-29 18:34 ` Robert Richter
2024-04-30 18:06 ` Borislav Petkov
2024-05-02 16:02 ` Yazen Ghannam
2024-05-02 18:48 ` Robert Richter
2024-05-04 14:37 ` Borislav Petkov
2024-04-04 15:13 ` [PATCH v2 08/16] x86/mce/amd: Clean up enable_deferred_error_interrupt() Yazen Ghannam
2024-04-29 13:12 ` Borislav Petkov
2024-04-29 14:18 ` Yazen Ghannam
2024-05-04 14:41 ` Borislav Petkov
2024-04-04 15:13 ` [PATCH v2 09/16] x86/mce: Unify AMD THR handler with MCA Polling Yazen Ghannam
2024-04-29 13:40 ` Borislav Petkov
2024-04-29 14:36 ` Yazen Ghannam
2024-05-04 14:52 ` Borislav Petkov
2024-05-07 16:25 ` Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 10/16] x86/mce: Unify AMD DFR " Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 11/16] x86/mce: Skip AMD threshold init if no threshold banks found Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 12/16] x86/mce/amd: Support SMCA Corrected Error Interrupt Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 13/16] x86/mce: Add wrapper for struct mce to export vendor specific info Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 14/16] x86/mce, EDAC/mce_amd: Add support for new MCA_SYND{1,2} registers Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 15/16] x86/mce/apei: Handle variable register array size Yazen Ghannam
2024-04-04 15:13 ` [PATCH v2 16/16] EDAC/mce_amd: Add support for FRU Text in MCA Yazen Ghannam
2024-04-05 16:06 ` Luck, Tony
2024-04-07 13:19 ` Yazen Ghannam
2024-04-08 19:47 ` Naik, Avadhut
2024-04-08 19:57 ` Luck, Tony [this message]
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