From: Naveen Naidu <naveennaidu479@gmail.com>
To: bhelgaas@google.com
Cc: "Naveen Naidu" <naveennaidu479@gmail.com>,
linux-kernel-mentees@lists.linuxfoundation.org,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
"K. Y. Srinivasan" <kys@microsoft.com>,
"Haiyang Zhang" <haiyangz@microsoft.com>,
"Stephen Hemminger" <sthemmin@microsoft.com>,
"Wei Liu" <wei.liu@kernel.org>,
"Dexuan Cui" <decui@microsoft.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
linux-hyperv@vger.kernel.org (open list:Hyper-V/Azure CORE AND
DRIVERS)
Subject: [PATCH 21/22] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error
Date: Mon, 11 Oct 2021 23:42:39 +0530 [thread overview]
Message-ID: <04f4c0ad634eb304b31bbbb8eed8a257712dc0f2.1633972263.git.naveennaidu479@gmail.com> (raw)
In-Reply-To: <cover.1633972263.git.naveennaidu479@gmail.com>
Include PCI_ERROR_RESPONSE along with 0xFFFFFFFF in the comment to
specify a hardware error. This helps finding where MMIO read error
occurs easier to find.
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
---
drivers/pci/controller/pci-hyperv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
index 67c46e52c0dc..7e1102e3d7c6 100644
--- a/drivers/pci/controller/pci-hyperv.c
+++ b/drivers/pci/controller/pci-hyperv.c
@@ -1774,7 +1774,7 @@ static void prepopulate_bars(struct hv_pcibus_device *hbus)
* If the memory enable bit is already set, Hyper-V silently ignores
* the below BAR updates, and the related PCI device driver can not
* work, because reading from the device register(s) always returns
- * 0xFFFFFFFF.
+ * 0xFFFFFFFF (PCI_ERROR_RESPONSE).
*/
list_for_each_entry(hpdev, &hbus->children, list_entry) {
_hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command);
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Naveen Naidu <naveennaidu479@gmail.com>
To: bhelgaas@google.com
Cc: "Rob Herring" <robh@kernel.org>, "Wei Liu" <wei.liu@kernel.org>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Stephen Hemminger" <sthemmin@microsoft.com>,
"open list:Hyper-V/Azure CORE AND DRIVERS"
<linux-hyperv@vger.kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
linux-pci@vger.kernel.org,
"Haiyang Zhang" <haiyangz@microsoft.com>,
"Dexuan Cui" <decui@microsoft.com>,
linux-kernel@vger.kernel.org,
"K. Y. Srinivasan" <kys@microsoft.com>,
linux-kernel-mentees@lists.linuxfoundation.org
Subject: [PATCH 21/22] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error
Date: Mon, 11 Oct 2021 23:42:39 +0530 [thread overview]
Message-ID: <04f4c0ad634eb304b31bbbb8eed8a257712dc0f2.1633972263.git.naveennaidu479@gmail.com> (raw)
In-Reply-To: <cover.1633972263.git.naveennaidu479@gmail.com>
Include PCI_ERROR_RESPONSE along with 0xFFFFFFFF in the comment to
specify a hardware error. This helps finding where MMIO read error
occurs easier to find.
Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
---
drivers/pci/controller/pci-hyperv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c
index 67c46e52c0dc..7e1102e3d7c6 100644
--- a/drivers/pci/controller/pci-hyperv.c
+++ b/drivers/pci/controller/pci-hyperv.c
@@ -1774,7 +1774,7 @@ static void prepopulate_bars(struct hv_pcibus_device *hbus)
* If the memory enable bit is already set, Hyper-V silently ignores
* the below BAR updates, and the related PCI device driver can not
* work, because reading from the device register(s) always returns
- * 0xFFFFFFFF.
+ * 0xFFFFFFFF (PCI_ERROR_RESPONSE).
*/
list_for_each_entry(hpdev, &hbus->children, list_entry) {
_hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command);
--
2.25.1
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next prev parent reply other threads:[~2021-10-11 18:12 UTC|newest]
Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-11 17:35 [PATCH 00/22] PCI: Unify PCI error response checking Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:37 ` [PATCH 01/22] PCI: Add PCI_ERROR_RESPONSE and it's related defintions Naveen Naidu
2021-10-11 17:37 ` Naveen Naidu
2021-10-11 17:37 ` Naveen Naidu
2021-10-11 17:37 ` Naveen Naidu
2021-10-11 17:37 ` Naveen Naidu
2021-10-11 17:37 ` Naveen Naidu
2021-10-11 17:38 ` [PATCH 02/22] PCI: Unify PCI error response checking Naveen Naidu
2021-10-11 17:38 ` Naveen Naidu
2021-10-11 22:05 ` Rob Herring
2021-10-11 22:05 ` Rob Herring
2021-10-12 16:21 ` Naveen Naidu
2021-10-12 16:21 ` Naveen Naidu
2021-10-12 18:02 ` Rob Herring
2021-10-12 18:02 ` Rob Herring
2021-10-12 22:52 ` Pali Rohár
2021-10-12 22:52 ` Pali Rohár
2021-10-13 2:43 ` Bjorn Helgaas
2021-10-13 2:43 ` Bjorn Helgaas
2021-10-13 13:06 ` Rob Herring
2021-10-13 13:06 ` Rob Herring
2021-10-13 17:16 ` Naveen Naidu
2021-10-13 17:16 ` Naveen Naidu
2021-10-13 17:54 ` Pali Rohár
2021-10-13 17:54 ` Pali Rohár
2021-10-13 18:48 ` Bjorn Helgaas
2021-10-13 18:48 ` Bjorn Helgaas
2021-10-13 21:47 ` Rob Herring
2021-10-13 21:47 ` Rob Herring
2021-10-13 22:03 ` Pali Rohár
2021-10-13 22:03 ` Pali Rohár
2021-10-13 22:12 ` Bjorn Helgaas
2021-10-13 22:12 ` Bjorn Helgaas
2021-10-11 17:45 ` [PATCH 03/22] PCI: thunder: Use SET_PCI_ERROR_RESPONSE() when device not found Naveen Naidu
2021-10-11 17:45 ` Naveen Naidu
2021-10-11 17:45 ` Naveen Naidu
2021-10-11 17:46 ` [PATCH 04/22] PCI: iproc: " Naveen Naidu
2021-10-11 17:46 ` Naveen Naidu
2021-10-11 17:46 ` Naveen Naidu
2021-10-11 17:51 ` [PATCH 05/22] PCI: mediatek: " Naveen Naidu
2021-10-11 17:51 ` Naveen Naidu
2021-10-11 17:51 ` Naveen Naidu
2021-10-11 17:51 ` Naveen Naidu
2021-10-11 17:52 ` [PATCH 06/22] PCI: exynos: " Naveen Naidu
2021-10-11 17:52 ` Naveen Naidu
2021-10-11 17:52 ` Naveen Naidu
2021-10-11 17:53 ` [PATCH 07/22] PCI: histb: " Naveen Naidu
2021-10-11 17:53 ` Naveen Naidu
2021-10-11 17:55 ` [PATCH 08/22] PCI: kirin: " Naveen Naidu
2021-10-11 17:55 ` Naveen Naidu
2021-10-11 17:56 ` [PATCH 09/22] PCI: aardvark: " Naveen Naidu
2021-10-11 17:56 ` Naveen Naidu
2021-10-11 17:56 ` Naveen Naidu
2021-10-11 18:08 ` Pali Rohár
2021-10-11 18:08 ` Pali Rohár
2021-10-11 18:08 ` Pali Rohár
2021-10-11 18:28 ` Naveen Naidu
2021-10-11 18:28 ` Naveen Naidu
2021-10-11 18:28 ` Naveen Naidu
[not found] ` <20211011182526.kboaxqofdpd2jjrl@theprophet>
2021-10-11 18:41 ` Pali Rohár
2021-10-11 18:41 ` Pali Rohár
2021-10-11 18:41 ` Pali Rohár
2021-10-12 15:59 ` Naveen Naidu
2021-10-12 15:59 ` Naveen Naidu
2021-10-12 15:59 ` Naveen Naidu
2021-10-13 2:13 ` Bjorn Helgaas
2021-10-13 2:13 ` Bjorn Helgaas
2021-10-13 2:13 ` Bjorn Helgaas
2021-10-13 17:59 ` Pali Rohár
2021-10-13 17:59 ` Pali Rohár
2021-10-13 17:59 ` Pali Rohár
2021-10-11 18:00 ` [PATCH 10/22] PCI: mvebu: " Naveen Naidu
2021-10-11 18:00 ` Naveen Naidu
2021-10-11 18:00 ` Naveen Naidu
2021-10-11 18:00 ` [PATCH 11/22] PCI: altera: " Naveen Naidu
2021-10-11 18:00 ` Naveen Naidu
2021-10-11 18:02 ` [PATCH 12/22] PCI: rcar: " Naveen Naidu
2021-10-11 18:02 ` Naveen Naidu
2021-10-11 18:02 ` [PATCH 13/22] PCI: rockchip: " Naveen Naidu
2021-10-11 18:02 ` Naveen Naidu
2021-10-11 18:02 ` Naveen Naidu
2021-10-11 18:02 ` Naveen Naidu
2021-10-11 18:04 ` [PATCH 14/22] PCI/ERR: Use RESPONSE_IS_PCI_ERROR() to check read from hardware Naveen Naidu
2021-10-11 18:04 ` Naveen Naidu
2021-10-11 18:06 ` [PATCH 15/22] PCI: vmd: " Naveen Naidu
2021-10-11 18:06 ` Naveen Naidu
2021-10-14 18:04 ` Jonathan Derrick
2021-10-14 18:04 ` Jonathan Derrick
2021-10-11 18:07 ` [PATCH 16/22] PCI: pciehp: " Naveen Naidu
2021-10-11 18:07 ` Naveen Naidu
2021-10-11 19:47 ` Lukas Wunner
2021-10-11 19:47 ` Lukas Wunner
2021-10-12 16:05 ` Naveen Naidu
2021-10-12 16:05 ` Naveen Naidu
2021-10-12 23:12 ` Pali Rohár
2021-10-12 23:12 ` Pali Rohár
2021-10-13 12:20 ` Lukas Wunner
2021-10-13 12:20 ` Lukas Wunner
2021-10-11 18:08 ` [PATCH 17/22] PCI/DPC: " Naveen Naidu
2021-10-11 18:08 ` Naveen Naidu
2021-10-11 18:08 ` Naveen Naidu
2021-10-11 18:10 ` [PATCH 18/22] PCI/PME: " Naveen Naidu
2021-10-11 18:10 ` Naveen Naidu
2021-10-11 18:11 ` [PATCH 19/22] PCI: cpqphp: " Naveen Naidu
2021-10-11 18:11 ` Naveen Naidu
2021-10-11 18:11 ` [PATCH 20/22] PCI: keystone: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-11 18:11 ` Naveen Naidu
2021-10-11 18:12 ` Naveen Naidu [this message]
2021-10-11 18:12 ` [PATCH 21/22] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu
2021-10-11 18:13 ` [PATCH 22/22] PCI: xgene: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-11 18:13 ` Naveen Naidu
2021-10-11 18:13 ` Naveen Naidu
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