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From: "Pali Rohár" <pali@kernel.org>
To: Naveen Naidu <naveennaidu479@gmail.com>
Cc: bhelgaas@google.com,
	linux-kernel-mentees@lists.linuxfoundation.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"moderated list:PCI DRIVER FOR AARDVARK (Marvell Armada 3700)"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 09/22] PCI: aardvark: Use SET_PCI_ERROR_RESPONSE() when device not found
Date: Mon, 11 Oct 2021 20:41:44 +0200	[thread overview]
Message-ID: <20211011184144.qcbmif7hvzozdgzw@pali> (raw)
In-Reply-To: <20211011182526.kboaxqofdpd2jjrl@theprophet>

On Monday 11 October 2021 23:55:35 Naveen Naidu wrote:
> On 11/10, Pali Rohár wrote:
> > On Monday 11 October 2021 23:26:33 Naveen Naidu wrote:
> > > An MMIO read from a PCI device that doesn't exist or doesn't respond
> > > causes a PCI error.  There's no real data to return to satisfy the
> > > CPU read, so most hardware fabricates ~0 data.
> > > 
> > > Use SET_PCI_ERROR_RESPONSE() to set the error response, when a faulty
> > > read occurs.
> > > 
> > > This helps unify PCI error response checking and make error check
> > > consistent and easier to find.
> > > 
> > > Compile tested only.
> > > 
> > > Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
> > > ---
> > >  drivers/pci/controller/pci-aardvark.c | 8 ++++----
> > >  1 file changed, 4 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> > > index 596ebcfcc82d..dc2f820ef55f 100644
> > > --- a/drivers/pci/controller/pci-aardvark.c
> > > +++ b/drivers/pci/controller/pci-aardvark.c
> > > @@ -894,7 +894,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
> > >  	int ret;
> > >  
> > >  	if (!advk_pcie_valid_device(pcie, bus, devfn)) {
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > 
> > Hello! Now I'm looking at this macro, and should not it depends on
> > "size" argument? If doing 8-bit or 16-bit read operation then should not
> > it rather sets only low 8 bits or low 16 bits to ones?
> >
> 
> Hello o/, Thank you for the review.
> 
> Yes! you are right that it should indeed depend on the "size" argument.
> And that is what the SET_PCI_ERROR_RESPONSE macro does. The macro is
> defined as:
> 
>   #define PCI_ERROR_RESPONSE           (~0ULL)
>   #define SET_PCI_ERROR_RESPONSE(val)  (*val = ((typeof(*val))PCI_ERROR_RESPONSE))
> 
> The macro was part of "Patch 1/22" and is present here [1]. Apologies if
> I added the receipient incorrectly.
> 
> [1]:
> https://lore.kernel.org/linux-pci/d8e423386aad3d78bca575a7521b138508638e3b.1633972263.git.naveennaidu479@gmail.com/T/#m37295a0dcfe0d7e0f67efce3633efd7b891949c4
> 
> IIUC, the typeof(*val) helps in setting the value according to the size
> of the argument.
> 
> Please let me know if my understanding is wrong.

Hello! I mean "size" function argument which is passed as variable.

Function itself is declared as:

static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val);

And in "size" argument is stored number of bytes, kind of read operation
(read byte, read word, read dword). In *val is then stored read value.
For byte operation, just low 8 bits in *val variable are set.

Because *val is u32 it means that typeof(*val) is always 4 independently
of the "size" argument.

For example other project U-Boot has also pci-aardvark.c driver and
U-Boot has for (probably same) purpose pci_get_ff() macro, see:
https://source.denx.de/u-boot/u-boot/-/blob/v2021.10/drivers/pci/pci-aardvark.c#L367

I'm not saying if current approach to always sets 0xffffffff
(independently of "size" argument) is correct or not as I do not know
it too! I'm just giving example that this PCI code has very similar
implementation of other project (U-Boot) which sets number of ones based
on the size argument.

So probably something for other people to decide.

Anyway, I very like this your idea to have a macro which purpose is to
explicitly indicate error during config read operation! And to unify all
drivers to use same style for signalling config read error.

> > >  		return PCIBIOS_DEVICE_NOT_FOUND;
> > >  	}
> > >  
> > > @@ -920,7 +920,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
> > >  			*val = CFG_RD_CRS_VAL;
> > >  			return PCIBIOS_SUCCESSFUL;
> > >  		}
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > >  		return PCIBIOS_SET_FAILED;
> > >  	}
> > >  
> > > @@ -955,14 +955,14 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
> > >  			*val = CFG_RD_CRS_VAL;
> > >  			return PCIBIOS_SUCCESSFUL;
> > >  		}
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > >  		return PCIBIOS_SET_FAILED;
> > >  	}
> > >  
> > >  	/* Check PIO status and get the read result */
> > >  	ret = advk_pcie_check_pio_status(pcie, allow_crs, val);
> > >  	if (ret < 0) {
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > >  		return PCIBIOS_SET_FAILED;
> > >  	}
> > >  
> > > -- 
> > > 2.25.1
> > > 

WARNING: multiple messages have this Message-ID (diff)
From: "Pali Rohár" <pali@kernel.org>
To: Naveen Naidu <naveennaidu479@gmail.com>
Cc: "Rob Herring" <robh@kernel.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	bhelgaas@google.com,
	linux-kernel-mentees@lists.linuxfoundation.org,
	"moderated list:PCI DRIVER FOR AARDVARK (Marvell Armada 3700)"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 09/22] PCI: aardvark: Use SET_PCI_ERROR_RESPONSE() when device not found
Date: Mon, 11 Oct 2021 20:41:44 +0200	[thread overview]
Message-ID: <20211011184144.qcbmif7hvzozdgzw@pali> (raw)
In-Reply-To: <20211011182526.kboaxqofdpd2jjrl@theprophet>

On Monday 11 October 2021 23:55:35 Naveen Naidu wrote:
> On 11/10, Pali Rohár wrote:
> > On Monday 11 October 2021 23:26:33 Naveen Naidu wrote:
> > > An MMIO read from a PCI device that doesn't exist or doesn't respond
> > > causes a PCI error.  There's no real data to return to satisfy the
> > > CPU read, so most hardware fabricates ~0 data.
> > > 
> > > Use SET_PCI_ERROR_RESPONSE() to set the error response, when a faulty
> > > read occurs.
> > > 
> > > This helps unify PCI error response checking and make error check
> > > consistent and easier to find.
> > > 
> > > Compile tested only.
> > > 
> > > Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
> > > ---
> > >  drivers/pci/controller/pci-aardvark.c | 8 ++++----
> > >  1 file changed, 4 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> > > index 596ebcfcc82d..dc2f820ef55f 100644
> > > --- a/drivers/pci/controller/pci-aardvark.c
> > > +++ b/drivers/pci/controller/pci-aardvark.c
> > > @@ -894,7 +894,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
> > >  	int ret;
> > >  
> > >  	if (!advk_pcie_valid_device(pcie, bus, devfn)) {
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > 
> > Hello! Now I'm looking at this macro, and should not it depends on
> > "size" argument? If doing 8-bit or 16-bit read operation then should not
> > it rather sets only low 8 bits or low 16 bits to ones?
> >
> 
> Hello o/, Thank you for the review.
> 
> Yes! you are right that it should indeed depend on the "size" argument.
> And that is what the SET_PCI_ERROR_RESPONSE macro does. The macro is
> defined as:
> 
>   #define PCI_ERROR_RESPONSE           (~0ULL)
>   #define SET_PCI_ERROR_RESPONSE(val)  (*val = ((typeof(*val))PCI_ERROR_RESPONSE))
> 
> The macro was part of "Patch 1/22" and is present here [1]. Apologies if
> I added the receipient incorrectly.
> 
> [1]:
> https://lore.kernel.org/linux-pci/d8e423386aad3d78bca575a7521b138508638e3b.1633972263.git.naveennaidu479@gmail.com/T/#m37295a0dcfe0d7e0f67efce3633efd7b891949c4
> 
> IIUC, the typeof(*val) helps in setting the value according to the size
> of the argument.
> 
> Please let me know if my understanding is wrong.

Hello! I mean "size" function argument which is passed as variable.

Function itself is declared as:

static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val);

And in "size" argument is stored number of bytes, kind of read operation
(read byte, read word, read dword). In *val is then stored read value.
For byte operation, just low 8 bits in *val variable are set.

Because *val is u32 it means that typeof(*val) is always 4 independently
of the "size" argument.

For example other project U-Boot has also pci-aardvark.c driver and
U-Boot has for (probably same) purpose pci_get_ff() macro, see:
https://source.denx.de/u-boot/u-boot/-/blob/v2021.10/drivers/pci/pci-aardvark.c#L367

I'm not saying if current approach to always sets 0xffffffff
(independently of "size" argument) is correct or not as I do not know
it too! I'm just giving example that this PCI code has very similar
implementation of other project (U-Boot) which sets number of ones based
on the size argument.

So probably something for other people to decide.

Anyway, I very like this your idea to have a macro which purpose is to
explicitly indicate error during config read operation! And to unify all
drivers to use same style for signalling config read error.

> > >  		return PCIBIOS_DEVICE_NOT_FOUND;
> > >  	}
> > >  
> > > @@ -920,7 +920,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
> > >  			*val = CFG_RD_CRS_VAL;
> > >  			return PCIBIOS_SUCCESSFUL;
> > >  		}
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > >  		return PCIBIOS_SET_FAILED;
> > >  	}
> > >  
> > > @@ -955,14 +955,14 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
> > >  			*val = CFG_RD_CRS_VAL;
> > >  			return PCIBIOS_SUCCESSFUL;
> > >  		}
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > >  		return PCIBIOS_SET_FAILED;
> > >  	}
> > >  
> > >  	/* Check PIO status and get the read result */
> > >  	ret = advk_pcie_check_pio_status(pcie, allow_crs, val);
> > >  	if (ret < 0) {
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > >  		return PCIBIOS_SET_FAILED;
> > >  	}
> > >  
> > > -- 
> > > 2.25.1
> > > 
_______________________________________________
Linux-kernel-mentees mailing list
Linux-kernel-mentees@lists.linuxfoundation.org
https://lists.linuxfoundation.org/mailman/listinfo/linux-kernel-mentees

WARNING: multiple messages have this Message-ID (diff)
From: "Pali Rohár" <pali@kernel.org>
To: Naveen Naidu <naveennaidu479@gmail.com>
Cc: bhelgaas@google.com,
	linux-kernel-mentees@lists.linuxfoundation.org,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"moderated list:PCI DRIVER FOR AARDVARK (Marvell Armada 3700)"
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 09/22] PCI: aardvark: Use SET_PCI_ERROR_RESPONSE() when device not found
Date: Mon, 11 Oct 2021 20:41:44 +0200	[thread overview]
Message-ID: <20211011184144.qcbmif7hvzozdgzw@pali> (raw)
In-Reply-To: <20211011182526.kboaxqofdpd2jjrl@theprophet>

On Monday 11 October 2021 23:55:35 Naveen Naidu wrote:
> On 11/10, Pali Rohár wrote:
> > On Monday 11 October 2021 23:26:33 Naveen Naidu wrote:
> > > An MMIO read from a PCI device that doesn't exist or doesn't respond
> > > causes a PCI error.  There's no real data to return to satisfy the
> > > CPU read, so most hardware fabricates ~0 data.
> > > 
> > > Use SET_PCI_ERROR_RESPONSE() to set the error response, when a faulty
> > > read occurs.
> > > 
> > > This helps unify PCI error response checking and make error check
> > > consistent and easier to find.
> > > 
> > > Compile tested only.
> > > 
> > > Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com>
> > > ---
> > >  drivers/pci/controller/pci-aardvark.c | 8 ++++----
> > >  1 file changed, 4 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> > > index 596ebcfcc82d..dc2f820ef55f 100644
> > > --- a/drivers/pci/controller/pci-aardvark.c
> > > +++ b/drivers/pci/controller/pci-aardvark.c
> > > @@ -894,7 +894,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
> > >  	int ret;
> > >  
> > >  	if (!advk_pcie_valid_device(pcie, bus, devfn)) {
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > 
> > Hello! Now I'm looking at this macro, and should not it depends on
> > "size" argument? If doing 8-bit or 16-bit read operation then should not
> > it rather sets only low 8 bits or low 16 bits to ones?
> >
> 
> Hello o/, Thank you for the review.
> 
> Yes! you are right that it should indeed depend on the "size" argument.
> And that is what the SET_PCI_ERROR_RESPONSE macro does. The macro is
> defined as:
> 
>   #define PCI_ERROR_RESPONSE           (~0ULL)
>   #define SET_PCI_ERROR_RESPONSE(val)  (*val = ((typeof(*val))PCI_ERROR_RESPONSE))
> 
> The macro was part of "Patch 1/22" and is present here [1]. Apologies if
> I added the receipient incorrectly.
> 
> [1]:
> https://lore.kernel.org/linux-pci/d8e423386aad3d78bca575a7521b138508638e3b.1633972263.git.naveennaidu479@gmail.com/T/#m37295a0dcfe0d7e0f67efce3633efd7b891949c4
> 
> IIUC, the typeof(*val) helps in setting the value according to the size
> of the argument.
> 
> Please let me know if my understanding is wrong.

Hello! I mean "size" function argument which is passed as variable.

Function itself is declared as:

static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val);

And in "size" argument is stored number of bytes, kind of read operation
(read byte, read word, read dword). In *val is then stored read value.
For byte operation, just low 8 bits in *val variable are set.

Because *val is u32 it means that typeof(*val) is always 4 independently
of the "size" argument.

For example other project U-Boot has also pci-aardvark.c driver and
U-Boot has for (probably same) purpose pci_get_ff() macro, see:
https://source.denx.de/u-boot/u-boot/-/blob/v2021.10/drivers/pci/pci-aardvark.c#L367

I'm not saying if current approach to always sets 0xffffffff
(independently of "size" argument) is correct or not as I do not know
it too! I'm just giving example that this PCI code has very similar
implementation of other project (U-Boot) which sets number of ones based
on the size argument.

So probably something for other people to decide.

Anyway, I very like this your idea to have a macro which purpose is to
explicitly indicate error during config read operation! And to unify all
drivers to use same style for signalling config read error.

> > >  		return PCIBIOS_DEVICE_NOT_FOUND;
> > >  	}
> > >  
> > > @@ -920,7 +920,7 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
> > >  			*val = CFG_RD_CRS_VAL;
> > >  			return PCIBIOS_SUCCESSFUL;
> > >  		}
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > >  		return PCIBIOS_SET_FAILED;
> > >  	}
> > >  
> > > @@ -955,14 +955,14 @@ static int advk_pcie_rd_conf(struct pci_bus *bus, u32 devfn,
> > >  			*val = CFG_RD_CRS_VAL;
> > >  			return PCIBIOS_SUCCESSFUL;
> > >  		}
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > >  		return PCIBIOS_SET_FAILED;
> > >  	}
> > >  
> > >  	/* Check PIO status and get the read result */
> > >  	ret = advk_pcie_check_pio_status(pcie, allow_crs, val);
> > >  	if (ret < 0) {
> > > -		*val = 0xffffffff;
> > > +		SET_PCI_ERROR_RESPONSE(val);
> > >  		return PCIBIOS_SET_FAILED;
> > >  	}
> > >  
> > > -- 
> > > 2.25.1
> > > 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2021-10-11 18:41 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-11 17:35 [PATCH 00/22] PCI: Unify PCI error response checking Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:35 ` Naveen Naidu
2021-10-11 17:37 ` [PATCH 01/22] PCI: Add PCI_ERROR_RESPONSE and it's related defintions Naveen Naidu
2021-10-11 17:37   ` Naveen Naidu
2021-10-11 17:37   ` Naveen Naidu
2021-10-11 17:37   ` Naveen Naidu
2021-10-11 17:37   ` Naveen Naidu
2021-10-11 17:37   ` Naveen Naidu
2021-10-11 17:38 ` [PATCH 02/22] PCI: Unify PCI error response checking Naveen Naidu
2021-10-11 17:38   ` Naveen Naidu
2021-10-11 22:05   ` Rob Herring
2021-10-11 22:05     ` Rob Herring
2021-10-12 16:21     ` Naveen Naidu
2021-10-12 16:21       ` Naveen Naidu
2021-10-12 18:02       ` Rob Herring
2021-10-12 18:02         ` Rob Herring
2021-10-12 22:52       ` Pali Rohár
2021-10-12 22:52         ` Pali Rohár
2021-10-13  2:43     ` Bjorn Helgaas
2021-10-13  2:43       ` Bjorn Helgaas
2021-10-13 13:06       ` Rob Herring
2021-10-13 13:06         ` Rob Herring
2021-10-13 17:16         ` Naveen Naidu
2021-10-13 17:16           ` Naveen Naidu
2021-10-13 17:54           ` Pali Rohár
2021-10-13 17:54             ` Pali Rohár
2021-10-13 18:48           ` Bjorn Helgaas
2021-10-13 18:48             ` Bjorn Helgaas
2021-10-13 21:47           ` Rob Herring
2021-10-13 21:47             ` Rob Herring
2021-10-13 22:03             ` Pali Rohár
2021-10-13 22:03               ` Pali Rohár
2021-10-13 22:12             ` Bjorn Helgaas
2021-10-13 22:12               ` Bjorn Helgaas
2021-10-11 17:45 ` [PATCH 03/22] PCI: thunder: Use SET_PCI_ERROR_RESPONSE() when device not found Naveen Naidu
2021-10-11 17:45   ` Naveen Naidu
2021-10-11 17:45   ` Naveen Naidu
2021-10-11 17:46 ` [PATCH 04/22] PCI: iproc: " Naveen Naidu
2021-10-11 17:46   ` Naveen Naidu
2021-10-11 17:46   ` Naveen Naidu
2021-10-11 17:51 ` [PATCH 05/22] PCI: mediatek: " Naveen Naidu
2021-10-11 17:51   ` Naveen Naidu
2021-10-11 17:51   ` Naveen Naidu
2021-10-11 17:51   ` Naveen Naidu
2021-10-11 17:52 ` [PATCH 06/22] PCI: exynos: " Naveen Naidu
2021-10-11 17:52   ` Naveen Naidu
2021-10-11 17:52   ` Naveen Naidu
2021-10-11 17:53 ` [PATCH 07/22] PCI: histb: " Naveen Naidu
2021-10-11 17:53   ` Naveen Naidu
2021-10-11 17:55 ` [PATCH 08/22] PCI: kirin: " Naveen Naidu
2021-10-11 17:55   ` Naveen Naidu
2021-10-11 17:56 ` [PATCH 09/22] PCI: aardvark: " Naveen Naidu
2021-10-11 17:56   ` Naveen Naidu
2021-10-11 17:56   ` Naveen Naidu
2021-10-11 18:08   ` Pali Rohár
2021-10-11 18:08     ` Pali Rohár
2021-10-11 18:08     ` Pali Rohár
2021-10-11 18:28     ` Naveen Naidu
2021-10-11 18:28       ` Naveen Naidu
2021-10-11 18:28       ` Naveen Naidu
     [not found]     ` <20211011182526.kboaxqofdpd2jjrl@theprophet>
2021-10-11 18:41       ` Pali Rohár [this message]
2021-10-11 18:41         ` Pali Rohár
2021-10-11 18:41         ` Pali Rohár
2021-10-12 15:59         ` Naveen Naidu
2021-10-12 15:59           ` Naveen Naidu
2021-10-12 15:59           ` Naveen Naidu
2021-10-13  2:13           ` Bjorn Helgaas
2021-10-13  2:13             ` Bjorn Helgaas
2021-10-13  2:13             ` Bjorn Helgaas
2021-10-13 17:59             ` Pali Rohár
2021-10-13 17:59               ` Pali Rohár
2021-10-13 17:59               ` Pali Rohár
2021-10-11 18:00 ` [PATCH 10/22] PCI: mvebu: " Naveen Naidu
2021-10-11 18:00   ` Naveen Naidu
2021-10-11 18:00   ` Naveen Naidu
2021-10-11 18:00 ` [PATCH 11/22] PCI: altera: " Naveen Naidu
2021-10-11 18:00   ` Naveen Naidu
2021-10-11 18:02 ` [PATCH 12/22] PCI: rcar: " Naveen Naidu
2021-10-11 18:02   ` Naveen Naidu
2021-10-11 18:02 ` [PATCH 13/22] PCI: rockchip: " Naveen Naidu
2021-10-11 18:02   ` Naveen Naidu
2021-10-11 18:02   ` Naveen Naidu
2021-10-11 18:02   ` Naveen Naidu
2021-10-11 18:04 ` [PATCH 14/22] PCI/ERR: Use RESPONSE_IS_PCI_ERROR() to check read from hardware Naveen Naidu
2021-10-11 18:04   ` Naveen Naidu
2021-10-11 18:06 ` [PATCH 15/22] PCI: vmd: " Naveen Naidu
2021-10-11 18:06   ` Naveen Naidu
2021-10-14 18:04   ` Jonathan Derrick
2021-10-14 18:04     ` Jonathan Derrick
2021-10-11 18:07 ` [PATCH 16/22] PCI: pciehp: " Naveen Naidu
2021-10-11 18:07   ` Naveen Naidu
2021-10-11 19:47   ` Lukas Wunner
2021-10-11 19:47     ` Lukas Wunner
2021-10-12 16:05     ` Naveen Naidu
2021-10-12 16:05       ` Naveen Naidu
2021-10-12 23:12       ` Pali Rohár
2021-10-12 23:12         ` Pali Rohár
2021-10-13 12:20         ` Lukas Wunner
2021-10-13 12:20           ` Lukas Wunner
2021-10-11 18:08 ` [PATCH 17/22] PCI/DPC: " Naveen Naidu
2021-10-11 18:08   ` Naveen Naidu
2021-10-11 18:08   ` Naveen Naidu
2021-10-11 18:10 ` [PATCH 18/22] PCI/PME: " Naveen Naidu
2021-10-11 18:10   ` Naveen Naidu
2021-10-11 18:11 ` [PATCH 19/22] PCI: cpqphp: " Naveen Naidu
2021-10-11 18:11   ` Naveen Naidu
2021-10-11 18:11 ` [PATCH 20/22] PCI: keystone: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-11 18:11   ` Naveen Naidu
2021-10-11 18:12 ` [PATCH 21/22] PCI: hv: Use PCI_ERROR_RESPONSE to specify hardware read error Naveen Naidu
2021-10-11 18:12   ` Naveen Naidu
2021-10-11 18:13 ` [PATCH 22/22] PCI: xgene: Use PCI_ERROR_RESPONSE to specify hardware error Naveen Naidu
2021-10-11 18:13   ` Naveen Naidu
2021-10-11 18:13   ` Naveen Naidu

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