From: Anitha Chrisanthus <anitha.chrisanthus@intel.com> To: dri-devel@lists.freedesktop.org, anitha.chrisanthus@intel.com, bob.j.paauwe@intel.com, edmund.j.dea@intel.com Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org, rodrigo.vivi@intel.com Subject: [PATCH 00/59] Add support for Keem Bay DRM driver Date: Tue, 30 Jun 2020 14:27:12 -0700 [thread overview] Message-ID: <1593552491-23698-1-git-send-email-anitha.chrisanthus@intel.com> (raw) This is a new DRM driver for Intel's KeemBay SOC. The SoC couples an ARM Cortex A53 CPU with an Intel Movidius VPU. This driver is tested with the KMB EVM board which is the refernce baord for Keem Bay SOC. The SOC's display pipeline is as follows +--------------+ +---------+ +-----------------------+ |LCD controller| -> |Mipi DSI | -> |Mipi to HDMI Converter | +--------------+ +---------+ +-----------------------+ LCD controller and Mipi DSI transmitter are part of the SOC and mipi to HDMI converter is ADV7535 for KMB EVM board. The DRM driver is a basic KMS atomic modesetting display driver and has no 2D or 3D graphics.It calls into the ADV bridge driver at the connector level. Only 1080p resolution and single plane is supported at this time. The usecase is for debugging video and camera outputs. Since we are just starting the upstream process, the KMB EVM board is not in mainline and so Device tree changes are missing. Anitha Chrisanthus (52): drm/kmb: Add support for KeemBay Display drm/kmb: Added id to kmb_plane drm/kmb: Set correct values in the LAYERn_CFG register drm/kmb: Use biwise operators for register definitions drm/kmb: Updated kmb_plane_atomic_check drm/kmb: Initial check-in for Mipi DSI drm/kmb: Set OUT_FORMAT_CFG register drm/kmb: Added mipi_dsi_host initialization drm/kmb: Part 1 of Mipi Tx Initialization drm/kmb: Part 2 of Mipi Tx Initialization drm/kmb: Use correct mmio offset from data book drm/kmb: Part3 of Mipi Tx initialization drm/kmb: Part4 of Mipi Tx Initialization drm/kmb: Correct address offsets for mipi registers drm/kmb: Part5 of Mipi Tx Intitialization drm/kmb: Part6 of Mipi Tx Initialization drm/kmb: Part7 of Mipi Tx Initialization drm/kmb: Part8 of Mipi Tx Initialization drm/kmb: Added ioremap/iounmap for register access drm/kmb: Register IRQ for LCD drm/kmb: IRQ handlers for LCD and mipi dsi drm/kmb: Set hardcoded values to LCD_VSYNC_START drm/kmb: Additional register programming to update_plane drm/kmb: Add ADV7535 bridge drm/kmb: Display clock enable/disable drm/kmb: rebase to newer kernel version drm/kmb: minor name change to match device tree drm/kmb: Changed MMIO size drm/kmb: Defer Probe drm/kmb: call bridge init in the very beginning drm/kmb: Enable MSS_CAM_CLK_CTRL for LCD and MIPI drm/kmb: Set MSS_CAM_RSTN_CTRL along with enable drm/kmb: Mipi DPHY initialization changes drm/kmb: Fixed driver unload drm/kmb: Added LCD_TEST config drm/kmb: Changes for LCD to Mipi drm/kmb: Update LCD programming to match MIPI drm/kmb: Changed name of driver to kmb-drm drm/kmb: Mipi settings from input timings drm/kmb: Enable LCD interrupts drm/kmb: Enable LCD interrupts during modeset drm/kmb: Don’t inadvertantly disable LCD controller drm/kmb: SWAP R and B LCD Layer order drm/kmb: Disable ping pong mode drm/kmb: Do the layer initializations only once drm/kmb: disable the LCD layer in EOF irq handler drm/kmb: Initialize uninitialized variables drm/kmb: Added useful messages in LCD ISR kmb/drm: Prune unsupported modes drm/kmb: workaround for dma undeflow issue drm/kmb: Get System Clock from SCMI drm/kmb: work around for planar formats Edmund Dea (7): drm/kmb: Cleanup probe functions drm/kmb: Revert dsi_host back to a static variable drm/kmb: Initialize clocks for clk_msscam, clk_mipi_ecfg, & clk_mipi_cfg. drm/kmb: Remove declaration of irq_lcd/irq_mipi drm/kmb: Enable MIPI TX HS Test Pattern Generation drm/kmb: Write to LCD_LAYERn_CFG only once drm/kmb: Cleaned up code drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/kmb/Kconfig | 12 + drivers/gpu/drm/kmb/Makefile | 2 + drivers/gpu/drm/kmb/kmb_crtc.c | 243 +++++ drivers/gpu/drm/kmb/kmb_crtc.h | 61 ++ drivers/gpu/drm/kmb/kmb_drv.c | 828 +++++++++++++++++ drivers/gpu/drm/kmb/kmb_drv.h | 196 ++++ drivers/gpu/drm/kmb/kmb_dsi.c | 1950 +++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/kmb/kmb_dsi.h | 390 ++++++++ drivers/gpu/drm/kmb/kmb_plane.c | 538 +++++++++++ drivers/gpu/drm/kmb/kmb_plane.h | 142 +++ drivers/gpu/drm/kmb/kmb_regs.h | 758 +++++++++++++++ 13 files changed, 5123 insertions(+) create mode 100644 drivers/gpu/drm/kmb/Kconfig create mode 100644 drivers/gpu/drm/kmb/Makefile create mode 100644 drivers/gpu/drm/kmb/kmb_crtc.c create mode 100644 drivers/gpu/drm/kmb/kmb_crtc.h create mode 100644 drivers/gpu/drm/kmb/kmb_drv.c create mode 100644 drivers/gpu/drm/kmb/kmb_drv.h create mode 100644 drivers/gpu/drm/kmb/kmb_dsi.c create mode 100644 drivers/gpu/drm/kmb/kmb_dsi.h create mode 100644 drivers/gpu/drm/kmb/kmb_plane.c create mode 100644 drivers/gpu/drm/kmb/kmb_plane.h create mode 100644 drivers/gpu/drm/kmb/kmb_regs.h -- 2.7.4 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Anitha Chrisanthus <anitha.chrisanthus@intel.com> To: dri-devel@lists.freedesktop.org, anitha.chrisanthus@intel.com, bob.j.paauwe@intel.com, edmund.j.dea@intel.com Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 00/59] Add support for Keem Bay DRM driver Date: Tue, 30 Jun 2020 14:27:12 -0700 [thread overview] Message-ID: <1593552491-23698-1-git-send-email-anitha.chrisanthus@intel.com> (raw) This is a new DRM driver for Intel's KeemBay SOC. The SoC couples an ARM Cortex A53 CPU with an Intel Movidius VPU. This driver is tested with the KMB EVM board which is the refernce baord for Keem Bay SOC. The SOC's display pipeline is as follows +--------------+ +---------+ +-----------------------+ |LCD controller| -> |Mipi DSI | -> |Mipi to HDMI Converter | +--------------+ +---------+ +-----------------------+ LCD controller and Mipi DSI transmitter are part of the SOC and mipi to HDMI converter is ADV7535 for KMB EVM board. The DRM driver is a basic KMS atomic modesetting display driver and has no 2D or 3D graphics.It calls into the ADV bridge driver at the connector level. Only 1080p resolution and single plane is supported at this time. The usecase is for debugging video and camera outputs. Since we are just starting the upstream process, the KMB EVM board is not in mainline and so Device tree changes are missing. Anitha Chrisanthus (52): drm/kmb: Add support for KeemBay Display drm/kmb: Added id to kmb_plane drm/kmb: Set correct values in the LAYERn_CFG register drm/kmb: Use biwise operators for register definitions drm/kmb: Updated kmb_plane_atomic_check drm/kmb: Initial check-in for Mipi DSI drm/kmb: Set OUT_FORMAT_CFG register drm/kmb: Added mipi_dsi_host initialization drm/kmb: Part 1 of Mipi Tx Initialization drm/kmb: Part 2 of Mipi Tx Initialization drm/kmb: Use correct mmio offset from data book drm/kmb: Part3 of Mipi Tx initialization drm/kmb: Part4 of Mipi Tx Initialization drm/kmb: Correct address offsets for mipi registers drm/kmb: Part5 of Mipi Tx Intitialization drm/kmb: Part6 of Mipi Tx Initialization drm/kmb: Part7 of Mipi Tx Initialization drm/kmb: Part8 of Mipi Tx Initialization drm/kmb: Added ioremap/iounmap for register access drm/kmb: Register IRQ for LCD drm/kmb: IRQ handlers for LCD and mipi dsi drm/kmb: Set hardcoded values to LCD_VSYNC_START drm/kmb: Additional register programming to update_plane drm/kmb: Add ADV7535 bridge drm/kmb: Display clock enable/disable drm/kmb: rebase to newer kernel version drm/kmb: minor name change to match device tree drm/kmb: Changed MMIO size drm/kmb: Defer Probe drm/kmb: call bridge init in the very beginning drm/kmb: Enable MSS_CAM_CLK_CTRL for LCD and MIPI drm/kmb: Set MSS_CAM_RSTN_CTRL along with enable drm/kmb: Mipi DPHY initialization changes drm/kmb: Fixed driver unload drm/kmb: Added LCD_TEST config drm/kmb: Changes for LCD to Mipi drm/kmb: Update LCD programming to match MIPI drm/kmb: Changed name of driver to kmb-drm drm/kmb: Mipi settings from input timings drm/kmb: Enable LCD interrupts drm/kmb: Enable LCD interrupts during modeset drm/kmb: Don’t inadvertantly disable LCD controller drm/kmb: SWAP R and B LCD Layer order drm/kmb: Disable ping pong mode drm/kmb: Do the layer initializations only once drm/kmb: disable the LCD layer in EOF irq handler drm/kmb: Initialize uninitialized variables drm/kmb: Added useful messages in LCD ISR kmb/drm: Prune unsupported modes drm/kmb: workaround for dma undeflow issue drm/kmb: Get System Clock from SCMI drm/kmb: work around for planar formats Edmund Dea (7): drm/kmb: Cleanup probe functions drm/kmb: Revert dsi_host back to a static variable drm/kmb: Initialize clocks for clk_msscam, clk_mipi_ecfg, & clk_mipi_cfg. drm/kmb: Remove declaration of irq_lcd/irq_mipi drm/kmb: Enable MIPI TX HS Test Pattern Generation drm/kmb: Write to LCD_LAYERn_CFG only once drm/kmb: Cleaned up code drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/kmb/Kconfig | 12 + drivers/gpu/drm/kmb/Makefile | 2 + drivers/gpu/drm/kmb/kmb_crtc.c | 243 +++++ drivers/gpu/drm/kmb/kmb_crtc.h | 61 ++ drivers/gpu/drm/kmb/kmb_drv.c | 828 +++++++++++++++++ drivers/gpu/drm/kmb/kmb_drv.h | 196 ++++ drivers/gpu/drm/kmb/kmb_dsi.c | 1950 +++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/kmb/kmb_dsi.h | 390 ++++++++ drivers/gpu/drm/kmb/kmb_plane.c | 538 +++++++++++ drivers/gpu/drm/kmb/kmb_plane.h | 142 +++ drivers/gpu/drm/kmb/kmb_regs.h | 758 +++++++++++++++ 13 files changed, 5123 insertions(+) create mode 100644 drivers/gpu/drm/kmb/Kconfig create mode 100644 drivers/gpu/drm/kmb/Makefile create mode 100644 drivers/gpu/drm/kmb/kmb_crtc.c create mode 100644 drivers/gpu/drm/kmb/kmb_crtc.h create mode 100644 drivers/gpu/drm/kmb/kmb_drv.c create mode 100644 drivers/gpu/drm/kmb/kmb_drv.h create mode 100644 drivers/gpu/drm/kmb/kmb_dsi.c create mode 100644 drivers/gpu/drm/kmb/kmb_dsi.h create mode 100644 drivers/gpu/drm/kmb/kmb_plane.c create mode 100644 drivers/gpu/drm/kmb/kmb_plane.h create mode 100644 drivers/gpu/drm/kmb/kmb_regs.h -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2020-06-30 21:28 UTC|newest] Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-06-30 21:27 Anitha Chrisanthus [this message] 2020-06-30 21:27 ` [Intel-gfx] [PATCH 00/59] Add support for Keem Bay DRM driver Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 01/59] drm/kmb: Add support for KeemBay Display Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 02/59] drm/kmb: Added id to kmb_plane Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 03/59] drm/kmb: Set correct values in the LAYERn_CFG register Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 04/59] drm/kmb: Use biwise operators for register definitions Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 05/59] drm/kmb: Updated kmb_plane_atomic_check Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 06/59] drm/kmb: Initial check-in for Mipi DSI Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 07/59] drm/kmb: Set OUT_FORMAT_CFG register Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 08/59] drm/kmb: Added mipi_dsi_host initialization Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 09/59] drm/kmb: Part 1 of Mipi Tx Initialization Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 10/59] drm/kmb: Part 2 " Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 11/59] drm/kmb: Use correct mmio offset from data book Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 12/59] drm/kmb: Part3 of Mipi Tx initialization Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 13/59] drm/kmb: Part4 of Mipi Tx Initialization Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 14/59] drm/kmb: Correct address offsets for mipi registers Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 15/59] drm/kmb: Part5 of Mipi Tx Intitialization Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 16/59] drm/kmb: Part6 of Mipi Tx Initialization Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 17/59] drm/kmb: Part7 " Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 18/59] drm/kmb: Part8 " Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 19/59] drm/kmb: Added ioremap/iounmap for register access Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 20/59] drm/kmb: Register IRQ for LCD Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 21/59] drm/kmb: IRQ handlers for LCD and mipi dsi Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 22/59] drm/kmb: Set hardcoded values to LCD_VSYNC_START Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 23/59] drm/kmb: Additional register programming to update_plane Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 24/59] drm/kmb: Add ADV7535 bridge Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 25/59] drm/kmb: Display clock enable/disable Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 26/59] drm/kmb: rebase to newer kernel version Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 27/59] drm/kmb: minor name change to match device tree Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 28/59] drm/kmb: Changed MMIO size Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 29/59] drm/kmb: Defer Probe Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 30/59] drm/kmb: call bridge init in the very beginning Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 31/59] drm/kmb: Cleanup probe functions Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 32/59] drm/kmb: Revert dsi_host back to a static variable Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 33/59] drm/kmb: Initialize clocks for clk_msscam, clk_mipi_ecfg, & clk_mipi_cfg Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 34/59] drm/kmb: Enable MSS_CAM_CLK_CTRL for LCD and MIPI Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 35/59] drm/kmb: Remove declaration of irq_lcd/irq_mipi Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 36/59] drm/kmb: Enable MIPI TX HS Test Pattern Generation Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 37/59] drm/kmb: Set MSS_CAM_RSTN_CTRL along with enable Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 38/59] drm/kmb: Mipi DPHY initialization changes Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 39/59] drm/kmb: Fixed driver unload Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 40/59] drm/kmb: Added LCD_TEST config Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 41/59] drm/kmb: Changes for LCD to Mipi Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 42/59] drm/kmb: Update LCD programming to match MIPI Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 43/59] drm/kmb: Changed name of driver to kmb-drm Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 44/59] drm/kmb: Mipi settings from input timings Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 45/59] drm/kmb: Enable LCD interrupts Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 46/59] drm/kmb: Enable LCD interrupts during modeset Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:27 ` [PATCH 47/59] drm/kmb: Don’t inadvertantly disable LCD controller Anitha Chrisanthus 2020-06-30 21:27 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 48/59] drm/kmb: SWAP R and B LCD Layer order Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 49/59] drm/kmb: Disable ping pong mode Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 50/59] drm/kmb: Do the layer initializations only once Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 51/59] drm/kmb: Write to LCD_LAYERn_CFG " Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 52/59] drm/kmb: Cleaned up code Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 53/59] drm/kmb: disable the LCD layer in EOF irq handler Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 54/59] drm/kmb: Initialize uninitialized variables Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 55/59] drm/kmb: Added useful messages in LCD ISR Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 56/59] kmb/drm: Prune unsupported modes Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 57/59] drm/kmb: workaround for dma undeflow issue Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 58/59] drm/kmb: Get System Clock from SCMI Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 21:28 ` [PATCH 59/59] drm/kmb: work around for planar formats Anitha Chrisanthus 2020-06-30 21:28 ` [Intel-gfx] " Anitha Chrisanthus 2020-06-30 22:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for Keem Bay DRM driver Patchwork 2020-07-01 3:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-07-01 6:46 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2020-07-01 7:01 ` [PATCH 00/59] " Sam Ravnborg 2020-07-01 7:01 ` [Intel-gfx] " Sam Ravnborg 2020-07-01 21:53 ` Chrisanthus, Anitha 2020-07-01 21:53 ` [Intel-gfx] " Chrisanthus, Anitha 2020-07-02 10:19 ` Neil Armstrong 2020-07-02 10:19 ` [Intel-gfx] " Neil Armstrong
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