From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Subject: [PATCH 10/27] drm/i915: Move i915_gem_init_contexts() earlier Date: Tue, 12 Nov 2019 09:28:37 +0000 [thread overview] Message-ID: <20191112092854.869-10-chris@chris-wilson.co.uk> (raw) In-Reply-To: <20191112092854.869-1-chris@chris-wilson.co.uk> As the GEM global context setup is now independent of the GT state (although GT does currently still depending upon the global i915->kernel_context), we can move its init earlier, leaving the gt init ready to extracted. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_gem.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 92a5c9ab3445..011b3763697d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1216,18 +1216,17 @@ int i915_gem_init(struct drm_i915_private *dev_priv) } intel_gt_init(&dev_priv->gt); - i915_gem_init__contexts(dev_priv); ret = intel_engines_setup(&dev_priv->gt); if (ret) { GEM_BUG_ON(ret == -EIO); - goto err_unlock; + goto err_gt_early; } ret = intel_engines_init(&dev_priv->gt); if (ret) { GEM_BUG_ON(ret == -EIO); - goto err_scratch; + goto err_engines; } intel_uc_init(&dev_priv->gt.uc); @@ -1254,19 +1253,19 @@ int i915_gem_init(struct drm_i915_private *dev_priv) ret = intel_engines_verify_workarounds(&dev_priv->gt); if (ret) - goto err_gt; + goto err_gt_late; ret = __intel_engines_record_defaults(&dev_priv->gt); if (ret) - goto err_gt; + goto err_gt_late; ret = i915_inject_probe_error(dev_priv, -ENODEV); if (ret) - goto err_gt; + goto err_gt_late; ret = i915_inject_probe_error(dev_priv, -EIO); if (ret) - goto err_gt; + goto err_gt_late; intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL); @@ -1278,7 +1277,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) * HW as irrevisibly wedged, but keep enough state around that the * driver doesn't explode during runtime. */ -err_gt: +err_gt_late: intel_gt_set_wedged_on_init(&dev_priv->gt); i915_gem_suspend(dev_priv); i915_gem_suspend_late(dev_priv); @@ -1287,11 +1286,12 @@ int i915_gem_init(struct drm_i915_private *dev_priv) err_init_hw: intel_uc_fini_hw(&dev_priv->gt.uc); err_uc_init: - if (ret != -EIO) { + if (ret != -EIO) intel_uc_fini(&dev_priv->gt.uc); +err_engines: + if (ret != -EIO) intel_engines_cleanup(&dev_priv->gt); - } -err_scratch: +err_gt_early: intel_gt_driver_release(&dev_priv->gt); err_unlock: intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL); @@ -1384,6 +1384,7 @@ static void i915_gem_init__mm(struct drm_i915_private *i915) void i915_gem_init_early(struct drm_i915_private *dev_priv) { i915_gem_init__mm(dev_priv); + i915_gem_init__contexts(dev_priv); spin_lock_init(&dev_priv->fb_tracking.lock); } -- 2.24.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH 10/27] drm/i915: Move i915_gem_init_contexts() earlier Date: Tue, 12 Nov 2019 09:28:37 +0000 [thread overview] Message-ID: <20191112092854.869-10-chris@chris-wilson.co.uk> (raw) Message-ID: <20191112092837.OQsCfRyT9FEwCtb4cIaEI1CDihK2tC4W-M5JgTknZcU@z> (raw) In-Reply-To: <20191112092854.869-1-chris@chris-wilson.co.uk> As the GEM global context setup is now independent of the GT state (although GT does currently still depending upon the global i915->kernel_context), we can move its init earlier, leaving the gt init ready to extracted. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/i915_gem.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 92a5c9ab3445..011b3763697d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1216,18 +1216,17 @@ int i915_gem_init(struct drm_i915_private *dev_priv) } intel_gt_init(&dev_priv->gt); - i915_gem_init__contexts(dev_priv); ret = intel_engines_setup(&dev_priv->gt); if (ret) { GEM_BUG_ON(ret == -EIO); - goto err_unlock; + goto err_gt_early; } ret = intel_engines_init(&dev_priv->gt); if (ret) { GEM_BUG_ON(ret == -EIO); - goto err_scratch; + goto err_engines; } intel_uc_init(&dev_priv->gt.uc); @@ -1254,19 +1253,19 @@ int i915_gem_init(struct drm_i915_private *dev_priv) ret = intel_engines_verify_workarounds(&dev_priv->gt); if (ret) - goto err_gt; + goto err_gt_late; ret = __intel_engines_record_defaults(&dev_priv->gt); if (ret) - goto err_gt; + goto err_gt_late; ret = i915_inject_probe_error(dev_priv, -ENODEV); if (ret) - goto err_gt; + goto err_gt_late; ret = i915_inject_probe_error(dev_priv, -EIO); if (ret) - goto err_gt; + goto err_gt_late; intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL); @@ -1278,7 +1277,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv) * HW as irrevisibly wedged, but keep enough state around that the * driver doesn't explode during runtime. */ -err_gt: +err_gt_late: intel_gt_set_wedged_on_init(&dev_priv->gt); i915_gem_suspend(dev_priv); i915_gem_suspend_late(dev_priv); @@ -1287,11 +1286,12 @@ int i915_gem_init(struct drm_i915_private *dev_priv) err_init_hw: intel_uc_fini_hw(&dev_priv->gt.uc); err_uc_init: - if (ret != -EIO) { + if (ret != -EIO) intel_uc_fini(&dev_priv->gt.uc); +err_engines: + if (ret != -EIO) intel_engines_cleanup(&dev_priv->gt); - } -err_scratch: +err_gt_early: intel_gt_driver_release(&dev_priv->gt); err_unlock: intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL); @@ -1384,6 +1384,7 @@ static void i915_gem_init__mm(struct drm_i915_private *i915) void i915_gem_init_early(struct drm_i915_private *dev_priv) { i915_gem_init__mm(dev_priv); + i915_gem_init__contexts(dev_priv); spin_lock_init(&dev_priv->fb_tracking.lock); } -- 2.24.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-12 9:29 UTC|newest] Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-12 9:28 [PATCH 01/27] drm/i915: Flush context free work on cleanup Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 02/27] drm/i915/gt: Try an extra flush on the Haswell blitter Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 03/27] drm/i915/gem: Silence sparse for RCU protection inside the constructor Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 04/27] drm/i915/selftests: Mock the engine sorting for easy validation Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 05/27] Revert "drm/i915: use a separate context for gpu relocs" Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 06/27] drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_request Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 07/27] drm/i915: Drop GEM context as a direct link from i915_request Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 08/27] drm/i915: Push the use-semaphore marker onto the intel_context Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 09/27] drm/i915: Remove i915->kernel_context Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` Chris Wilson [this message] 2019-11-12 9:28 ` [Intel-gfx] [PATCH 10/27] drm/i915: Move i915_gem_init_contexts() earlier Chris Wilson 2019-11-12 9:28 ` [PATCH 11/27] drm/i915/uc: Use an internal buffer for firmware images Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 12/27] drm/i915/gt: Pull GT initialisation under intel_gt_init() Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 13/27] drm/i915/gt: Merge engine init/setup loops Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 14/27] drm/i915/gt: Expose engine properties via sysfs Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 15/27] drm/i915/gt: Expose engine->mmio_base " Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-21 13:18 ` Lionel Landwerlin 2019-11-21 13:18 ` [Intel-gfx] " Lionel Landwerlin 2019-11-21 13:23 ` Chris Wilson 2019-11-21 13:23 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 16/27] drm/i915/gt: Expose timeslice duration to sysfs Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 17/27] drm/i915/gt: Expose busywait " Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 18/27] drm/i915/gt: Expose reset stop timeout via sysfs Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 19/27] drm/i915/gt: Expose preempt reset " Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 20/27] drm/i915/gt: Expose heartbeat interval " Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 21/27] drm/i915: Flush idle barriers when waiting Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 22/27] drm/i915: Allow userspace to specify ringsize on construction Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 23/27] drm/i915/gem: Honour O_NONBLOCK before throttling execbuf submissions Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 24/27] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 14:13 ` Mika Kuoppala 2019-11-12 14:13 ` [Intel-gfx] " Mika Kuoppala 2019-11-12 14:39 ` Chris Wilson 2019-11-12 14:39 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 25/27] drm/i915/gt: Tidy up debug-warns for the mocs control table Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 26/27] drm/i915/gt: Refactor mocs loops into single control macro Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 17:02 ` Mika Kuoppala 2019-11-12 17:02 ` [Intel-gfx] " Mika Kuoppala 2019-11-12 18:12 ` Chris Wilson 2019-11-12 18:12 ` [Intel-gfx] " Chris Wilson 2019-11-12 9:28 ` [PATCH 27/27] drm/i915/selftests: Add coverage of mocs registers Chris Wilson 2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson 2019-11-12 10:12 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/27] drm/i915: Flush context free work on cleanup Patchwork 2019-11-12 10:12 ` [Intel-gfx] " Patchwork 2019-11-12 10:23 ` ✗ Fi.CI.SPARSE: " Patchwork 2019-11-12 10:23 ` [Intel-gfx] " Patchwork 2019-11-12 10:33 ` ✗ Fi.CI.BAT: failure " Patchwork 2019-11-12 10:33 ` [Intel-gfx] " Patchwork 2019-11-12 14:23 ` [PATCH 01/27] " Mika Kuoppala 2019-11-12 14:23 ` [Intel-gfx] " Mika Kuoppala 2019-11-12 14:39 ` Chris Wilson 2019-11-12 14:39 ` [Intel-gfx] " Chris Wilson
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