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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 13/27] drm/i915/gt: Merge engine init/setup loops
Date: Tue, 12 Nov 2019 09:28:40 +0000	[thread overview]
Message-ID: <20191112092854.869-13-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20191112092854.869-1-chris@chris-wilson.co.uk>

Now that we don't need to create GEM contexts in the middle of engine
construction, we can pull the engine init/setup loops together.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     | 118 +++++++-----------
 drivers/gpu/drm/i915/gt/intel_gt.c            |   5 -
 drivers/gpu/drm/i915/gt/intel_lrc.c           |   5 -
 .../gpu/drm/i915/gt/intel_ring_submission.c   |   6 -
 4 files changed, 43 insertions(+), 91 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 3db933aa02e1..54e785dc6a3b 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -471,39 +471,6 @@ int intel_engines_init_mmio(struct intel_gt *gt)
 	return err;
 }
 
-/**
- * intel_engines_init() - init the Engine Command Streamers
- * @gt: pointer to struct intel_gt
- *
- * Return: non-zero if the initialization failed.
- */
-int intel_engines_init(struct intel_gt *gt)
-{
-	int (*init)(struct intel_engine_cs *engine);
-	struct intel_engine_cs *engine;
-	enum intel_engine_id id;
-	int err;
-
-	if (HAS_EXECLISTS(gt->i915))
-		init = intel_execlists_submission_init;
-	else
-		init = intel_ring_submission_init;
-
-	for_each_engine(engine, gt, id) {
-		err = init(engine);
-		if (err)
-			goto cleanup;
-
-		intel_engine_add_user(engine);
-	}
-
-	return 0;
-
-cleanup:
-	intel_engines_release(gt);
-	return err;
-}
-
 void intel_engine_init_execlists(struct intel_engine_cs *engine)
 {
 	struct intel_engine_execlists * const execlists = &engine->execlists;
@@ -615,7 +582,7 @@ static int init_status_page(struct intel_engine_cs *engine)
 	return ret;
 }
 
-static int intel_engine_setup_common(struct intel_engine_cs *engine)
+static int engine_setup_common(struct intel_engine_cs *engine)
 {
 	int err;
 
@@ -644,46 +611,6 @@ static int intel_engine_setup_common(struct intel_engine_cs *engine)
 	return 0;
 }
 
-/**
- * intel_engines_setup- setup engine state not requiring hw access
- * @gt: pointer to struct intel_gt
- *
- * Initializes engine structure members shared between legacy and execlists
- * submission modes which do not require hardware access.
- *
- * Typically done early in the submission mode specific engine setup stage.
- */
-int intel_engines_setup(struct intel_gt *gt)
-{
-	int (*setup)(struct intel_engine_cs *engine);
-	struct intel_engine_cs *engine;
-	enum intel_engine_id id;
-	int err;
-
-	if (HAS_EXECLISTS(gt->i915))
-		setup = intel_execlists_submission_setup;
-	else
-		setup = intel_ring_submission_setup;
-
-	for_each_engine(engine, gt, id) {
-		err = intel_engine_setup_common(engine);
-		if (err)
-			goto cleanup;
-
-		err = setup(engine);
-		if (err)
-			goto cleanup;
-
-		GEM_BUG_ON(!engine->cops);
-	}
-
-	return 0;
-
-cleanup:
-	intel_engines_release(gt);
-	return err;
-}
-
 struct measure_breadcrumb {
 	struct i915_request rq;
 	struct intel_timeline timeline;
@@ -801,7 +728,7 @@ create_kernel_context(struct intel_engine_cs *engine)
  *
  * Returns zero on success or an error code on failure.
  */
-int intel_engine_init_common(struct intel_engine_cs *engine)
+static int engine_init_common(struct intel_engine_cs *engine)
 {
 	struct intel_context *ce;
 	int ret;
@@ -831,6 +758,47 @@ int intel_engine_init_common(struct intel_engine_cs *engine)
 	return 0;
 }
 
+int intel_engines_init(struct intel_gt *gt)
+{
+	int (*init)(struct intel_engine_cs *engine);
+	int (*setup)(struct intel_engine_cs *engine);
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	int err;
+
+	if (HAS_EXECLISTS(gt->i915)) {
+		setup = intel_execlists_submission_setup;
+		init = intel_execlists_submission_init;
+	} else {
+		setup = intel_ring_submission_setup;
+		init = intel_ring_submission_init;
+	}
+
+	for_each_engine(engine, gt, id) {
+		err = engine_setup_common(engine);
+		if (err)
+			return err;
+
+		err = setup(engine);
+		if (err)
+			return err;
+
+		GEM_BUG_ON(!engine->cops);
+
+		err = init(engine);
+		if (err)
+			return err;
+
+		err = engine_init_common(engine);
+		if (err)
+			return err;
+
+		intel_engine_add_user(engine);
+	}
+
+	return 0;
+}
+
 /**
  * intel_engines_cleanup_common - cleans up the engine state created by
  *                                the common initiailizers.
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index d62b1f18bc56..735e29296b6b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -559,10 +559,6 @@ int intel_gt_init(struct intel_gt *gt)
 		goto err_pm;
 	}
 
-	err = intel_engines_setup(gt);
-	if (err)
-		goto err_vm;
-
 	err = intel_engines_init(gt);
 	if (err)
 		goto err_engines;
@@ -597,7 +593,6 @@ int intel_gt_init(struct intel_gt *gt)
 	intel_uc_fini(&gt->uc);
 err_engines:
 	intel_engines_release(gt);
-err_vm:
 	i915_vm_put(fetch_and_zero(&gt->vm));
 err_pm:
 	intel_gt_pm_fini(gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 3ff49c69e2f6..1c334d381012 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -3850,11 +3850,6 @@ int intel_execlists_submission_init(struct intel_engine_cs *engine)
 	struct drm_i915_private *i915 = engine->i915;
 	struct intel_uncore *uncore = engine->uncore;
 	u32 base = engine->mmio_base;
-	int ret;
-
-	ret = intel_engine_init_common(engine);
-	if (ret)
-		return ret;
 
 	if (intel_init_workaround_bb(engine))
 		/*
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 1a8cecf4b4dc..1245540d42da 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -2032,16 +2032,10 @@ int intel_ring_submission_init(struct intel_engine_cs *engine)
 	engine->legacy.ring = ring;
 	engine->legacy.timeline = timeline;
 
-	err = intel_engine_init_common(engine);
-	if (err)
-		goto err_ring_unpin;
-
 	GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma);
 
 	return 0;
 
-err_ring_unpin:
-	intel_ring_unpin(ring);
 err_ring:
 	intel_ring_put(ring);
 err_timeline_unpin:
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 13/27] drm/i915/gt: Merge engine init/setup loops
Date: Tue, 12 Nov 2019 09:28:40 +0000	[thread overview]
Message-ID: <20191112092854.869-13-chris@chris-wilson.co.uk> (raw)
Message-ID: <20191112092840.K5wAznaQarIVpK-YBPJWihmxCho4UvAZqvFm_bP5KPU@z> (raw)
In-Reply-To: <20191112092854.869-1-chris@chris-wilson.co.uk>

Now that we don't need to create GEM contexts in the middle of engine
construction, we can pull the engine init/setup loops together.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     | 118 +++++++-----------
 drivers/gpu/drm/i915/gt/intel_gt.c            |   5 -
 drivers/gpu/drm/i915/gt/intel_lrc.c           |   5 -
 .../gpu/drm/i915/gt/intel_ring_submission.c   |   6 -
 4 files changed, 43 insertions(+), 91 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 3db933aa02e1..54e785dc6a3b 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -471,39 +471,6 @@ int intel_engines_init_mmio(struct intel_gt *gt)
 	return err;
 }
 
-/**
- * intel_engines_init() - init the Engine Command Streamers
- * @gt: pointer to struct intel_gt
- *
- * Return: non-zero if the initialization failed.
- */
-int intel_engines_init(struct intel_gt *gt)
-{
-	int (*init)(struct intel_engine_cs *engine);
-	struct intel_engine_cs *engine;
-	enum intel_engine_id id;
-	int err;
-
-	if (HAS_EXECLISTS(gt->i915))
-		init = intel_execlists_submission_init;
-	else
-		init = intel_ring_submission_init;
-
-	for_each_engine(engine, gt, id) {
-		err = init(engine);
-		if (err)
-			goto cleanup;
-
-		intel_engine_add_user(engine);
-	}
-
-	return 0;
-
-cleanup:
-	intel_engines_release(gt);
-	return err;
-}
-
 void intel_engine_init_execlists(struct intel_engine_cs *engine)
 {
 	struct intel_engine_execlists * const execlists = &engine->execlists;
@@ -615,7 +582,7 @@ static int init_status_page(struct intel_engine_cs *engine)
 	return ret;
 }
 
-static int intel_engine_setup_common(struct intel_engine_cs *engine)
+static int engine_setup_common(struct intel_engine_cs *engine)
 {
 	int err;
 
@@ -644,46 +611,6 @@ static int intel_engine_setup_common(struct intel_engine_cs *engine)
 	return 0;
 }
 
-/**
- * intel_engines_setup- setup engine state not requiring hw access
- * @gt: pointer to struct intel_gt
- *
- * Initializes engine structure members shared between legacy and execlists
- * submission modes which do not require hardware access.
- *
- * Typically done early in the submission mode specific engine setup stage.
- */
-int intel_engines_setup(struct intel_gt *gt)
-{
-	int (*setup)(struct intel_engine_cs *engine);
-	struct intel_engine_cs *engine;
-	enum intel_engine_id id;
-	int err;
-
-	if (HAS_EXECLISTS(gt->i915))
-		setup = intel_execlists_submission_setup;
-	else
-		setup = intel_ring_submission_setup;
-
-	for_each_engine(engine, gt, id) {
-		err = intel_engine_setup_common(engine);
-		if (err)
-			goto cleanup;
-
-		err = setup(engine);
-		if (err)
-			goto cleanup;
-
-		GEM_BUG_ON(!engine->cops);
-	}
-
-	return 0;
-
-cleanup:
-	intel_engines_release(gt);
-	return err;
-}
-
 struct measure_breadcrumb {
 	struct i915_request rq;
 	struct intel_timeline timeline;
@@ -801,7 +728,7 @@ create_kernel_context(struct intel_engine_cs *engine)
  *
  * Returns zero on success or an error code on failure.
  */
-int intel_engine_init_common(struct intel_engine_cs *engine)
+static int engine_init_common(struct intel_engine_cs *engine)
 {
 	struct intel_context *ce;
 	int ret;
@@ -831,6 +758,47 @@ int intel_engine_init_common(struct intel_engine_cs *engine)
 	return 0;
 }
 
+int intel_engines_init(struct intel_gt *gt)
+{
+	int (*init)(struct intel_engine_cs *engine);
+	int (*setup)(struct intel_engine_cs *engine);
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	int err;
+
+	if (HAS_EXECLISTS(gt->i915)) {
+		setup = intel_execlists_submission_setup;
+		init = intel_execlists_submission_init;
+	} else {
+		setup = intel_ring_submission_setup;
+		init = intel_ring_submission_init;
+	}
+
+	for_each_engine(engine, gt, id) {
+		err = engine_setup_common(engine);
+		if (err)
+			return err;
+
+		err = setup(engine);
+		if (err)
+			return err;
+
+		GEM_BUG_ON(!engine->cops);
+
+		err = init(engine);
+		if (err)
+			return err;
+
+		err = engine_init_common(engine);
+		if (err)
+			return err;
+
+		intel_engine_add_user(engine);
+	}
+
+	return 0;
+}
+
 /**
  * intel_engines_cleanup_common - cleans up the engine state created by
  *                                the common initiailizers.
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index d62b1f18bc56..735e29296b6b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -559,10 +559,6 @@ int intel_gt_init(struct intel_gt *gt)
 		goto err_pm;
 	}
 
-	err = intel_engines_setup(gt);
-	if (err)
-		goto err_vm;
-
 	err = intel_engines_init(gt);
 	if (err)
 		goto err_engines;
@@ -597,7 +593,6 @@ int intel_gt_init(struct intel_gt *gt)
 	intel_uc_fini(&gt->uc);
 err_engines:
 	intel_engines_release(gt);
-err_vm:
 	i915_vm_put(fetch_and_zero(&gt->vm));
 err_pm:
 	intel_gt_pm_fini(gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 3ff49c69e2f6..1c334d381012 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -3850,11 +3850,6 @@ int intel_execlists_submission_init(struct intel_engine_cs *engine)
 	struct drm_i915_private *i915 = engine->i915;
 	struct intel_uncore *uncore = engine->uncore;
 	u32 base = engine->mmio_base;
-	int ret;
-
-	ret = intel_engine_init_common(engine);
-	if (ret)
-		return ret;
 
 	if (intel_init_workaround_bb(engine))
 		/*
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 1a8cecf4b4dc..1245540d42da 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -2032,16 +2032,10 @@ int intel_ring_submission_init(struct intel_engine_cs *engine)
 	engine->legacy.ring = ring;
 	engine->legacy.timeline = timeline;
 
-	err = intel_engine_init_common(engine);
-	if (err)
-		goto err_ring_unpin;
-
 	GEM_BUG_ON(timeline->hwsp_ggtt != engine->status_page.vma);
 
 	return 0;
 
-err_ring_unpin:
-	intel_ring_unpin(ring);
 err_ring:
 	intel_ring_put(ring);
 err_timeline_unpin:
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-11-12  9:29 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-12  9:28 [PATCH 01/27] drm/i915: Flush context free work on cleanup Chris Wilson
2019-11-12  9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 02/27] drm/i915/gt: Try an extra flush on the Haswell blitter Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 03/27] drm/i915/gem: Silence sparse for RCU protection inside the constructor Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 04/27] drm/i915/selftests: Mock the engine sorting for easy validation Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 05/27] Revert "drm/i915: use a separate context for gpu relocs" Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 06/27] drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_request Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 07/27] drm/i915: Drop GEM context as a direct link from i915_request Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 08/27] drm/i915: Push the use-semaphore marker onto the intel_context Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 09/27] drm/i915: Remove i915->kernel_context Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 10/27] drm/i915: Move i915_gem_init_contexts() earlier Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 11/27] drm/i915/uc: Use an internal buffer for firmware images Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 12/27] drm/i915/gt: Pull GT initialisation under intel_gt_init() Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` Chris Wilson [this message]
2019-11-12  9:28   ` [Intel-gfx] [PATCH 13/27] drm/i915/gt: Merge engine init/setup loops Chris Wilson
2019-11-12  9:28 ` [PATCH 14/27] drm/i915/gt: Expose engine properties via sysfs Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 15/27] drm/i915/gt: Expose engine->mmio_base " Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-21 13:18   ` Lionel Landwerlin
2019-11-21 13:18     ` [Intel-gfx] " Lionel Landwerlin
2019-11-21 13:23     ` Chris Wilson
2019-11-21 13:23       ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 16/27] drm/i915/gt: Expose timeslice duration to sysfs Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 17/27] drm/i915/gt: Expose busywait " Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 18/27] drm/i915/gt: Expose reset stop timeout via sysfs Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 19/27] drm/i915/gt: Expose preempt reset " Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 20/27] drm/i915/gt: Expose heartbeat interval " Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 21/27] drm/i915: Flush idle barriers when waiting Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 22/27] drm/i915: Allow userspace to specify ringsize on construction Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 23/27] drm/i915/gem: Honour O_NONBLOCK before throttling execbuf submissions Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 24/27] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12 14:13   ` Mika Kuoppala
2019-11-12 14:13     ` [Intel-gfx] " Mika Kuoppala
2019-11-12 14:39     ` Chris Wilson
2019-11-12 14:39       ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 25/27] drm/i915/gt: Tidy up debug-warns for the mocs control table Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 26/27] drm/i915/gt: Refactor mocs loops into single control macro Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12 17:02   ` Mika Kuoppala
2019-11-12 17:02     ` [Intel-gfx] " Mika Kuoppala
2019-11-12 18:12     ` Chris Wilson
2019-11-12 18:12       ` [Intel-gfx] " Chris Wilson
2019-11-12  9:28 ` [PATCH 27/27] drm/i915/selftests: Add coverage of mocs registers Chris Wilson
2019-11-12  9:28   ` [Intel-gfx] " Chris Wilson
2019-11-12 10:12 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/27] drm/i915: Flush context free work on cleanup Patchwork
2019-11-12 10:12   ` [Intel-gfx] " Patchwork
2019-11-12 10:23 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-12 10:23   ` [Intel-gfx] " Patchwork
2019-11-12 10:33 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-11-12 10:33   ` [Intel-gfx] " Patchwork
2019-11-12 14:23 ` [PATCH 01/27] " Mika Kuoppala
2019-11-12 14:23   ` [Intel-gfx] " Mika Kuoppala
2019-11-12 14:39   ` Chris Wilson
2019-11-12 14:39     ` [Intel-gfx] " Chris Wilson

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