From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 03/27] drm/i915/gem: Silence sparse for RCU protection inside the constructor
Date: Tue, 12 Nov 2019 09:28:30 +0000 [thread overview]
Message-ID: <20191112092854.869-3-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20191112092854.869-1-chris@chris-wilson.co.uk>
Inside the constructor, while cloning, we need to replace the
dst->engines. Having forgotten that dst->engines is marked as RCU
protected, we need to add the appropriate annotations to make sparse
happy.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 17f395672e5e..e94afc5db22e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -2004,7 +2004,8 @@ static int clone_engines(struct i915_gem_context *dst,
user_engines = i915_gem_context_user_engines(src);
i915_gem_context_unlock_engines(src);
- free_engines(dst->engines);
+ /* Serialised by constructor */
+ free_engines(__context_engines_static(dst));
RCU_INIT_POINTER(dst->engines, clone);
if (user_engines)
i915_gem_context_set_user_engines(dst);
@@ -2039,7 +2040,8 @@ static int clone_sseu(struct i915_gem_context *dst,
unsigned long n;
int err;
- clone = dst->engines; /* no locking required; sole access */
+ /* no locking required; sole access under constructor*/
+ clone = __context_engines_static(dst);
if (e->num_engines != clone->num_engines) {
err = -EINVAL;
goto unlock;
--
2.24.0
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WARNING: multiple messages have this Message-ID (diff)
From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 03/27] drm/i915/gem: Silence sparse for RCU protection inside the constructor
Date: Tue, 12 Nov 2019 09:28:30 +0000 [thread overview]
Message-ID: <20191112092854.869-3-chris@chris-wilson.co.uk> (raw)
Message-ID: <20191112092830.YuNWmpwr7NbMNDFtJZMF8c3Kw64XB5wGzkOq4flUWyg@z> (raw)
In-Reply-To: <20191112092854.869-1-chris@chris-wilson.co.uk>
Inside the constructor, while cloning, we need to replace the
dst->engines. Having forgotten that dst->engines is marked as RCU
protected, we need to add the appropriate annotations to make sparse
happy.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 17f395672e5e..e94afc5db22e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -2004,7 +2004,8 @@ static int clone_engines(struct i915_gem_context *dst,
user_engines = i915_gem_context_user_engines(src);
i915_gem_context_unlock_engines(src);
- free_engines(dst->engines);
+ /* Serialised by constructor */
+ free_engines(__context_engines_static(dst));
RCU_INIT_POINTER(dst->engines, clone);
if (user_engines)
i915_gem_context_set_user_engines(dst);
@@ -2039,7 +2040,8 @@ static int clone_sseu(struct i915_gem_context *dst,
unsigned long n;
int err;
- clone = dst->engines; /* no locking required; sole access */
+ /* no locking required; sole access under constructor*/
+ clone = __context_engines_static(dst);
if (e->num_engines != clone->num_engines) {
err = -EINVAL;
goto unlock;
--
2.24.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-12 9:29 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-12 9:28 [PATCH 01/27] drm/i915: Flush context free work on cleanup Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 02/27] drm/i915/gt: Try an extra flush on the Haswell blitter Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` Chris Wilson [this message]
2019-11-12 9:28 ` [Intel-gfx] [PATCH 03/27] drm/i915/gem: Silence sparse for RCU protection inside the constructor Chris Wilson
2019-11-12 9:28 ` [PATCH 04/27] drm/i915/selftests: Mock the engine sorting for easy validation Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 05/27] Revert "drm/i915: use a separate context for gpu relocs" Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 06/27] drm/i915: Use a ctor for TYPESAFE_BY_RCU i915_request Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 07/27] drm/i915: Drop GEM context as a direct link from i915_request Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 08/27] drm/i915: Push the use-semaphore marker onto the intel_context Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 09/27] drm/i915: Remove i915->kernel_context Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 10/27] drm/i915: Move i915_gem_init_contexts() earlier Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 11/27] drm/i915/uc: Use an internal buffer for firmware images Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 12/27] drm/i915/gt: Pull GT initialisation under intel_gt_init() Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 13/27] drm/i915/gt: Merge engine init/setup loops Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 14/27] drm/i915/gt: Expose engine properties via sysfs Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 15/27] drm/i915/gt: Expose engine->mmio_base " Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-21 13:18 ` Lionel Landwerlin
2019-11-21 13:18 ` [Intel-gfx] " Lionel Landwerlin
2019-11-21 13:23 ` Chris Wilson
2019-11-21 13:23 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 16/27] drm/i915/gt: Expose timeslice duration to sysfs Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 17/27] drm/i915/gt: Expose busywait " Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 18/27] drm/i915/gt: Expose reset stop timeout via sysfs Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 19/27] drm/i915/gt: Expose preempt reset " Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 20/27] drm/i915/gt: Expose heartbeat interval " Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 21/27] drm/i915: Flush idle barriers when waiting Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 22/27] drm/i915: Allow userspace to specify ringsize on construction Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 23/27] drm/i915/gem: Honour O_NONBLOCK before throttling execbuf submissions Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 24/27] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 14:13 ` Mika Kuoppala
2019-11-12 14:13 ` [Intel-gfx] " Mika Kuoppala
2019-11-12 14:39 ` Chris Wilson
2019-11-12 14:39 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 25/27] drm/i915/gt: Tidy up debug-warns for the mocs control table Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 26/27] drm/i915/gt: Refactor mocs loops into single control macro Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 17:02 ` Mika Kuoppala
2019-11-12 17:02 ` [Intel-gfx] " Mika Kuoppala
2019-11-12 18:12 ` Chris Wilson
2019-11-12 18:12 ` [Intel-gfx] " Chris Wilson
2019-11-12 9:28 ` [PATCH 27/27] drm/i915/selftests: Add coverage of mocs registers Chris Wilson
2019-11-12 9:28 ` [Intel-gfx] " Chris Wilson
2019-11-12 10:12 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/27] drm/i915: Flush context free work on cleanup Patchwork
2019-11-12 10:12 ` [Intel-gfx] " Patchwork
2019-11-12 10:23 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-12 10:23 ` [Intel-gfx] " Patchwork
2019-11-12 10:33 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-11-12 10:33 ` [Intel-gfx] " Patchwork
2019-11-12 14:23 ` [PATCH 01/27] " Mika Kuoppala
2019-11-12 14:23 ` [Intel-gfx] " Mika Kuoppala
2019-11-12 14:39 ` Chris Wilson
2019-11-12 14:39 ` [Intel-gfx] " Chris Wilson
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