From: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> To: MyungJoo Ham <myungjoo.ham@samsung.com>, Kyungmin Park <kyungmin.park@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com>, "Rob Herring" <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, "Matthias Brugger" <matthias.bgg@gmail.com>, "Rafael J . Wysocki" <rjw@rjwysocki.net>, Viresh Kumar <viresh.kumar@linaro.org>, Nishanth Menon <nm@ti.com>, "Stephen Boyd" <sboyd@kernel.org>, Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org> Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>, srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 07/12] cpufreq: mediatek: Enable clock and regulator Date: Wed, 20 May 2020 11:43:02 +0800 [thread overview] Message-ID: <20200520034307.20435-8-andrew-sh.cheng@mediatek.com> (raw) In-Reply-To: <20200520034307.20435-1-andrew-sh.cheng@mediatek.com> Need to enable regulator, so that the max/min requested value will be recorded even it is not applied right away. Intermediate clock is not always enabled by ccf in different projects, so cpufreq should always enable used clock by itself. Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> --- drivers/cpufreq/mediatek-cpufreq.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c index 0c98dd08273d..4b479c110cc9 100644 --- a/drivers/cpufreq/mediatek-cpufreq.c +++ b/drivers/cpufreq/mediatek-cpufreq.c @@ -350,6 +350,11 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) ret = PTR_ERR(proc_reg); goto out_free_resources; } + ret = regulator_enable(proc_reg); + if (ret) { + pr_warn("enable vproc for cpu%d fail\n", cpu); + goto out_free_resources; + } /* Both presence and absence of sram regulator are valid cases. */ sram_reg = regulator_get_exclusive(cpu_dev, "sram"); @@ -368,13 +373,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) goto out_free_resources; } + ret = clk_prepare_enable(cpu_clk); + if (ret) + goto out_free_opp_table; + + ret = clk_prepare_enable(inter_clk); + if (ret) + goto out_disable_mux_clock; + /* Search a safe voltage for intermediate frequency. */ rate = clk_get_rate(inter_clk); opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); if (IS_ERR(opp)) { pr_err("failed to get intermediate opp for cpu%d\n", cpu); ret = PTR_ERR(opp); - goto out_free_opp_table; + goto out_disable_inter_clock; } info->intermediate_voltage = dev_pm_opp_get_voltage(opp); dev_pm_opp_put(opp); @@ -393,6 +406,12 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) return 0; +out_disable_inter_clock: + clk_disable_unprepare(inter_clk); + +out_disable_mux_clock: + clk_disable_unprepare(cpu_clk); + out_free_opp_table: dev_pm_opp_of_cpumask_remove_table(&info->cpus); @@ -411,14 +430,20 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info) { - if (!IS_ERR(info->proc_reg)) + if (!IS_ERR(info->proc_reg)) { + regulator_disable(info->proc_reg); regulator_put(info->proc_reg); + } if (!IS_ERR(info->sram_reg)) regulator_put(info->sram_reg); - if (!IS_ERR(info->cpu_clk)) + if (!IS_ERR(info->cpu_clk)) { + clk_disable_unprepare(info->cpu_clk); clk_put(info->cpu_clk); - if (!IS_ERR(info->inter_clk)) + } + if (!IS_ERR(info->inter_clk)) { + clk_disable_unprepare(info->inter_clk); clk_put(info->inter_clk); + } dev_pm_opp_of_cpumask_remove_table(&info->cpus); } -- 2.12.5 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> To: MyungJoo Ham <myungjoo.ham@samsung.com>, Kyungmin Park <kyungmin.park@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com>, "Rob Herring" <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, "Matthias Brugger" <matthias.bgg@gmail.com>, "Rafael J . Wysocki" <rjw@rjwysocki.net>, Viresh Kumar <viresh.kumar@linaro.org>, Nishanth Menon <nm@ti.com>, "Stephen Boyd" <sboyd@kernel.org>, Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org> Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" <andrew-sh.cheng@mediatek.com>, srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 07/12] cpufreq: mediatek: Enable clock and regulator Date: Wed, 20 May 2020 11:43:02 +0800 [thread overview] Message-ID: <20200520034307.20435-8-andrew-sh.cheng@mediatek.com> (raw) In-Reply-To: <20200520034307.20435-1-andrew-sh.cheng@mediatek.com> Need to enable regulator, so that the max/min requested value will be recorded even it is not applied right away. Intermediate clock is not always enabled by ccf in different projects, so cpufreq should always enable used clock by itself. Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@mediatek.com> --- drivers/cpufreq/mediatek-cpufreq.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c index 0c98dd08273d..4b479c110cc9 100644 --- a/drivers/cpufreq/mediatek-cpufreq.c +++ b/drivers/cpufreq/mediatek-cpufreq.c @@ -350,6 +350,11 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) ret = PTR_ERR(proc_reg); goto out_free_resources; } + ret = regulator_enable(proc_reg); + if (ret) { + pr_warn("enable vproc for cpu%d fail\n", cpu); + goto out_free_resources; + } /* Both presence and absence of sram regulator are valid cases. */ sram_reg = regulator_get_exclusive(cpu_dev, "sram"); @@ -368,13 +373,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) goto out_free_resources; } + ret = clk_prepare_enable(cpu_clk); + if (ret) + goto out_free_opp_table; + + ret = clk_prepare_enable(inter_clk); + if (ret) + goto out_disable_mux_clock; + /* Search a safe voltage for intermediate frequency. */ rate = clk_get_rate(inter_clk); opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); if (IS_ERR(opp)) { pr_err("failed to get intermediate opp for cpu%d\n", cpu); ret = PTR_ERR(opp); - goto out_free_opp_table; + goto out_disable_inter_clock; } info->intermediate_voltage = dev_pm_opp_get_voltage(opp); dev_pm_opp_put(opp); @@ -393,6 +406,12 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) return 0; +out_disable_inter_clock: + clk_disable_unprepare(inter_clk); + +out_disable_mux_clock: + clk_disable_unprepare(cpu_clk); + out_free_opp_table: dev_pm_opp_of_cpumask_remove_table(&info->cpus); @@ -411,14 +430,20 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info) { - if (!IS_ERR(info->proc_reg)) + if (!IS_ERR(info->proc_reg)) { + regulator_disable(info->proc_reg); regulator_put(info->proc_reg); + } if (!IS_ERR(info->sram_reg)) regulator_put(info->sram_reg); - if (!IS_ERR(info->cpu_clk)) + if (!IS_ERR(info->cpu_clk)) { + clk_disable_unprepare(info->cpu_clk); clk_put(info->cpu_clk); - if (!IS_ERR(info->inter_clk)) + } + if (!IS_ERR(info->inter_clk)) { + clk_disable_unprepare(info->inter_clk); clk_put(info->inter_clk); + } dev_pm_opp_of_cpumask_remove_table(&info->cpus); } -- 2.12.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-05-20 3:55 UTC|newest] Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <CGME20200520034324epcas1p3affbd24bd1f3fe40d51baade07c1abba@epcas1p3.samsung.com> 2020-05-20 3:42 ` [PATCH 00/12] Add cpufreq and cci devfreq for mt8183, and SVS support Andrew-sh.Cheng 2020-05-20 3:42 ` Andrew-sh.Cheng 2020-05-20 3:42 ` [PATCH 01/12] OPP: Allow required-opps even if the device doesn't have power-domains Andrew-sh.Cheng 2020-05-20 3:42 ` Andrew-sh.Cheng 2020-05-20 14:54 ` Matthias Brugger 2020-05-20 14:54 ` Matthias Brugger 2020-05-20 14:54 ` Matthias Brugger 2020-05-21 1:50 ` andrew-sh.cheng 2020-05-21 1:50 ` andrew-sh.cheng 2020-05-20 3:42 ` [PATCH 02/12] OPP: Add function to look up required OPP's for a given OPP Andrew-sh.Cheng 2020-05-20 3:42 ` Andrew-sh.Cheng 2020-05-20 3:42 ` [PATCH 03/12] OPP: Improve required-opps linking Andrew-sh.Cheng 2020-05-20 3:42 ` Andrew-sh.Cheng 2020-05-20 22:46 ` kbuild test robot 2020-05-21 1:10 ` kbuild test robot 2020-05-20 3:42 ` [PATCH 04/12] PM / devfreq: Cache OPP table reference in devfreq Andrew-sh.Cheng 2020-05-20 3:42 ` Andrew-sh.Cheng 2020-05-20 3:43 ` [PATCH 05/12] PM / devfreq: Add required OPPs support to passive governor Andrew-sh.Cheng 2020-05-20 3:43 ` Andrew-sh.Cheng 2020-05-20 3:43 ` [PATCH 06/12] PM / devfreq: Add cpu based scaling support to passive_governor Andrew-sh.Cheng 2020-05-20 3:43 ` Andrew-sh.Cheng 2020-05-28 5:03 ` Chanwoo Choi 2020-05-28 5:03 ` Chanwoo Choi 2020-05-28 5:03 ` Chanwoo Choi 2020-05-28 6:14 ` Chanwoo Choi 2020-05-28 6:14 ` Chanwoo Choi 2020-05-28 6:14 ` Chanwoo Choi 2020-05-28 7:17 ` Chanwoo Choi 2020-05-28 7:17 ` Chanwoo Choi 2020-05-28 7:17 ` Chanwoo Choi 2020-06-02 12:23 ` andrew-sh.cheng 2020-06-02 12:23 ` andrew-sh.cheng 2020-06-03 4:12 ` Chanwoo Choi 2020-06-03 4:12 ` Chanwoo Choi 2020-06-03 4:12 ` Chanwoo Choi 2020-06-02 11:43 ` andrew-sh.cheng 2020-06-02 11:43 ` andrew-sh.cheng 2020-06-03 4:07 ` Chanwoo Choi 2020-06-03 4:07 ` Chanwoo Choi 2020-06-03 4:07 ` Chanwoo Choi 2020-06-17 7:59 ` andrew-sh.cheng 2020-06-17 7:59 ` andrew-sh.cheng 2020-05-20 3:43 ` Andrew-sh.Cheng [this message] 2020-05-20 3:43 ` [PATCH 07/12] cpufreq: mediatek: Enable clock and regulator Andrew-sh.Cheng 2020-05-20 3:43 ` [PATCH 08/12] dt-bindings: devfreq: add compatible for mt8183 cci devfreq Andrew-sh.Cheng 2020-05-20 3:43 ` Andrew-sh.Cheng 2020-05-28 7:42 ` Chanwoo Choi 2020-05-28 7:42 ` Chanwoo Choi 2020-05-28 7:42 ` Chanwoo Choi 2020-06-17 12:05 ` andrew-sh.cheng 2020-06-17 12:05 ` andrew-sh.cheng 2020-05-20 3:43 ` [PATCH 09/12] devfreq: add mediatek " Andrew-sh.Cheng 2020-05-20 3:43 ` Andrew-sh.Cheng 2020-05-20 12:31 ` Mark Brown 2020-05-20 12:31 ` Mark Brown 2020-05-20 12:31 ` Mark Brown 2020-05-21 8:52 ` andrew-sh.cheng 2020-05-21 8:52 ` andrew-sh.cheng 2020-05-21 8:52 ` andrew-sh.cheng 2020-05-28 7:35 ` Chanwoo Choi 2020-05-28 7:35 ` Chanwoo Choi 2020-05-28 7:35 ` Chanwoo Choi 2020-05-28 8:00 ` Chanwoo Choi 2020-05-28 8:00 ` Chanwoo Choi 2020-05-28 8:00 ` Chanwoo Choi 2020-05-20 3:43 ` [PATCH 10/12] opp: Modify opp API, dev_pm_opp_get_freq(), find freq in opp, even it is disabled Andrew-sh.Cheng 2020-05-20 3:43 ` Andrew-sh.Cheng 2020-05-20 3:43 ` [PATCH 11/12] cpufreq: mediatek: add opp notification for SVS support Andrew-sh.Cheng 2020-05-20 3:43 ` Andrew-sh.Cheng 2020-05-20 3:43 ` [PATCH 12/12] devfreq: mediatek: cci devfreq register " Andrew-sh.Cheng 2020-05-20 3:43 ` Andrew-sh.Cheng 2020-05-20 4:10 ` [PATCH 00/12] Add cpufreq and cci devfreq for mt8183, and " Chanwoo Choi 2020-05-20 4:10 ` Chanwoo Choi 2020-05-20 4:10 ` Chanwoo Choi 2020-05-20 5:36 ` andrew-sh.cheng 2020-05-20 5:36 ` andrew-sh.cheng 2020-05-20 6:24 ` Chanwoo Choi 2020-05-20 6:24 ` Chanwoo Choi 2020-05-20 6:24 ` Chanwoo Choi 2020-05-20 7:10 ` andrew-sh.cheng 2020-05-20 7:10 ` andrew-sh.cheng 2020-05-20 14:53 ` Matthias Brugger 2020-05-20 14:53 ` Matthias Brugger 2020-05-20 14:53 ` Matthias Brugger 2020-06-15 7:31 ` Viresh Kumar 2020-06-15 7:31 ` Viresh Kumar 2020-06-15 7:31 ` Viresh Kumar
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