From: Hal Feng <hal.feng@starfivetech.com> To: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org> Cc: Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, "Rob Herring" <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor@kernel.org>, "Palmer Dabbelt" <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Ben Dooks <ben.dooks@sifive.com>, "Daniel Lezcano" <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, Hal Feng <hal.feng@starfivetech.com>, <linux-kernel@vger.kernel.org> Subject: [PATCH v4 04/19] reset: Create subdirectory for StarFive drivers Date: Tue, 21 Feb 2023 10:46:30 +0800 [thread overview] Message-ID: <20230221024645.127922-5-hal.feng@starfivetech.com> (raw) In-Reply-To: <20230221024645.127922-1-hal.feng@starfivetech.com> From: Emil Renner Berthing <kernel@esmil.dk> This moves the StarFive JH7100 reset driver to a new subdirectory in preparation for adding more StarFive reset drivers. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> --- MAINTAINERS | 2 +- drivers/reset/Kconfig | 8 +------- drivers/reset/Makefile | 2 +- drivers/reset/starfive/Kconfig | 8 ++++++++ drivers/reset/starfive/Makefile | 2 ++ drivers/reset/{ => starfive}/reset-starfive-jh7100.c | 0 6 files changed, 13 insertions(+), 9 deletions(-) create mode 100644 drivers/reset/starfive/Kconfig create mode 100644 drivers/reset/starfive/Makefile rename drivers/reset/{ => starfive}/reset-starfive-jh7100.c (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 0b3246ca0f48..7026d96b7802 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19930,7 +19930,7 @@ STARFIVE JH7100 RESET CONTROLLER DRIVER M: Emil Renner Berthing <kernel@esmil.dk> S: Maintained F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml -F: drivers/reset/reset-starfive-jh7100.c +F: drivers/reset/starfive/reset-starfive-jh7100.c F: include/dt-bindings/reset/starfive-jh7100.h STATIC BRANCH/CALL diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 2a52c990d4fe..6aa8f243b30c 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -232,13 +232,6 @@ config RESET_SOCFPGA This enables the reset driver for the SoCFPGA ARMv7 platforms. This driver gets initialized early during platform init calls. -config RESET_STARFIVE_JH7100 - bool "StarFive JH7100 Reset Driver" - depends on SOC_STARFIVE || COMPILE_TEST - default SOC_STARFIVE - help - This enables the reset controller driver for the StarFive JH7100 SoC. - config RESET_SUNPLUS bool "Sunplus SoCs Reset Driver" if COMPILE_TEST default ARCH_SUNPLUS @@ -320,6 +313,7 @@ config RESET_ZYNQ help This enables the reset controller driver for Xilinx Zynq SoCs. +source "drivers/reset/starfive/Kconfig" source "drivers/reset/sti/Kconfig" source "drivers/reset/hisilicon/Kconfig" source "drivers/reset/tegra/Kconfig" diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 3e7e5fd633a8..fee17a0e3a16 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-y += core.o obj-y += hisilicon/ +obj-$(CONFIG_SOC_STARFIVE) += starfive/ obj-$(CONFIG_ARCH_STI) += sti/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o @@ -30,7 +31,6 @@ obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o obj-$(CONFIG_RESET_SCMI) += reset-scmi.o obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o -obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig new file mode 100644 index 000000000000..cddebdba7177 --- /dev/null +++ b/drivers/reset/starfive/Kconfig @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config RESET_STARFIVE_JH7100 + bool "StarFive JH7100 Reset Driver" + depends on SOC_STARFIVE || COMPILE_TEST + default SOC_STARFIVE + help + This enables the reset controller driver for the StarFive JH7100 SoC. diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile new file mode 100644 index 000000000000..670d049423f5 --- /dev/null +++ b/drivers/reset/starfive/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o diff --git a/drivers/reset/reset-starfive-jh7100.c b/drivers/reset/starfive/reset-starfive-jh7100.c similarity index 100% rename from drivers/reset/reset-starfive-jh7100.c rename to drivers/reset/starfive/reset-starfive-jh7100.c -- 2.38.1
WARNING: multiple messages have this Message-ID (diff)
From: Hal Feng <hal.feng@starfivetech.com> To: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org> Cc: Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, "Rob Herring" <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor@kernel.org>, "Palmer Dabbelt" <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Ben Dooks <ben.dooks@sifive.com>, "Daniel Lezcano" <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, Hal Feng <hal.feng@starfivetech.com>, <linux-kernel@vger.kernel.org> Subject: [PATCH v4 04/19] reset: Create subdirectory for StarFive drivers Date: Tue, 21 Feb 2023 10:46:30 +0800 [thread overview] Message-ID: <20230221024645.127922-5-hal.feng@starfivetech.com> (raw) In-Reply-To: <20230221024645.127922-1-hal.feng@starfivetech.com> From: Emil Renner Berthing <kernel@esmil.dk> This moves the StarFive JH7100 reset driver to a new subdirectory in preparation for adding more StarFive reset drivers. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> --- MAINTAINERS | 2 +- drivers/reset/Kconfig | 8 +------- drivers/reset/Makefile | 2 +- drivers/reset/starfive/Kconfig | 8 ++++++++ drivers/reset/starfive/Makefile | 2 ++ drivers/reset/{ => starfive}/reset-starfive-jh7100.c | 0 6 files changed, 13 insertions(+), 9 deletions(-) create mode 100644 drivers/reset/starfive/Kconfig create mode 100644 drivers/reset/starfive/Makefile rename drivers/reset/{ => starfive}/reset-starfive-jh7100.c (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 0b3246ca0f48..7026d96b7802 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19930,7 +19930,7 @@ STARFIVE JH7100 RESET CONTROLLER DRIVER M: Emil Renner Berthing <kernel@esmil.dk> S: Maintained F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml -F: drivers/reset/reset-starfive-jh7100.c +F: drivers/reset/starfive/reset-starfive-jh7100.c F: include/dt-bindings/reset/starfive-jh7100.h STATIC BRANCH/CALL diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 2a52c990d4fe..6aa8f243b30c 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -232,13 +232,6 @@ config RESET_SOCFPGA This enables the reset driver for the SoCFPGA ARMv7 platforms. This driver gets initialized early during platform init calls. -config RESET_STARFIVE_JH7100 - bool "StarFive JH7100 Reset Driver" - depends on SOC_STARFIVE || COMPILE_TEST - default SOC_STARFIVE - help - This enables the reset controller driver for the StarFive JH7100 SoC. - config RESET_SUNPLUS bool "Sunplus SoCs Reset Driver" if COMPILE_TEST default ARCH_SUNPLUS @@ -320,6 +313,7 @@ config RESET_ZYNQ help This enables the reset controller driver for Xilinx Zynq SoCs. +source "drivers/reset/starfive/Kconfig" source "drivers/reset/sti/Kconfig" source "drivers/reset/hisilicon/Kconfig" source "drivers/reset/tegra/Kconfig" diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 3e7e5fd633a8..fee17a0e3a16 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-y += core.o obj-y += hisilicon/ +obj-$(CONFIG_SOC_STARFIVE) += starfive/ obj-$(CONFIG_ARCH_STI) += sti/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o @@ -30,7 +31,6 @@ obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o obj-$(CONFIG_RESET_SCMI) += reset-scmi.o obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o -obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig new file mode 100644 index 000000000000..cddebdba7177 --- /dev/null +++ b/drivers/reset/starfive/Kconfig @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config RESET_STARFIVE_JH7100 + bool "StarFive JH7100 Reset Driver" + depends on SOC_STARFIVE || COMPILE_TEST + default SOC_STARFIVE + help + This enables the reset controller driver for the StarFive JH7100 SoC. diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile new file mode 100644 index 000000000000..670d049423f5 --- /dev/null +++ b/drivers/reset/starfive/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o diff --git a/drivers/reset/reset-starfive-jh7100.c b/drivers/reset/starfive/reset-starfive-jh7100.c similarity index 100% rename from drivers/reset/reset-starfive-jh7100.c rename to drivers/reset/starfive/reset-starfive-jh7100.c -- 2.38.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-02-21 2:47 UTC|newest] Thread overview: 143+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-02-21 2:46 [PATCH v4 00/19] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 01/19] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 02/19] clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 03/19] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 2:46 ` Hal Feng [this message] 2023-02-21 2:46 ` [PATCH v4 04/19] reset: Create subdirectory for StarFive drivers Hal Feng 2023-02-21 2:46 ` [PATCH v4 05/19] reset: starfive: Factor out common JH71X0 reset code Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 17:10 ` Conor Dooley 2023-02-21 17:10 ` Conor Dooley 2023-02-21 2:46 ` [PATCH v4 06/19] reset: starfive: Extract the " Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 17:13 ` Conor Dooley 2023-02-21 17:13 ` Conor Dooley 2023-02-21 2:46 ` [PATCH v4 07/19] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 17:17 ` Conor Dooley 2023-02-21 17:17 ` Conor Dooley 2023-02-21 2:46 ` [PATCH v4 08/19] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 09/19] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 17:23 ` Conor Dooley 2023-02-21 17:23 ` Conor Dooley 2023-02-23 3:40 ` Hal Feng 2023-02-23 3:40 ` Hal Feng 2023-02-22 9:13 ` Krzysztof Kozlowski 2023-02-22 9:13 ` Krzysztof Kozlowski 2023-02-22 10:40 ` Conor Dooley 2023-02-22 10:40 ` Conor Dooley 2023-02-23 10:22 ` Hal Feng 2023-02-23 10:22 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 10/19] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 17:26 ` Conor Dooley 2023-02-21 17:26 ` Conor Dooley 2023-02-23 5:52 ` Hal Feng 2023-02-23 5:52 ` Hal Feng 2023-03-09 14:22 ` Geert Uytterhoeven 2023-03-09 14:22 ` Geert Uytterhoeven 2023-03-13 2:29 ` Hal Feng 2023-03-13 2:29 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 11/19] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 15:12 ` Conor Dooley 2023-02-21 15:12 ` Conor Dooley 2023-02-23 6:17 ` Hal Feng 2023-02-23 6:17 ` Hal Feng 2023-02-26 16:07 ` Emil Renner Berthing 2023-02-26 16:07 ` Emil Renner Berthing 2023-02-28 2:30 ` Hal Feng 2023-02-28 2:30 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 12/19] clk: starfive: Add StarFive JH7110 always-on " Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-26 17:34 ` Emil Renner Berthing 2023-02-26 17:34 ` Emil Renner Berthing 2023-02-28 2:42 ` Hal Feng 2023-02-28 2:42 ` Hal Feng 2023-03-09 9:43 ` Hal Feng 2023-03-09 9:43 ` Hal Feng 2023-03-09 14:06 ` Emil Renner Berthing 2023-03-09 14:06 ` Emil Renner Berthing 2023-03-09 18:11 ` Conor Dooley 2023-03-09 18:11 ` Conor Dooley 2023-03-09 18:19 ` Emil Renner Berthing 2023-03-09 18:19 ` Emil Renner Berthing 2023-03-09 19:32 ` Palmer Dabbelt 2023-03-09 19:32 ` Palmer Dabbelt 2023-02-21 2:46 ` [PATCH v4 13/19] reset: starfive: Add StarFive JH7110 reset driver Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 15:33 ` Emil Renner Berthing 2023-02-21 15:33 ` Emil Renner Berthing 2023-02-21 16:34 ` Conor Dooley 2023-02-21 16:34 ` Conor Dooley 2023-02-23 6:48 ` Hal Feng 2023-02-23 6:48 ` Hal Feng 2023-02-23 6:29 ` Hal Feng 2023-02-23 6:29 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 14/19] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 15/19] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 16/19] dt-bindings: riscv: Add SiFive S7 compatible Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 11:38 ` Krzysztof Kozlowski 2023-02-21 11:38 ` Krzysztof Kozlowski 2023-02-21 15:10 ` Conor Dooley 2023-02-21 15:10 ` Conor Dooley 2023-02-21 2:46 ` [PATCH v4 17/19] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 17:03 ` Conor Dooley 2023-02-21 17:03 ` Conor Dooley 2023-02-23 7:16 ` Hal Feng 2023-02-23 7:16 ` Hal Feng 2023-02-27 18:10 ` Conor Dooley 2023-02-27 18:10 ` Conor Dooley 2023-02-21 2:46 ` [PATCH v4 18/19] riscv: dts: starfive: Add StarFive JH7110 pin function definitions Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 2:46 ` [PATCH v4 19/19] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree Hal Feng 2023-02-21 2:46 ` Hal Feng 2023-02-21 15:03 ` Emil Renner Berthing 2023-02-21 15:03 ` Emil Renner Berthing 2023-02-23 8:50 ` Hal Feng 2023-02-23 8:50 ` Hal Feng 2023-02-27 18:12 ` Conor Dooley 2023-02-27 18:12 ` Conor Dooley 2023-02-27 20:00 ` Conor Dooley 2023-02-27 20:00 ` Conor Dooley 2023-02-28 2:58 ` Hal Feng 2023-02-28 2:58 ` Hal Feng 2023-02-22 15:00 ` [PATCH v4 00/19] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC patchwork-bot+linux-riscv 2023-02-22 15:00 ` patchwork-bot+linux-riscv 2023-02-22 15:35 ` Conor Dooley 2023-03-03 19:08 ` Tommaso Merciai 2023-03-03 19:08 ` Tommaso Merciai 2023-03-06 3:29 ` Hal Feng 2023-03-06 3:29 ` Hal Feng 2023-03-06 10:22 ` Tommaso Merciai 2023-03-06 10:22 ` Tommaso Merciai 2023-03-07 8:36 ` Hal Feng 2023-03-07 8:36 ` Hal Feng 2023-03-07 8:51 ` Conor Dooley 2023-03-07 8:51 ` Conor Dooley 2023-03-07 10:08 ` Hal Feng 2023-03-07 10:08 ` Hal Feng 2023-03-08 12:28 ` Tommaso Merciai 2023-03-08 12:28 ` Tommaso Merciai 2023-03-08 13:36 ` Conor Dooley 2023-03-08 13:36 ` Conor Dooley 2023-03-09 16:49 ` Tommaso Merciai 2023-03-09 16:49 ` Tommaso Merciai 2023-03-09 17:52 ` Conor Dooley 2023-03-09 17:52 ` Conor Dooley 2023-03-09 18:58 ` Tommaso Merciai 2023-03-09 18:58 ` Tommaso Merciai 2023-03-09 19:03 ` Conor Dooley 2023-03-09 19:03 ` Conor Dooley 2023-03-10 7:48 ` Tommaso Merciai 2023-03-10 7:48 ` Tommaso Merciai
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20230221024645.127922-5-hal.feng@starfivetech.com \ --to=hal.feng@starfivetech.com \ --cc=aou@eecs.berkeley.edu \ --cc=ben.dooks@sifive.com \ --cc=conor@kernel.org \ --cc=daniel.lezcano@linaro.org \ --cc=devicetree@vger.kernel.org \ --cc=emil.renner.berthing@canonical.com \ --cc=krzysztof.kozlowski+dt@linaro.org \ --cc=linux-clk@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-riscv@lists.infradead.org \ --cc=maz@kernel.org \ --cc=mturquette@baylibre.com \ --cc=p.zabel@pengutronix.de \ --cc=palmer@dabbelt.com \ --cc=paul.walmsley@sifive.com \ --cc=robh+dt@kernel.org \ --cc=sboyd@kernel.org \ --cc=tglx@linutronix.de \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.