From: Hal Feng <hal.feng@starfivetech.com>
To: Conor Dooley <conor@kernel.org>,
<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Ben Dooks <ben.dooks@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 00/19] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC
Date: Tue, 7 Mar 2023 16:36:41 +0800 [thread overview]
Message-ID: <3a605bc8-104e-0935-4fd8-2da16ab9053b@starfivetech.com> (raw)
In-Reply-To: <20230221024645.127922-1-hal.feng@starfivetech.com>
On Tue, 21 Feb 2023 10:46:26 +0800, Hal Feng wrote:
> This patch series adds basic clock, reset & DT support for StarFive
> JH7110 SoC. Patch 17 depends on series [1] which provides pinctrl
> dt-bindings. Patch 19 depends on series [2] which provides dt-bindings
> of VisionFive 2 board and JH7110 SoC.
>
> You can simply review or test the patches at the link [3].
>
> [1]: https://lore.kernel.org/all/20230209143702.44408-1-hal.feng@starfivetech.com/
> [2]: https://lore.kernel.org/all/20230216131511.3327943-1-conor.dooley@microchip.com/
> [3]: https://github.com/hal-feng/linux/commits/visionfive2-minimal
Hi Conor,
When I tried to rebase these patches on v6.3-rc1, I found the kernel
would crash on the VisionFive 2 board during startup. The logs are as
below. I checkout the branch to the mainline and found that the kernel
would also crash on the VisionFive board which is equipped with JH7100
SoC.
--------------------------------
Unable to handle kernel paging request at virtual address 0000004cccccccd4
Oops [#1]
Modules linked in:
CPU: 3 PID: 87 Comm: udevd Not tainted 6.3.0-rc1-00019-g239e7809f291 #305
Hardware name: StarFive VisionFive 2 v1.3B (DT)
epc : enqueue_timer+0x18/0x90
ra : internal_add_timer+0x2c/0x38
epc : ffffffff8006a714 ra : ffffffff8006a7b8 sp : ffffffc80443bc80
gp : ffffffff80eb5100 tp : ffffffd8c01db200 t0 : 0000000000000000
t1 : 000000000000000f t2 : 0000000038b3ea28 s0 : ffffffc80443bcb0
s1 : ffffffff80813940 a0 : ffffffff80813940 a1 : ffffffc80443bd48
a2 : 000000000000020b a3 : cccccccd0b000000 a4 : cccccccccccccccc
a5 : 000000000000020b a6 : ffffffff80814a08 a7 : 0000000000000001
s2 : ffffffc80443bd48 s3 : 0000000008400040 s4 : ffffffff80813940
s5 : ffffffff80eea0b8 s6 : ffffffff80eb7220 s7 : 0000000000000040
s8 : ffffffff80eb61e0 s9 : 0000002ac84a2548 s10: 0000002ad53e92c0
s11: 0000000000000001 t3 : 000000000000003f t4 : 0000000000000000
t5 : 0000000000000004 t6 : 0000000000000003
status: 0000000200000100 badaddr: 0000004cccccccd4 cause: 000000000000000f
[<ffffffff8006a714>] enqueue_timer+0x18/0x90
[<ffffffff8006aa64>] add_timer_on+0xf0/0x134
[<ffffffff80500f18>] try_to_generate_entropy+0x1ec/0x232
[<ffffffff8035a636>] urandom_read_iter+0x42/0xc2
[<ffffffff800fff16>] vfs_read+0x17c/0x1e4
[<ffffffff801005b6>] ksys_read+0x78/0x98
[<ffffffff801005e4>] sys_read+0xe/0x16
[<ffffffff800035dc>] ret_from_syscall+0x0/0x2
Code: 9381 9713 0037 0813 0705 983a 3703 0008 e198 c311 (e70c) d713
---[ end trace 0000000000000000 ]---
note: udevd[87] exited with irqs disabled
Segmentation fault
FAIL
Saving random seed:
rcu: INFO: rcu_sched detected stalls on CPUs/tasks:
rcu: 1-...0: (0 ticks this GP) idle=19c4/1/0x4000000000000000 softirq=42/42 fqs=7474
rcu: (detected by 2, t=15005 jiffies, g=-195, q=35 ncpus=4)
Task dump for CPU 1:
task:dd state:R running task stack:0 pid:92 ppid:88 flags:0x00000008
Call Trace:
[<ffffffff80003764>] ret_from_fork+0x0/0xc
rcu: INFO: rcu_sched detected stalls on CPUs/tasks:
rcu: 1-...0: (0 ticks this GP) idle=19c4/1/0x4000000000000000 softirq=42/42 fqs=29814
rcu: (detected by 2, t=60018 jiffies, g=-195, q=35 ncpus=4)
Task dump for CPU 1:
task:dd state:R running task stack:0 pid:92 ppid:88 flags:0x00000008
Call Trace:
[<ffffffff80003764>] ret_from_fork+0x0/0xc
...
--------------------------------
I used 'git bisect' and found out the commit 9493e6f3ce02 is the
cause. I tried to revert this commit on the tag v6.3-rc1, but it
seems there is no improvement.
Any options I am missing? Could you please give me some suggestions
to adapt to the new changes between 6.2 and 6.3? Thank you in
advance.
Best regards,
Hal
WARNING: multiple messages have this Message-ID (diff)
From: Hal Feng <hal.feng@starfivetech.com>
To: Conor Dooley <conor@kernel.org>,
<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-clk@vger.kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Ben Dooks <ben.dooks@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 00/19] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC
Date: Tue, 7 Mar 2023 16:36:41 +0800 [thread overview]
Message-ID: <3a605bc8-104e-0935-4fd8-2da16ab9053b@starfivetech.com> (raw)
In-Reply-To: <20230221024645.127922-1-hal.feng@starfivetech.com>
On Tue, 21 Feb 2023 10:46:26 +0800, Hal Feng wrote:
> This patch series adds basic clock, reset & DT support for StarFive
> JH7110 SoC. Patch 17 depends on series [1] which provides pinctrl
> dt-bindings. Patch 19 depends on series [2] which provides dt-bindings
> of VisionFive 2 board and JH7110 SoC.
>
> You can simply review or test the patches at the link [3].
>
> [1]: https://lore.kernel.org/all/20230209143702.44408-1-hal.feng@starfivetech.com/
> [2]: https://lore.kernel.org/all/20230216131511.3327943-1-conor.dooley@microchip.com/
> [3]: https://github.com/hal-feng/linux/commits/visionfive2-minimal
Hi Conor,
When I tried to rebase these patches on v6.3-rc1, I found the kernel
would crash on the VisionFive 2 board during startup. The logs are as
below. I checkout the branch to the mainline and found that the kernel
would also crash on the VisionFive board which is equipped with JH7100
SoC.
--------------------------------
Unable to handle kernel paging request at virtual address 0000004cccccccd4
Oops [#1]
Modules linked in:
CPU: 3 PID: 87 Comm: udevd Not tainted 6.3.0-rc1-00019-g239e7809f291 #305
Hardware name: StarFive VisionFive 2 v1.3B (DT)
epc : enqueue_timer+0x18/0x90
ra : internal_add_timer+0x2c/0x38
epc : ffffffff8006a714 ra : ffffffff8006a7b8 sp : ffffffc80443bc80
gp : ffffffff80eb5100 tp : ffffffd8c01db200 t0 : 0000000000000000
t1 : 000000000000000f t2 : 0000000038b3ea28 s0 : ffffffc80443bcb0
s1 : ffffffff80813940 a0 : ffffffff80813940 a1 : ffffffc80443bd48
a2 : 000000000000020b a3 : cccccccd0b000000 a4 : cccccccccccccccc
a5 : 000000000000020b a6 : ffffffff80814a08 a7 : 0000000000000001
s2 : ffffffc80443bd48 s3 : 0000000008400040 s4 : ffffffff80813940
s5 : ffffffff80eea0b8 s6 : ffffffff80eb7220 s7 : 0000000000000040
s8 : ffffffff80eb61e0 s9 : 0000002ac84a2548 s10: 0000002ad53e92c0
s11: 0000000000000001 t3 : 000000000000003f t4 : 0000000000000000
t5 : 0000000000000004 t6 : 0000000000000003
status: 0000000200000100 badaddr: 0000004cccccccd4 cause: 000000000000000f
[<ffffffff8006a714>] enqueue_timer+0x18/0x90
[<ffffffff8006aa64>] add_timer_on+0xf0/0x134
[<ffffffff80500f18>] try_to_generate_entropy+0x1ec/0x232
[<ffffffff8035a636>] urandom_read_iter+0x42/0xc2
[<ffffffff800fff16>] vfs_read+0x17c/0x1e4
[<ffffffff801005b6>] ksys_read+0x78/0x98
[<ffffffff801005e4>] sys_read+0xe/0x16
[<ffffffff800035dc>] ret_from_syscall+0x0/0x2
Code: 9381 9713 0037 0813 0705 983a 3703 0008 e198 c311 (e70c) d713
---[ end trace 0000000000000000 ]---
note: udevd[87] exited with irqs disabled
Segmentation fault
FAIL
Saving random seed:
rcu: INFO: rcu_sched detected stalls on CPUs/tasks:
rcu: 1-...0: (0 ticks this GP) idle=19c4/1/0x4000000000000000 softirq=42/42 fqs=7474
rcu: (detected by 2, t=15005 jiffies, g=-195, q=35 ncpus=4)
Task dump for CPU 1:
task:dd state:R running task stack:0 pid:92 ppid:88 flags:0x00000008
Call Trace:
[<ffffffff80003764>] ret_from_fork+0x0/0xc
rcu: INFO: rcu_sched detected stalls on CPUs/tasks:
rcu: 1-...0: (0 ticks this GP) idle=19c4/1/0x4000000000000000 softirq=42/42 fqs=29814
rcu: (detected by 2, t=60018 jiffies, g=-195, q=35 ncpus=4)
Task dump for CPU 1:
task:dd state:R running task stack:0 pid:92 ppid:88 flags:0x00000008
Call Trace:
[<ffffffff80003764>] ret_from_fork+0x0/0xc
...
--------------------------------
I used 'git bisect' and found out the commit 9493e6f3ce02 is the
cause. I tried to revert this commit on the tag v6.3-rc1, but it
seems there is no improvement.
Any options I am missing? Could you please give me some suggestions
to adapt to the new changes between 6.2 and 6.3? Thank you in
advance.
Best regards,
Hal
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-03-07 8:36 UTC|newest]
Thread overview: 143+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-21 2:46 [PATCH v4 00/19] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 01/19] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 02/19] clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 03/19] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 04/19] reset: Create subdirectory for StarFive drivers Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 05/19] reset: starfive: Factor out common JH71X0 reset code Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 17:10 ` Conor Dooley
2023-02-21 17:10 ` Conor Dooley
2023-02-21 2:46 ` [PATCH v4 06/19] reset: starfive: Extract the " Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 17:13 ` Conor Dooley
2023-02-21 17:13 ` Conor Dooley
2023-02-21 2:46 ` [PATCH v4 07/19] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 17:17 ` Conor Dooley
2023-02-21 17:17 ` Conor Dooley
2023-02-21 2:46 ` [PATCH v4 08/19] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 09/19] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 17:23 ` Conor Dooley
2023-02-21 17:23 ` Conor Dooley
2023-02-23 3:40 ` Hal Feng
2023-02-23 3:40 ` Hal Feng
2023-02-22 9:13 ` Krzysztof Kozlowski
2023-02-22 9:13 ` Krzysztof Kozlowski
2023-02-22 10:40 ` Conor Dooley
2023-02-22 10:40 ` Conor Dooley
2023-02-23 10:22 ` Hal Feng
2023-02-23 10:22 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 10/19] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 17:26 ` Conor Dooley
2023-02-21 17:26 ` Conor Dooley
2023-02-23 5:52 ` Hal Feng
2023-02-23 5:52 ` Hal Feng
2023-03-09 14:22 ` Geert Uytterhoeven
2023-03-09 14:22 ` Geert Uytterhoeven
2023-03-13 2:29 ` Hal Feng
2023-03-13 2:29 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 11/19] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 15:12 ` Conor Dooley
2023-02-21 15:12 ` Conor Dooley
2023-02-23 6:17 ` Hal Feng
2023-02-23 6:17 ` Hal Feng
2023-02-26 16:07 ` Emil Renner Berthing
2023-02-26 16:07 ` Emil Renner Berthing
2023-02-28 2:30 ` Hal Feng
2023-02-28 2:30 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 12/19] clk: starfive: Add StarFive JH7110 always-on " Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-26 17:34 ` Emil Renner Berthing
2023-02-26 17:34 ` Emil Renner Berthing
2023-02-28 2:42 ` Hal Feng
2023-02-28 2:42 ` Hal Feng
2023-03-09 9:43 ` Hal Feng
2023-03-09 9:43 ` Hal Feng
2023-03-09 14:06 ` Emil Renner Berthing
2023-03-09 14:06 ` Emil Renner Berthing
2023-03-09 18:11 ` Conor Dooley
2023-03-09 18:11 ` Conor Dooley
2023-03-09 18:19 ` Emil Renner Berthing
2023-03-09 18:19 ` Emil Renner Berthing
2023-03-09 19:32 ` Palmer Dabbelt
2023-03-09 19:32 ` Palmer Dabbelt
2023-02-21 2:46 ` [PATCH v4 13/19] reset: starfive: Add StarFive JH7110 reset driver Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 15:33 ` Emil Renner Berthing
2023-02-21 15:33 ` Emil Renner Berthing
2023-02-21 16:34 ` Conor Dooley
2023-02-21 16:34 ` Conor Dooley
2023-02-23 6:48 ` Hal Feng
2023-02-23 6:48 ` Hal Feng
2023-02-23 6:29 ` Hal Feng
2023-02-23 6:29 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 14/19] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 15/19] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 16/19] dt-bindings: riscv: Add SiFive S7 compatible Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 11:38 ` Krzysztof Kozlowski
2023-02-21 11:38 ` Krzysztof Kozlowski
2023-02-21 15:10 ` Conor Dooley
2023-02-21 15:10 ` Conor Dooley
2023-02-21 2:46 ` [PATCH v4 17/19] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 17:03 ` Conor Dooley
2023-02-21 17:03 ` Conor Dooley
2023-02-23 7:16 ` Hal Feng
2023-02-23 7:16 ` Hal Feng
2023-02-27 18:10 ` Conor Dooley
2023-02-27 18:10 ` Conor Dooley
2023-02-21 2:46 ` [PATCH v4 18/19] riscv: dts: starfive: Add StarFive JH7110 pin function definitions Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 2:46 ` [PATCH v4 19/19] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree Hal Feng
2023-02-21 2:46 ` Hal Feng
2023-02-21 15:03 ` Emil Renner Berthing
2023-02-21 15:03 ` Emil Renner Berthing
2023-02-23 8:50 ` Hal Feng
2023-02-23 8:50 ` Hal Feng
2023-02-27 18:12 ` Conor Dooley
2023-02-27 18:12 ` Conor Dooley
2023-02-27 20:00 ` Conor Dooley
2023-02-27 20:00 ` Conor Dooley
2023-02-28 2:58 ` Hal Feng
2023-02-28 2:58 ` Hal Feng
2023-02-22 15:00 ` [PATCH v4 00/19] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC patchwork-bot+linux-riscv
2023-02-22 15:00 ` patchwork-bot+linux-riscv
2023-02-22 15:35 ` Conor Dooley
2023-03-03 19:08 ` Tommaso Merciai
2023-03-03 19:08 ` Tommaso Merciai
2023-03-06 3:29 ` Hal Feng
2023-03-06 3:29 ` Hal Feng
2023-03-06 10:22 ` Tommaso Merciai
2023-03-06 10:22 ` Tommaso Merciai
2023-03-07 8:36 ` Hal Feng [this message]
2023-03-07 8:36 ` Hal Feng
2023-03-07 8:51 ` Conor Dooley
2023-03-07 8:51 ` Conor Dooley
2023-03-07 10:08 ` Hal Feng
2023-03-07 10:08 ` Hal Feng
2023-03-08 12:28 ` Tommaso Merciai
2023-03-08 12:28 ` Tommaso Merciai
2023-03-08 13:36 ` Conor Dooley
2023-03-08 13:36 ` Conor Dooley
2023-03-09 16:49 ` Tommaso Merciai
2023-03-09 16:49 ` Tommaso Merciai
2023-03-09 17:52 ` Conor Dooley
2023-03-09 17:52 ` Conor Dooley
2023-03-09 18:58 ` Tommaso Merciai
2023-03-09 18:58 ` Tommaso Merciai
2023-03-09 19:03 ` Conor Dooley
2023-03-09 19:03 ` Conor Dooley
2023-03-10 7:48 ` Tommaso Merciai
2023-03-10 7:48 ` Tommaso Merciai
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3a605bc8-104e-0935-4fd8-2da16ab9053b@starfivetech.com \
--to=hal.feng@starfivetech.com \
--cc=aou@eecs.berkeley.edu \
--cc=ben.dooks@sifive.com \
--cc=conor@kernel.org \
--cc=daniel.lezcano@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=emil.renner.berthing@canonical.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=maz@kernel.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.