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From: "Heiko Stübner" <heiko@sntech.de>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Jisheng Zhang <jszhang@kernel.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 01/13] riscv: fix jal offsets in patched alternatives
Date: Mon, 05 Dec 2022 16:31:08 +0100	[thread overview]
Message-ID: <4764569.GXAFRqVoOG@diego> (raw)
In-Reply-To: <20221204174632.3677-2-jszhang@kernel.org>

Am Sonntag, 4. Dezember 2022, 18:46:20 CET schrieb Jisheng Zhang:
> Alternatives live in a different section, so offsets used by jal
> instruction will point to wrong locations after the patch got applied.
> 
> Similar to arm64, adjust the location to consider that offset.
> 
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>  arch/riscv/include/asm/alternative.h |  2 ++
>  arch/riscv/kernel/alternative.c      | 38 ++++++++++++++++++++++++++++
>  arch/riscv/kernel/cpufeature.c       |  3 +++
>  3 files changed, 43 insertions(+)
> 
> diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h
> index c58ec3cc4bc3..33eae9541684 100644
> --- a/arch/riscv/include/asm/alternative.h
> +++ b/arch/riscv/include/asm/alternative.h
> @@ -29,6 +29,8 @@ void apply_module_alternatives(void *start, size_t length);
>  
>  void riscv_alternative_fix_auipc_jalr(void *alt_ptr, unsigned int len,
>  				      int patch_offset);
> +void riscv_alternative_fix_jal(void *alt_ptr, unsigned int len,
> +			       int patch_offset);
>  
>  struct alt_entry {
>  	void *old_ptr;		 /* address of original instruciton or data  */
> diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternative.c
> index 292cc42dc3be..9d88375624b5 100644
> --- a/arch/riscv/kernel/alternative.c
> +++ b/arch/riscv/kernel/alternative.c
> @@ -125,6 +125,44 @@ void riscv_alternative_fix_auipc_jalr(void *alt_ptr, unsigned int len,
>  	}
>  }
>  
> +#define to_jal_imm(value)						\
> +	(((value & (RV_J_IMM_10_1_MASK << RV_J_IMM_10_1_OFF)) << RV_I_IMM_11_0_OPOFF) | \
> +	 ((value & (RV_J_IMM_11_MASK << RV_J_IMM_11_OFF)) << RV_J_IMM_11_OPOFF) | \
> +	 ((value & (RV_J_IMM_19_12_OPOFF << RV_J_IMM_19_12_OFF)) << RV_J_IMM_19_12_OPOFF) | \
> +	 ((value & (1 << RV_J_IMM_SIGN_OFF)) << RV_J_IMM_SIGN_OPOFF))
> +
> +void riscv_alternative_fix_jal(void *alt_ptr, unsigned int len,
> +			       int patch_offset)
> +{

I think we might want to unfiy this into a common function like

	riscv_alternative_fix_offsets(...)

so that we only run through the code block once

	for (i = 0; i < num_instr; i++) {
		if (riscv_insn_is_auipc_jalr(inst1, inst2)) {
			riscv_alternative_fix_auipc_jalr(...)
			continue;
		}

		if (riscv_insn_is_jal(inst)) {
			riscv_alternative_fix_jal(...)
			continue;
		}
	}

This would also remove the need from calling multiple functions
after patching alternatives.

Thoughts?


Heiko

> +	int num_instr = len / sizeof(u32);
> +	unsigned int call;
> +	int i;
> +	int imm;
> +
> +	for (i = 0; i < num_instr; i++) {
> +		u32 inst = riscv_instruction_at(alt_ptr, i);
> +
> +		if (!riscv_insn_is_jal(inst))
> +			continue;
> +
> +		/* get and adjust new target address */
> +		imm = RV_EXTRACT_JTYPE_IMM(inst);
> +		imm -= patch_offset;
> +
> +		/* pick the original jal */
> +		call = inst;
> +
> +		/* drop the old IMMs, all jal imm bits sit at 31:12 */
> +		call &= ~GENMASK(31, 12);
> +
> +		/* add the adapted IMMs */
> +		call |= to_jal_imm(imm);
> +
> +		/* patch the call place again */
> +		patch_text_nosync(alt_ptr + i * sizeof(u32), &call, 4);
> +	}
> +}
> +
>  /*
>   * This is called very early in the boot process (directly after we run
>   * a feature detect on the boot CPU). No need to worry about other CPUs
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index ba62a4ff5ccd..c743f0adc794 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -324,6 +324,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin,
>  			riscv_alternative_fix_auipc_jalr(alt->old_ptr,
>  							 alt->alt_len,
>  							 alt->old_ptr - alt->alt_ptr);
> +			riscv_alternative_fix_jal(alt->old_ptr,
> +						  alt->alt_len,
> +						  alt->old_ptr - alt->alt_ptr);
>  		}
>  	}
>  }
> 





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WARNING: multiple messages have this Message-ID (diff)
From: "Heiko Stübner" <heiko@sntech.de>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Andrew Jones <ajones@ventanamicro.com>,
	Jisheng Zhang <jszhang@kernel.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 01/13] riscv: fix jal offsets in patched alternatives
Date: Mon, 05 Dec 2022 16:31:08 +0100	[thread overview]
Message-ID: <4764569.GXAFRqVoOG@diego> (raw)
In-Reply-To: <20221204174632.3677-2-jszhang@kernel.org>

Am Sonntag, 4. Dezember 2022, 18:46:20 CET schrieb Jisheng Zhang:
> Alternatives live in a different section, so offsets used by jal
> instruction will point to wrong locations after the patch got applied.
> 
> Similar to arm64, adjust the location to consider that offset.
> 
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>  arch/riscv/include/asm/alternative.h |  2 ++
>  arch/riscv/kernel/alternative.c      | 38 ++++++++++++++++++++++++++++
>  arch/riscv/kernel/cpufeature.c       |  3 +++
>  3 files changed, 43 insertions(+)
> 
> diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h
> index c58ec3cc4bc3..33eae9541684 100644
> --- a/arch/riscv/include/asm/alternative.h
> +++ b/arch/riscv/include/asm/alternative.h
> @@ -29,6 +29,8 @@ void apply_module_alternatives(void *start, size_t length);
>  
>  void riscv_alternative_fix_auipc_jalr(void *alt_ptr, unsigned int len,
>  				      int patch_offset);
> +void riscv_alternative_fix_jal(void *alt_ptr, unsigned int len,
> +			       int patch_offset);
>  
>  struct alt_entry {
>  	void *old_ptr;		 /* address of original instruciton or data  */
> diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternative.c
> index 292cc42dc3be..9d88375624b5 100644
> --- a/arch/riscv/kernel/alternative.c
> +++ b/arch/riscv/kernel/alternative.c
> @@ -125,6 +125,44 @@ void riscv_alternative_fix_auipc_jalr(void *alt_ptr, unsigned int len,
>  	}
>  }
>  
> +#define to_jal_imm(value)						\
> +	(((value & (RV_J_IMM_10_1_MASK << RV_J_IMM_10_1_OFF)) << RV_I_IMM_11_0_OPOFF) | \
> +	 ((value & (RV_J_IMM_11_MASK << RV_J_IMM_11_OFF)) << RV_J_IMM_11_OPOFF) | \
> +	 ((value & (RV_J_IMM_19_12_OPOFF << RV_J_IMM_19_12_OFF)) << RV_J_IMM_19_12_OPOFF) | \
> +	 ((value & (1 << RV_J_IMM_SIGN_OFF)) << RV_J_IMM_SIGN_OPOFF))
> +
> +void riscv_alternative_fix_jal(void *alt_ptr, unsigned int len,
> +			       int patch_offset)
> +{

I think we might want to unfiy this into a common function like

	riscv_alternative_fix_offsets(...)

so that we only run through the code block once

	for (i = 0; i < num_instr; i++) {
		if (riscv_insn_is_auipc_jalr(inst1, inst2)) {
			riscv_alternative_fix_auipc_jalr(...)
			continue;
		}

		if (riscv_insn_is_jal(inst)) {
			riscv_alternative_fix_jal(...)
			continue;
		}
	}

This would also remove the need from calling multiple functions
after patching alternatives.

Thoughts?


Heiko

> +	int num_instr = len / sizeof(u32);
> +	unsigned int call;
> +	int i;
> +	int imm;
> +
> +	for (i = 0; i < num_instr; i++) {
> +		u32 inst = riscv_instruction_at(alt_ptr, i);
> +
> +		if (!riscv_insn_is_jal(inst))
> +			continue;
> +
> +		/* get and adjust new target address */
> +		imm = RV_EXTRACT_JTYPE_IMM(inst);
> +		imm -= patch_offset;
> +
> +		/* pick the original jal */
> +		call = inst;
> +
> +		/* drop the old IMMs, all jal imm bits sit at 31:12 */
> +		call &= ~GENMASK(31, 12);
> +
> +		/* add the adapted IMMs */
> +		call |= to_jal_imm(imm);
> +
> +		/* patch the call place again */
> +		patch_text_nosync(alt_ptr + i * sizeof(u32), &call, 4);
> +	}
> +}
> +
>  /*
>   * This is called very early in the boot process (directly after we run
>   * a feature detect on the boot CPU). No need to worry about other CPUs
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index ba62a4ff5ccd..c743f0adc794 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -324,6 +324,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin,
>  			riscv_alternative_fix_auipc_jalr(alt->old_ptr,
>  							 alt->alt_len,
>  							 alt->old_ptr - alt->alt_ptr);
> +			riscv_alternative_fix_jal(alt->old_ptr,
> +						  alt->alt_len,
> +						  alt->old_ptr - alt->alt_ptr);
>  		}
>  	}
>  }
> 





  parent reply	other threads:[~2022-12-05 15:31 UTC|newest]

Thread overview: 104+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-04 17:46 [PATCH v2 00/13] riscv: improve boot time isa extensions handling Jisheng Zhang
2022-12-04 17:46 ` Jisheng Zhang
2022-12-04 17:46 ` [PATCH v2 01/13] riscv: fix jal offsets in patched alternatives Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 14:57   ` Andrew Jones
2022-12-05 14:57     ` Andrew Jones
2022-12-05 15:34     ` Jisheng Zhang
2022-12-05 15:34       ` Jisheng Zhang
2022-12-05 16:42     ` Jisheng Zhang
2022-12-05 16:42       ` Jisheng Zhang
2022-12-05 16:49       ` Jisheng Zhang
2022-12-05 16:49         ` Jisheng Zhang
2022-12-06  5:50         ` Andrew Jones
2022-12-06  5:50           ` Andrew Jones
2022-12-05 15:31   ` Heiko Stübner [this message]
2022-12-05 15:31     ` Heiko Stübner
2022-12-05 15:40     ` Jisheng Zhang
2022-12-05 15:40       ` Jisheng Zhang
2022-12-05 18:36       ` Conor Dooley
2022-12-05 18:36         ` Conor Dooley
2022-12-05 18:49         ` Heiko Stübner
2022-12-05 18:49           ` Heiko Stübner
2022-12-05 19:49           ` Conor Dooley
2022-12-05 19:49             ` Conor Dooley
2022-12-06  0:39             ` Heiko Stübner
2022-12-06  0:39               ` Heiko Stübner
2022-12-06 15:02               ` Jisheng Zhang
2022-12-06 15:02                 ` Jisheng Zhang
2022-12-06 16:12                 ` Conor Dooley
2022-12-06 16:12                   ` Conor Dooley
2022-12-19 21:32                   ` Conor Dooley
2022-12-19 21:32                     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 02/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-04 21:52   ` Heiko Stübner
2022-12-04 21:52     ` Heiko Stübner
2022-12-05 15:16     ` Jisheng Zhang
2022-12-05 15:16       ` Jisheng Zhang
2022-12-05 15:31       ` Conor Dooley
2022-12-05 15:31         ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 03/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 19:09   ` Conor Dooley
2022-12-05 19:09     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 04/13] riscv: hwcap: make ISA extension ids can be used in asm Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 18:53   ` Conor Dooley
2022-12-05 18:53     ` Conor Dooley
2022-12-22 22:58     ` Conor Dooley
2022-12-22 22:58       ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 19:37   ` Conor Dooley
2022-12-05 19:37     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 06/13] riscv: introduce riscv_has_extension_[un]likely() Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-06 20:25   ` Conor Dooley
2022-12-06 20:25     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely() Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-04 17:46 ` [PATCH v2 08/13] riscv: module: move find_section to module.h Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 15:25   ` Andrew Jones
2022-12-05 15:25     ` Andrew Jones
2022-12-06 20:44   ` Conor Dooley
2022-12-06 20:44     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 09/13] riscv: switch to relative alternative entries Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  0:51   ` Guo Ren
2022-12-05  0:51     ` Guo Ren
2022-12-05 15:18     ` Jisheng Zhang
2022-12-05 15:18       ` Jisheng Zhang
2022-12-06  4:34       ` Guo Ren
2022-12-06  4:34         ` Guo Ren
2022-12-06 14:50         ` Jisheng Zhang
2022-12-06 14:50           ` Jisheng Zhang
2022-12-06 21:43           ` Conor Dooley
2022-12-06 21:43             ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 10/13] riscv: alternative: patch alternatives in the vDSO Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  1:56   ` Guo Ren
2022-12-05  1:56     ` Guo Ren
2022-12-05 15:23     ` Jisheng Zhang
2022-12-05 15:23       ` Jisheng Zhang
2022-12-06  4:29       ` Guo Ren
2022-12-06  4:29         ` Guo Ren
2023-01-11 14:12   ` Andrew Jones
2023-01-11 14:12     ` Andrew Jones
2022-12-04 17:46 ` [PATCH v2 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  0:52   ` Guo Ren
2022-12-05  0:52     ` Guo Ren
2022-12-06 22:04   ` Conor Dooley
2022-12-06 22:04     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  0:52   ` Guo Ren
2022-12-05  0:52     ` Guo Ren
2022-12-04 17:46 ` [PATCH v2 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  0:53   ` Guo Ren
2022-12-05  0:53     ` Guo Ren
2022-12-06 22:16   ` Conor Dooley
2022-12-06 22:16     ` Conor Dooley

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