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From: Conor Dooley <conor@kernel.org>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Andrew Jones <ajones@ventanamicro.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 03/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier
Date: Mon, 5 Dec 2022 19:09:29 +0000	[thread overview]
Message-ID: <Y45B6eB0BQTSZMEa@spud> (raw)
In-Reply-To: <20221204174632.3677-4-jszhang@kernel.org>


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On Mon, Dec 05, 2022 at 01:46:22AM +0800, Jisheng Zhang wrote:
> Now, the riscv_cpufeature_patch_func() do nothing in the stage of
> RISCV_ALTERNATIVES_EARLY_BOOT. We can move the detection of "early
> boot" stage earlier.
> 
> In following patch, we will make riscv_cpufeature_patch_func() scans
> all ISA extensions.

I'm not 100% on the motivation here. Let me try and regurgitate the
changelog in a way that makes more sense to me and maybe you can confirm
it.

Currently riscv_cpufeature_patch_func() does nothing at the
RISCV_ALTERNATIVES_EARLY_BOOT stage.
Add a check to detect whether we are in this stage and exit early.
This will allow us to use riscv_cpufeature_patch_func() for scanning of
all ISA extensions.

Would that be a correct summary?

Thanks,
Conor.

> 
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  arch/riscv/kernel/cpufeature.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 364d1fe86bea..a4d2af67e05c 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -305,6 +305,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin,
>  	struct alt_entry *alt;
>  	u32 tmp;
>  
> +	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
> +		return;
> +
>  	for (alt = begin; alt < end; alt++) {
>  		if (alt->vendor_id != 0)
>  			continue;
> -- 
> 2.37.2
> 

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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Andrew Jones <ajones@ventanamicro.com>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 03/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier
Date: Mon, 5 Dec 2022 19:09:29 +0000	[thread overview]
Message-ID: <Y45B6eB0BQTSZMEa@spud> (raw)
In-Reply-To: <20221204174632.3677-4-jszhang@kernel.org>

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On Mon, Dec 05, 2022 at 01:46:22AM +0800, Jisheng Zhang wrote:
> Now, the riscv_cpufeature_patch_func() do nothing in the stage of
> RISCV_ALTERNATIVES_EARLY_BOOT. We can move the detection of "early
> boot" stage earlier.
> 
> In following patch, we will make riscv_cpufeature_patch_func() scans
> all ISA extensions.

I'm not 100% on the motivation here. Let me try and regurgitate the
changelog in a way that makes more sense to me and maybe you can confirm
it.

Currently riscv_cpufeature_patch_func() does nothing at the
RISCV_ALTERNATIVES_EARLY_BOOT stage.
Add a check to detect whether we are in this stage and exit early.
This will allow us to use riscv_cpufeature_patch_func() for scanning of
all ISA extensions.

Would that be a correct summary?

Thanks,
Conor.

> 
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  arch/riscv/kernel/cpufeature.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 364d1fe86bea..a4d2af67e05c 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -305,6 +305,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin,
>  	struct alt_entry *alt;
>  	u32 tmp;
>  
> +	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
> +		return;
> +
>  	for (alt = begin; alt < end; alt++) {
>  		if (alt->vendor_id != 0)
>  			continue;
> -- 
> 2.37.2
> 

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  reply	other threads:[~2022-12-05 19:09 UTC|newest]

Thread overview: 104+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-04 17:46 [PATCH v2 00/13] riscv: improve boot time isa extensions handling Jisheng Zhang
2022-12-04 17:46 ` Jisheng Zhang
2022-12-04 17:46 ` [PATCH v2 01/13] riscv: fix jal offsets in patched alternatives Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 14:57   ` Andrew Jones
2022-12-05 14:57     ` Andrew Jones
2022-12-05 15:34     ` Jisheng Zhang
2022-12-05 15:34       ` Jisheng Zhang
2022-12-05 16:42     ` Jisheng Zhang
2022-12-05 16:42       ` Jisheng Zhang
2022-12-05 16:49       ` Jisheng Zhang
2022-12-05 16:49         ` Jisheng Zhang
2022-12-06  5:50         ` Andrew Jones
2022-12-06  5:50           ` Andrew Jones
2022-12-05 15:31   ` Heiko Stübner
2022-12-05 15:31     ` Heiko Stübner
2022-12-05 15:40     ` Jisheng Zhang
2022-12-05 15:40       ` Jisheng Zhang
2022-12-05 18:36       ` Conor Dooley
2022-12-05 18:36         ` Conor Dooley
2022-12-05 18:49         ` Heiko Stübner
2022-12-05 18:49           ` Heiko Stübner
2022-12-05 19:49           ` Conor Dooley
2022-12-05 19:49             ` Conor Dooley
2022-12-06  0:39             ` Heiko Stübner
2022-12-06  0:39               ` Heiko Stübner
2022-12-06 15:02               ` Jisheng Zhang
2022-12-06 15:02                 ` Jisheng Zhang
2022-12-06 16:12                 ` Conor Dooley
2022-12-06 16:12                   ` Conor Dooley
2022-12-19 21:32                   ` Conor Dooley
2022-12-19 21:32                     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 02/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-04 21:52   ` Heiko Stübner
2022-12-04 21:52     ` Heiko Stübner
2022-12-05 15:16     ` Jisheng Zhang
2022-12-05 15:16       ` Jisheng Zhang
2022-12-05 15:31       ` Conor Dooley
2022-12-05 15:31         ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 03/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 19:09   ` Conor Dooley [this message]
2022-12-05 19:09     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 04/13] riscv: hwcap: make ISA extension ids can be used in asm Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 18:53   ` Conor Dooley
2022-12-05 18:53     ` Conor Dooley
2022-12-22 22:58     ` Conor Dooley
2022-12-22 22:58       ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 05/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 19:37   ` Conor Dooley
2022-12-05 19:37     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 06/13] riscv: introduce riscv_has_extension_[un]likely() Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-06 20:25   ` Conor Dooley
2022-12-06 20:25     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 07/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely() Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-04 17:46 ` [PATCH v2 08/13] riscv: module: move find_section to module.h Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05 15:25   ` Andrew Jones
2022-12-05 15:25     ` Andrew Jones
2022-12-06 20:44   ` Conor Dooley
2022-12-06 20:44     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 09/13] riscv: switch to relative alternative entries Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  0:51   ` Guo Ren
2022-12-05  0:51     ` Guo Ren
2022-12-05 15:18     ` Jisheng Zhang
2022-12-05 15:18       ` Jisheng Zhang
2022-12-06  4:34       ` Guo Ren
2022-12-06  4:34         ` Guo Ren
2022-12-06 14:50         ` Jisheng Zhang
2022-12-06 14:50           ` Jisheng Zhang
2022-12-06 21:43           ` Conor Dooley
2022-12-06 21:43             ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 10/13] riscv: alternative: patch alternatives in the vDSO Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  1:56   ` Guo Ren
2022-12-05  1:56     ` Guo Ren
2022-12-05 15:23     ` Jisheng Zhang
2022-12-05 15:23       ` Jisheng Zhang
2022-12-06  4:29       ` Guo Ren
2022-12-06  4:29         ` Guo Ren
2023-01-11 14:12   ` Andrew Jones
2023-01-11 14:12     ` Andrew Jones
2022-12-04 17:46 ` [PATCH v2 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  0:52   ` Guo Ren
2022-12-05  0:52     ` Guo Ren
2022-12-06 22:04   ` Conor Dooley
2022-12-06 22:04     ` Conor Dooley
2022-12-04 17:46 ` [PATCH v2 12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  0:52   ` Guo Ren
2022-12-05  0:52     ` Guo Ren
2022-12-04 17:46 ` [PATCH v2 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Jisheng Zhang
2022-12-04 17:46   ` Jisheng Zhang
2022-12-05  0:53   ` Guo Ren
2022-12-05  0:53     ` Guo Ren
2022-12-06 22:16   ` Conor Dooley
2022-12-06 22:16     ` Conor Dooley

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