All of lore.kernel.org
 help / color / mirror / Atom feed
From: <Conor.Dooley@microchip.com>
To: <daniel.lezcano@linaro.org>, <tglx@linutronix.de>,
	<maz@kernel.org>, <palmer@dabbelt.com>
Cc: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<anup@brainfault.org>, <Conor.Dooley@microchip.com>,
	<guoren@kernel.org>, <sagar.kadam@sifive.com>,
	<jrtc27@jrtc27.com>, <aou@eecs.berkeley.edu>,
	<ajones@ventanamicro.com>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	<qemu-riscv@nongnu.org>, <paul.walmsley@sifive.com>
Subject: Re: [PATCH v4 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings
Date: Thu, 15 Sep 2022 18:45:47 +0000	[thread overview]
Message-ID: <9614efe9-d95e-fa0c-05fe-bac3fe62fa86@microchip.com> (raw)
In-Reply-To: <20220823183319.3314940-1-mail@conchuod.ie>

On 23/08/2022 19:33, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The device trees produced automatically for the virt and spike machines
> fail dt-validate on several grounds. Some of these need to be fixed in
> the linux kernel's dt-bindings, but others are caused by bugs in QEMU.
> 
> Patches been sent that fix the QEMU issues [0], but a couple of them
> need to be fixed in the kernel's dt-bindings. The first patches add
> compatibles for "riscv,{clint,plic}0" which are present in drivers and
> the auto generated QEMU dtbs. The final patch should be ignored for all
> serious purposes unless you want to wash your eyes out afterwards, but
> JIC the versioned extensions ever come up, it's there.

Been no movement here for a few weeks, I assume things are waiting for
either Acks from Palmer or for him to take the patches directly?

Thanks,
Conor.

> 
> Thanks to Rob Herring for reporting these issues [1],
> Conor.
> 
> To reproduce the errors:
> ./build/qemu-system-riscv64 -nographic -machine virt,dumpdtb=qemu.dtb
> dt-validate -p /path/to/linux/kernel/Documentation/devicetree/bindings/processed-schema.json qemu.dtb
> (The processed schema needs to be generated first)
> 
> 0 - https://lore.kernel.org/linux-riscv/20220810184612.157317-1-mail@conchuod.ie/
> 1 - https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/
> 
> Changes since v3:
> - dropped the charset restrictions for standard multiletter isa extensions
> 
> Changes since v2:
> - removed the extra patches from the directory
> 
> Changes since v1:
> - drop the "legacy systems" bit from the binding descriptions
> - convert to a regex for the isa string
> 
> Conor Dooley (4):
>   dt-bindings: timer: sifive,clint: add legacy riscv compatible
>   dt-bindings: interrupt-controller: sifive,plic: add legacy riscv
>     compatible
>   dt-bindings: riscv: add new riscv,isa strings for emulators
>   dt-bindings: riscv: isa string bonus content
> 
>  .../sifive,plic-1.0.0.yaml                     |  5 +++++
>  .../devicetree/bindings/riscv/cpus.yaml        |  9 ++++++---
>  .../bindings/timer/sifive,clint.yaml           | 18 ++++++++++++------
>  3 files changed, 23 insertions(+), 9 deletions(-)
> 
> 
> base-commit: 568035b01cfb107af8d2e4bd2fb9aea22cf5b868

WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <daniel.lezcano@linaro.org>, <tglx@linutronix.de>,
	<maz@kernel.org>, <palmer@dabbelt.com>
Cc: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<anup@brainfault.org>, <Conor.Dooley@microchip.com>,
	<guoren@kernel.org>, <sagar.kadam@sifive.com>,
	<jrtc27@jrtc27.com>, <aou@eecs.berkeley.edu>,
	<ajones@ventanamicro.com>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	<qemu-riscv@nongnu.org>, <paul.walmsley@sifive.com>
Subject: Re: [PATCH v4 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings
Date: Thu, 15 Sep 2022 18:45:47 +0000	[thread overview]
Message-ID: <9614efe9-d95e-fa0c-05fe-bac3fe62fa86@microchip.com> (raw)
In-Reply-To: <20220823183319.3314940-1-mail@conchuod.ie>

On 23/08/2022 19:33, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The device trees produced automatically for the virt and spike machines
> fail dt-validate on several grounds. Some of these need to be fixed in
> the linux kernel's dt-bindings, but others are caused by bugs in QEMU.
> 
> Patches been sent that fix the QEMU issues [0], but a couple of them
> need to be fixed in the kernel's dt-bindings. The first patches add
> compatibles for "riscv,{clint,plic}0" which are present in drivers and
> the auto generated QEMU dtbs. The final patch should be ignored for all
> serious purposes unless you want to wash your eyes out afterwards, but
> JIC the versioned extensions ever come up, it's there.

Been no movement here for a few weeks, I assume things are waiting for
either Acks from Palmer or for him to take the patches directly?

Thanks,
Conor.

> 
> Thanks to Rob Herring for reporting these issues [1],
> Conor.
> 
> To reproduce the errors:
> ./build/qemu-system-riscv64 -nographic -machine virt,dumpdtb=qemu.dtb
> dt-validate -p /path/to/linux/kernel/Documentation/devicetree/bindings/processed-schema.json qemu.dtb
> (The processed schema needs to be generated first)
> 
> 0 - https://lore.kernel.org/linux-riscv/20220810184612.157317-1-mail@conchuod.ie/
> 1 - https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/
> 
> Changes since v3:
> - dropped the charset restrictions for standard multiletter isa extensions
> 
> Changes since v2:
> - removed the extra patches from the directory
> 
> Changes since v1:
> - drop the "legacy systems" bit from the binding descriptions
> - convert to a regex for the isa string
> 
> Conor Dooley (4):
>   dt-bindings: timer: sifive,clint: add legacy riscv compatible
>   dt-bindings: interrupt-controller: sifive,plic: add legacy riscv
>     compatible
>   dt-bindings: riscv: add new riscv,isa strings for emulators
>   dt-bindings: riscv: isa string bonus content
> 
>  .../sifive,plic-1.0.0.yaml                     |  5 +++++
>  .../devicetree/bindings/riscv/cpus.yaml        |  9 ++++++---
>  .../bindings/timer/sifive,clint.yaml           | 18 ++++++++++++------
>  3 files changed, 23 insertions(+), 9 deletions(-)
> 
> 
> base-commit: 568035b01cfb107af8d2e4bd2fb9aea22cf5b868
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2022-09-15 18:46 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-23 18:33 [PATCH v4 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings Conor Dooley
2022-08-23 18:33 ` Conor Dooley
2022-08-23 18:33 ` [PATCH v4 1/4] dt-bindings: timer: sifive,clint: add legacy riscv compatible Conor Dooley
2022-08-23 18:33   ` [PATCH v4 1/4] dt-bindings: timer: sifive, clint: " Conor Dooley
2022-08-23 18:33   ` [PATCH v4 1/4] dt-bindings: timer: sifive,clint: " Conor Dooley
2022-08-24 18:02   ` Heiko Stübner
2022-08-24 18:02     ` [PATCH v4 1/4] dt-bindings: timer: sifive, clint: " Heiko Stübner
2022-08-24 18:02     ` [PATCH v4 1/4] dt-bindings: timer: sifive,clint: " Heiko Stübner
2022-08-23 18:33 ` [PATCH v4 2/4] dt-bindings: interrupt-controller: sifive,plic: " Conor Dooley
2022-08-23 18:33   ` [PATCH v4 2/4] dt-bindings: interrupt-controller: sifive, plic: " Conor Dooley
2022-08-23 18:33   ` [PATCH v4 2/4] dt-bindings: interrupt-controller: sifive,plic: " Conor Dooley
2022-08-24 17:44   ` Heiko Stübner
2022-08-24 17:44     ` [PATCH v4 2/4] dt-bindings: interrupt-controller: sifive, plic: " Heiko Stübner
2022-08-24 17:44     ` [PATCH v4 2/4] dt-bindings: interrupt-controller: sifive,plic: " Heiko Stübner
2022-08-24 17:55     ` Conor.Dooley
2022-08-24 17:55       ` Conor.Dooley
2022-08-24 18:00       ` Heiko Stübner
2022-08-24 18:00         ` [PATCH v4 2/4] dt-bindings: interrupt-controller: sifive, plic: " Heiko Stübner
2022-08-24 18:00         ` [PATCH v4 2/4] dt-bindings: interrupt-controller: sifive,plic: " Heiko Stübner
2022-08-24 18:02   ` Heiko Stübner
2022-08-24 18:02     ` [PATCH v4 2/4] dt-bindings: interrupt-controller: sifive, plic: " Heiko Stübner
2022-08-24 18:02     ` [PATCH v4 2/4] dt-bindings: interrupt-controller: sifive,plic: " Heiko Stübner
2022-08-23 18:33 ` [PATCH v4 3/4] dt-bindings: riscv: add new riscv,isa strings for emulators Conor Dooley
2022-08-23 18:33   ` [PATCH v4 3/4] dt-bindings: riscv: add new riscv, isa " Conor Dooley
2022-08-23 18:33   ` [PATCH v4 3/4] dt-bindings: riscv: add new riscv,isa " Conor Dooley
2022-08-24 17:41   ` Heiko Stübner
2022-08-24 17:41     ` [PATCH v4 3/4] dt-bindings: riscv: add new riscv, isa " Heiko Stübner
2022-08-24 17:41     ` [PATCH v4 3/4] dt-bindings: riscv: add new riscv,isa " Heiko Stübner
2022-08-30 18:03   ` Rob Herring
2022-08-30 18:03     ` [PATCH v4 3/4] dt-bindings: riscv: add new riscv, isa " Rob Herring
2022-08-30 18:03     ` [PATCH v4 3/4] dt-bindings: riscv: add new riscv,isa " Rob Herring
2022-08-23 18:33 ` [PATCH v4 4/4] dt-bindings: riscv: isa string bonus content Conor Dooley
2022-08-23 18:33   ` Conor Dooley
2022-08-24 13:26   ` Rob Herring
2022-08-24 13:26     ` Rob Herring
2022-09-15 18:45 ` Conor.Dooley [this message]
2022-09-15 18:45   ` [PATCH v4 0/4] Fix dt-validate issues on qemu dtbdumps due to dt-bindings Conor.Dooley
2022-10-13  5:15 ` (subset) " Palmer Dabbelt
2022-10-13  5:15   ` Palmer Dabbelt

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=9614efe9-d95e-fa0c-05fe-bac3fe62fa86@microchip.com \
    --to=conor.dooley@microchip.com \
    --cc=ajones@ventanamicro.com \
    --cc=anup@brainfault.org \
    --cc=aou@eecs.berkeley.edu \
    --cc=daniel.lezcano@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=guoren@kernel.org \
    --cc=jrtc27@jrtc27.com \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=maz@kernel.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=qemu-riscv@nongnu.org \
    --cc=robh+dt@kernel.org \
    --cc=sagar.kadam@sifive.com \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.