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From: Atish Patra <atish.patra@wdc.com>
To: Kevin Hilman <khilman@baylibre.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v3 0/5] arch: riscv: add board and SoC DT file support
Date: Thu, 6 Jun 2019 16:15:40 -0700	[thread overview]
Message-ID: <05010310-baa2-c711-cb54-96a9138f582a@wdc.com> (raw)
In-Reply-To: <7h36kogchx.fsf@baylibre.com>

On 6/5/19 10:37 AM, Kevin Hilman wrote:
> Hi Paul,
> 
> Paul Walmsley <paul.walmsley@sifive.com> writes:
> 
>> Add support for building flattened DT files from DT source files under
>> arch/riscv/boot/dts.  Follow existing kernel precedent from other SoC
>> architectures.  Start our board support by adding initial support for
>> the SiFive FU540 SoC and the first development board that uses it, the
>> SiFive HiFive Unleashed A00.
>>
>> This third version of the patch set adds I2C data for the chip,
>> incorporates all remaining changes that riscv-pk was making
>> automatically, and addresses a comment from Rob Herring
>> <robh@kernel.org>.
>>
>> Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the
>> BBL and open-source FSBL, with modifications to pass in the DTB
>> file generated by these patches.
> 
> Tested this series on top of v5.2-rc3 on HiFive Unleashed board using
> OpenSBI + mainline u-boot (master branch as of today).
> 
> Tested-by: Kevin Hilman <khilman@baylibre.com>
> 
>> This patch series can be found, along with the PRCI patch set
>> and the DT macro prerequisite patch, at:
>>
>> https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1
> 
> nit: I only see this series in that branch, not any of the prerequisite
> patches you mentioned, which made me assume I could this series alone on
> top of v5.2-rc3, which worked just fine.
> 

I tried only this series on top of v5.2-rc3. Kernel boots file with DT 
updated via U-Boot. But networking didn't come up.

Do you have networking up after the boot? If yes, can you please share 
the config.

> Kevin
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
> 


-- 
Regards,
Atish

WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atish.patra@wdc.com>
To: Kevin Hilman <khilman@baylibre.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-riscv@lists.infradead.org"
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v3 0/5] arch: riscv: add board and SoC DT file support
Date: Thu, 6 Jun 2019 16:15:40 -0700	[thread overview]
Message-ID: <05010310-baa2-c711-cb54-96a9138f582a@wdc.com> (raw)
In-Reply-To: <7h36kogchx.fsf@baylibre.com>

On 6/5/19 10:37 AM, Kevin Hilman wrote:
> Hi Paul,
> 
> Paul Walmsley <paul.walmsley@sifive.com> writes:
> 
>> Add support for building flattened DT files from DT source files under
>> arch/riscv/boot/dts.  Follow existing kernel precedent from other SoC
>> architectures.  Start our board support by adding initial support for
>> the SiFive FU540 SoC and the first development board that uses it, the
>> SiFive HiFive Unleashed A00.
>>
>> This third version of the patch set adds I2C data for the chip,
>> incorporates all remaining changes that riscv-pk was making
>> automatically, and addresses a comment from Rob Herring
>> <robh@kernel.org>.
>>
>> Boot-tested on v5.2-rc1 on a HiFive Unleashed A00 board, using the
>> BBL and open-source FSBL, with modifications to pass in the DTB
>> file generated by these patches.
> 
> Tested this series on top of v5.2-rc3 on HiFive Unleashed board using
> OpenSBI + mainline u-boot (master branch as of today).
> 
> Tested-by: Kevin Hilman <khilman@baylibre.com>
> 
>> This patch series can be found, along with the PRCI patch set
>> and the DT macro prerequisite patch, at:
>>
>> https://github.com/sifive/riscv-linux/tree/dev/paulw/dts-v5.2-rc1
> 
> nit: I only see this series in that branch, not any of the prerequisite
> patches you mentioned, which made me assume I could this series alone on
> top of v5.2-rc3, which worked just fine.
> 

I tried only this series on top of v5.2-rc3. Kernel boots file with DT 
updated via U-Boot. But networking didn't come up.

Do you have networking up after the boot? If yes, can you please share 
the config.

> Kevin
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
> 


-- 
Regards,
Atish

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2019-06-06 23:15 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-02  8:04 [PATCH v3 0/5] arch: riscv: add board and SoC DT file support Paul Walmsley
2019-06-02  8:04 ` Paul Walmsley
2019-06-02  8:04 ` [PATCH v3 1/5] arch: riscv: add support for building DTB files from DT source data Paul Walmsley
2019-06-02  8:04   ` Paul Walmsley
2019-06-04 14:37   ` Loys Ollivier
2019-06-04 14:37     ` Loys Ollivier
2019-06-07  5:12     ` Paul Walmsley
2019-06-07  5:12       ` Paul Walmsley
2019-06-07  9:49       ` Loys Ollivier
2019-06-07  9:49         ` Loys Ollivier
2019-06-08 17:56       ` Palmer Dabbelt
2019-06-08 17:56         ` Palmer Dabbelt
2019-06-09  5:50         ` Paul Walmsley
2019-06-09  5:50           ` Paul Walmsley
2019-06-09  7:49           ` Christoph Hellwig
2019-06-09  7:49             ` Christoph Hellwig
2019-06-02  8:04 ` [PATCH v3 2/5] dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540 Paul Walmsley
2019-06-02  8:04   ` Paul Walmsley
2019-06-10 21:44   ` Rob Herring
2019-06-10 21:44     ` Rob Herring
2019-06-16 18:39     ` Paul Walmsley
2019-06-16 18:39       ` Paul Walmsley
2019-06-02  8:04 ` [PATCH v3 3/5] dt-bindings: riscv: convert cpu binding to json-schema Paul Walmsley
2019-06-02  8:04   ` Paul Walmsley
2019-06-02  8:04   ` Paul Walmsley
2019-06-02  8:04 ` [PATCH v3 4/5] riscv: dts: add initial support for the SiFive FU540-C000 SoC Paul Walmsley
2019-06-02  8:04   ` Paul Walmsley
2019-06-04 14:38   ` Loys Ollivier
2019-06-04 14:38     ` Loys Ollivier
2019-06-02  8:05 ` [PATCH v3 5/5] riscv: dts: add initial board data for the SiFive HiFive Unleashed Paul Walmsley
2019-06-02  8:05   ` Paul Walmsley
2019-06-04 14:41   ` Loys Ollivier
2019-06-04 14:41     ` Loys Ollivier
2019-06-09  6:18   ` Antony Pavlov
2019-06-09  6:18     ` Antony Pavlov
2019-06-09  6:18     ` Antony Pavlov
2019-06-16 18:36     ` Paul Walmsley
2019-06-16 18:36       ` Paul Walmsley
2019-06-16 18:36       ` Paul Walmsley
2019-06-04 14:31 ` [PATCH v3 0/5] arch: riscv: add board and SoC DT file support Loys Ollivier
2019-06-04 14:31   ` Loys Ollivier
2019-06-07  5:14   ` Paul Walmsley
2019-06-07  5:14     ` Paul Walmsley
2019-06-05 17:36 ` Kevin Hilman
2019-06-05 17:36   ` Kevin Hilman
2019-06-06 23:15   ` Atish Patra [this message]
2019-06-06 23:15     ` Atish Patra
2019-06-07 16:51     ` Kevin Hilman
2019-06-07 16:51       ` Kevin Hilman
2019-06-07 17:58       ` Atish Patra
2019-06-07 17:58         ` Atish Patra
2019-06-07 20:55         ` Auer, Lukas
2019-06-07 20:55           ` Auer, Lukas
2019-06-07  5:18   ` Paul Walmsley
2019-06-07  5:18     ` Paul Walmsley

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