* [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver
@ 2016-06-29 9:14 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:14 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc, linux-kernel,
linux-rockchip, daniel.vetter, emil.l.velikov, dianders,
dri-devel, Tomasz Figa, Javier Martinez Canillas,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.
Also same misc fix to analogix_dp driver:
- Hotplug invalid which report by Dan Carpenter
- Make panel detect to an optional action
- correct the register bit define error in ANALOGIX_DP_PLL_REG_1
Changes in v4:
- Assigned the GRF setting magic numbers to a #define that corresponds to
a TRM name. (Sean & Heiko)
- Pass the chip type to device type directly. (Sean)
- Add reviewed flag from Tomasz.
- Add reviewed flag from Sean
- Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
- Add reviewed flag from Tomasz.
- Improved the overly complicated .atomic_check function. (Sean)
- Add reviewed flag from Tomasz
- Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
- Add reviewed flag from Tomasz
- Add reviewed flag from Sean.
- Add reviewed flag from Tomasz.
- Using mask variable to collect the YUV video format. (Sean)
- Add reviewed flag from Tomasz.
- Correct the misspell of 'contoller'. (Sean)
- Add reviewed flag from Sean.
- Add reviewed flag from Tomasz.
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.
- Fix compiled error, sorry.
"dp->cgfclk" --> 'dp->grfclk'
- Check the the error code properly, 'EPROBE_DEFER' should be returned,
'ENOENT' should assign a NULL point to grfclk, other errors should be
regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
- Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/351821/]
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.
Changes in v3:
- Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
- Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
- Add acked flag from Mark.
- Add reviewed flag from Tomasz.
[https://chromium-review.googlesource.com/#/c/346315/15]
- Add tested flag from Javier
- Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
[https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
- Add tested flag from Javier
- Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
- Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
- Add the acked flag from Mark.
- Add the acked flag from Mark.
- Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346318/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@113]
- Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346317/15]
- Add the acked flag from Mark.
- Add the reviewed flag from Tomasz.
[https://chromium-review.googlesource.com/#/c/346853/12]
- Add the acked flag from Mark.
- Add reviewed flag from Stéphane.
[https://chromium-review.googlesource.com/#/c/346319/15]
- Add tested flag from Javier
- Add this patch in v3
- Add this patch in v3
Yakir Yang (11):
drm/rockchip: analogix_dp: split the lcdc select setting into device
data
drm/bridge: analogix_dp: correct the register bit define error in
ANALOGIX_DP_PLL_REG_1
drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit
setting
drm/rockchip: analogix_dp: add rk3399 eDP support
drm/rockchip: analogix_dp: make panel detect to an optional action
drm/bridge: analogix_dp: passing the connector as an argument in
.get_modes()
drm/rockchip: analogix_dp: correct the connector display color format
and bpc
drm/rockchip: analogix_dp: update the comments about why need to
hardcode VOP output mode
drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
drm/rockchip: analogix_dp: introduce the pclk for grf
dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
.../bindings/display/bridge/analogix_dp.txt | 1 +
.../display/rockchip/analogix_dp-rockchip.txt | 9 +-
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 +-
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 8 +-
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 12 +-
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 5 +-
drivers/gpu/drm/exynos/exynos_dp.c | 4 +-
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 174 +++++++++++++++------
include/drm/bridge/analogix_dp.h | 9 +-
9 files changed, 160 insertions(+), 64 deletions(-)
--
1.9.1
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 35+ messages in thread* [PATCH v4 01/11] drm/rockchip: analogix_dp: split the lcdc select setting into device data
2016-06-29 9:14 ` Yakir Yang
@ 2016-06-29 9:15 ` Yakir Yang
-1 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
eDP controller need to declare which vop provide the video source,
and it's defined in GRF registers.
But different chips have different GRF register address, so we need to
create a device data to declare the GRF messages for each chips.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
---
Changes in v4:
- Assigned the GRF setting magic numbers to a #define that corresponds to
a TRM name. (Sean & Heiko)
- Pass the chip type to device type directly. (Sean)
- Add reviewed flag from Tomasz.
Changes in v3:
- Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
- Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
- Add acked flag from Mark.
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 49 ++++++++++++++++++++-----
1 file changed, 39 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index c120172..0a30931 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -14,6 +14,7 @@
#include <linux/component.h>
#include <linux/mfd/syscon.h>
+#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <linux/regmap.h>
#include <linux/reset.h>
@@ -33,13 +34,26 @@
#include "rockchip_drm_drv.h"
#include "rockchip_drm_vop.h"
+#define RK3288_GRF_SOC_CON6 0x25c
+#define RK3288_EDP_LCDC_SEL BIT(5)
+
+#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
+
#define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm)
-/* dp grf register offset */
-#define GRF_SOC_CON6 0x025c
-#define GRF_EDP_LCD_SEL_MASK BIT(5)
-#define GRF_EDP_SEL_VOP_LIT BIT(5)
-#define GRF_EDP_SEL_VOP_BIG 0
+/**
+ * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
+ * @lcdsel_grf_reg: grf register offset of lcdc select
+ * @lcdsel_big: reg value of selecting vop big for eDP
+ * @lcdsel_lit: reg value of selecting vop little for eDP
+ * @chip_type: specific chip type
+ */
+struct rockchip_dp_chip_data {
+ u32 lcdsel_grf_reg;
+ u32 lcdsel_big;
+ u32 lcdsel_lit;
+ u32 chip_type;
+};
struct rockchip_dp_device {
struct drm_device *drm_dev;
@@ -51,6 +65,8 @@ struct rockchip_dp_device {
struct regmap *grf;
struct reset_control *rst;
+ const struct rockchip_dp_chip_data *data;
+
struct analogix_dp_plat_data plat_data;
};
@@ -119,13 +135,13 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
return;
if (ret)
- val = GRF_EDP_SEL_VOP_LIT | (GRF_EDP_LCD_SEL_MASK << 16);
+ val = dp->data->lcdsel_lit;
else
- val = GRF_EDP_SEL_VOP_BIG | (GRF_EDP_LCD_SEL_MASK << 16);
+ val = dp->data->lcdsel_big;
dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
- ret = regmap_write(dp->grf, GRF_SOC_CON6, val);
+ ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
if (ret != 0) {
dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
return;
@@ -246,6 +262,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
void *data)
{
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
+ const struct rockchip_dp_chip_data *dp_data;
struct drm_device *drm_dev = data;
int ret;
@@ -256,10 +273,15 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
*/
dev_set_drvdata(dev, NULL);
+ dp_data = of_device_get_match_data(dev);
+ if (!dp_data)
+ return -ENODEV;
+
ret = rockchip_dp_init(dp);
if (ret < 0)
return ret;
+ dp->data = dp_data;
dp->drm_dev = drm_dev;
ret = rockchip_dp_drm_create_encoder(dp);
@@ -270,7 +292,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
dp->plat_data.encoder = &dp->encoder;
- dp->plat_data.dev_type = RK3288_DP;
+ dp->plat_data.dev_type = dp->data->chip_type;
dp->plat_data.power_on = rockchip_dp_poweron;
dp->plat_data.power_off = rockchip_dp_powerdown;
@@ -356,8 +378,15 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
#endif
};
+static const struct rockchip_dp_chip_data rk3288_dp = {
+ .lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
+ .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
+ .lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL),
+ .chip_type = RK3288_DP,
+};
+
static const struct of_device_id rockchip_dp_dt_ids[] = {
- {.compatible = "rockchip,rk3288-dp",},
+ {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
{}
};
MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 01/11] drm/rockchip: analogix_dp: split the lcdc select setting into device data
@ 2016-06-29 9:15 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc, linux-kernel,
linux-rockchip, daniel.vetter, emil.l.velikov, dianders,
dri-devel, Tomasz Figa, Javier Martinez Canillas,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
eDP controller need to declare which vop provide the video source,
and it's defined in GRF registers.
But different chips have different GRF register address, so we need to
create a device data to declare the GRF messages for each chips.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
---
Changes in v4:
- Assigned the GRF setting magic numbers to a #define that corresponds to
a TRM name. (Sean & Heiko)
- Pass the chip type to device type directly. (Sean)
- Add reviewed flag from Tomasz.
Changes in v3:
- Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
- Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
- Add acked flag from Mark.
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 49 ++++++++++++++++++++-----
1 file changed, 39 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index c120172..0a30931 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -14,6 +14,7 @@
#include <linux/component.h>
#include <linux/mfd/syscon.h>
+#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <linux/regmap.h>
#include <linux/reset.h>
@@ -33,13 +34,26 @@
#include "rockchip_drm_drv.h"
#include "rockchip_drm_vop.h"
+#define RK3288_GRF_SOC_CON6 0x25c
+#define RK3288_EDP_LCDC_SEL BIT(5)
+
+#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
+
#define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm)
-/* dp grf register offset */
-#define GRF_SOC_CON6 0x025c
-#define GRF_EDP_LCD_SEL_MASK BIT(5)
-#define GRF_EDP_SEL_VOP_LIT BIT(5)
-#define GRF_EDP_SEL_VOP_BIG 0
+/**
+ * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
+ * @lcdsel_grf_reg: grf register offset of lcdc select
+ * @lcdsel_big: reg value of selecting vop big for eDP
+ * @lcdsel_lit: reg value of selecting vop little for eDP
+ * @chip_type: specific chip type
+ */
+struct rockchip_dp_chip_data {
+ u32 lcdsel_grf_reg;
+ u32 lcdsel_big;
+ u32 lcdsel_lit;
+ u32 chip_type;
+};
struct rockchip_dp_device {
struct drm_device *drm_dev;
@@ -51,6 +65,8 @@ struct rockchip_dp_device {
struct regmap *grf;
struct reset_control *rst;
+ const struct rockchip_dp_chip_data *data;
+
struct analogix_dp_plat_data plat_data;
};
@@ -119,13 +135,13 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
return;
if (ret)
- val = GRF_EDP_SEL_VOP_LIT | (GRF_EDP_LCD_SEL_MASK << 16);
+ val = dp->data->lcdsel_lit;
else
- val = GRF_EDP_SEL_VOP_BIG | (GRF_EDP_LCD_SEL_MASK << 16);
+ val = dp->data->lcdsel_big;
dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
- ret = regmap_write(dp->grf, GRF_SOC_CON6, val);
+ ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
if (ret != 0) {
dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
return;
@@ -246,6 +262,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
void *data)
{
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
+ const struct rockchip_dp_chip_data *dp_data;
struct drm_device *drm_dev = data;
int ret;
@@ -256,10 +273,15 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
*/
dev_set_drvdata(dev, NULL);
+ dp_data = of_device_get_match_data(dev);
+ if (!dp_data)
+ return -ENODEV;
+
ret = rockchip_dp_init(dp);
if (ret < 0)
return ret;
+ dp->data = dp_data;
dp->drm_dev = drm_dev;
ret = rockchip_dp_drm_create_encoder(dp);
@@ -270,7 +292,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
dp->plat_data.encoder = &dp->encoder;
- dp->plat_data.dev_type = RK3288_DP;
+ dp->plat_data.dev_type = dp->data->chip_type;
dp->plat_data.power_on = rockchip_dp_poweron;
dp->plat_data.power_off = rockchip_dp_powerdown;
@@ -356,8 +378,15 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
#endif
};
+static const struct rockchip_dp_chip_data rk3288_dp = {
+ .lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
+ .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
+ .lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL),
+ .chip_type = RK3288_DP,
+};
+
static const struct of_device_id rockchip_dp_dt_ids[] = {
- {.compatible = "rockchip,rk3288-dp",},
+ {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
{}
};
MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
--
1.9.1
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v4 01/11] drm/rockchip: analogix_dp: split the lcdc select setting into device data
2016-06-29 9:15 ` Yakir Yang
(?)
@ 2016-06-29 13:44 ` Sean Paul
-1 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:44 UTC (permalink / raw)
To: Yakir Yang
Cc: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner,
Javier Martinez Canillas, Stéphane Marchesin, Tomasz Figa,
David Airlie, Daniel Vetter, Thierry Reding, Douglas Anderson,
Krzysztof Kozlowski, Emil Velikov, Dan Carpenter,
Linux Kernel Mailing List, dri-devel, linux-samsung-soc,
linux-rockchip
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> eDP controller need to declare which vop provide the video source,
> and it's defined in GRF registers.
>
> But different chips have different GRF register address, so we need to
> create a device data to declare the GRF messages for each chips.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Acked-by: Mark Yao <mark.yao@rock-chips.com>
> Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
> ---
> Changes in v4:
> - Assigned the GRF setting magic numbers to a #define that corresponds to
> a TRM name. (Sean & Heiko)
> - Pass the chip type to device type directly. (Sean)
> - Add reviewed flag from Tomasz.
>
> Changes in v3:
> - Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
> - Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
> - Add acked flag from Mark.
>
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 49 ++++++++++++++++++++-----
> 1 file changed, 39 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index c120172..0a30931 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -14,6 +14,7 @@
>
> #include <linux/component.h>
> #include <linux/mfd/syscon.h>
> +#include <linux/of_device.h>
> #include <linux/of_graph.h>
> #include <linux/regmap.h>
> #include <linux/reset.h>
> @@ -33,13 +34,26 @@
> #include "rockchip_drm_drv.h"
> #include "rockchip_drm_vop.h"
>
> +#define RK3288_GRF_SOC_CON6 0x25c
> +#define RK3288_EDP_LCDC_SEL BIT(5)
> +
> +#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
> +
> #define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm)
>
> -/* dp grf register offset */
> -#define GRF_SOC_CON6 0x025c
> -#define GRF_EDP_LCD_SEL_MASK BIT(5)
> -#define GRF_EDP_SEL_VOP_LIT BIT(5)
> -#define GRF_EDP_SEL_VOP_BIG 0
> +/**
> + * struct rockchip_dp_chip_data - splite the grf setting of kind of chips
> + * @lcdsel_grf_reg: grf register offset of lcdc select
> + * @lcdsel_big: reg value of selecting vop big for eDP
> + * @lcdsel_lit: reg value of selecting vop little for eDP
> + * @chip_type: specific chip type
> + */
> +struct rockchip_dp_chip_data {
> + u32 lcdsel_grf_reg;
> + u32 lcdsel_big;
> + u32 lcdsel_lit;
> + u32 chip_type;
> +};
>
> struct rockchip_dp_device {
> struct drm_device *drm_dev;
> @@ -51,6 +65,8 @@ struct rockchip_dp_device {
> struct regmap *grf;
> struct reset_control *rst;
>
> + const struct rockchip_dp_chip_data *data;
> +
> struct analogix_dp_plat_data plat_data;
> };
>
> @@ -119,13 +135,13 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
> return;
>
> if (ret)
> - val = GRF_EDP_SEL_VOP_LIT | (GRF_EDP_LCD_SEL_MASK << 16);
> + val = dp->data->lcdsel_lit;
> else
> - val = GRF_EDP_SEL_VOP_BIG | (GRF_EDP_LCD_SEL_MASK << 16);
> + val = dp->data->lcdsel_big;
>
> dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
>
> - ret = regmap_write(dp->grf, GRF_SOC_CON6, val);
> + ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
> if (ret != 0) {
> dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
> return;
> @@ -246,6 +262,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
> void *data)
> {
> struct rockchip_dp_device *dp = dev_get_drvdata(dev);
> + const struct rockchip_dp_chip_data *dp_data;
> struct drm_device *drm_dev = data;
> int ret;
>
> @@ -256,10 +273,15 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
> */
> dev_set_drvdata(dev, NULL);
>
> + dp_data = of_device_get_match_data(dev);
> + if (!dp_data)
> + return -ENODEV;
> +
> ret = rockchip_dp_init(dp);
> if (ret < 0)
> return ret;
>
> + dp->data = dp_data;
> dp->drm_dev = drm_dev;
>
> ret = rockchip_dp_drm_create_encoder(dp);
> @@ -270,7 +292,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
>
> dp->plat_data.encoder = &dp->encoder;
>
> - dp->plat_data.dev_type = RK3288_DP;
> + dp->plat_data.dev_type = dp->data->chip_type;
> dp->plat_data.power_on = rockchip_dp_poweron;
> dp->plat_data.power_off = rockchip_dp_powerdown;
>
> @@ -356,8 +378,15 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
> #endif
> };
>
> +static const struct rockchip_dp_chip_data rk3288_dp = {
> + .lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
> + .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
> + .lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL),
> + .chip_type = RK3288_DP,
> +};
> +
> static const struct of_device_id rockchip_dp_dt_ids[] = {
> - {.compatible = "rockchip,rk3288-dp",},
> + {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
> {}
> };
> MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
> --
> 1.9.1
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v4 02/11] drm/bridge: analogix_dp: correct the register bit define error in ANALOGIX_DP_PLL_REG_1
@ 2016-06-29 9:15 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced
by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special
registers setting").
The PHY PLL input clock source is selected by ANALOGIX_DP_PLL_REG_1
BIT 0, not BIT 1.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
Changes in v4:
- Add reviewed flag from Sean
Changes in v3:
- Add reviewed flag from Tomasz.
[https://chromium-review.googlesource.com/#/c/346315/15]
- Add tested flag from Javier
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 337912b..88d56ad 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -163,8 +163,8 @@
#define HSYNC_POLARITY_CFG (0x1 << 0)
/* ANALOGIX_DP_PLL_REG_1 */
-#define REF_CLK_24M (0x1 << 1)
-#define REF_CLK_27M (0x0 << 1)
+#define REF_CLK_24M (0x1 << 0)
+#define REF_CLK_27M (0x0 << 0)
/* ANALOGIX_DP_LANE_MAP */
#define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6)
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 02/11] drm/bridge: analogix_dp: correct the register bit define error in ANALOGIX_DP_PLL_REG_1
@ 2016-06-29 9:15 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, David Airlie,
daniel.vetter-/w4YWyX8dFk, emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w,
dianders-F7+t8E8rja9g9hUCZPvPmw,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Tomasz Figa,
Javier Martinez Canillas, Sean Paul, Yakir Yang,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
There're an register define error in ANALOGIX_DP_PLL_REG_1 which introduced
by commit bcec20fd5ad6 ("drm: bridge: analogix/dp: add some rk3288 special
registers setting").
The PHY PLL input clock source is selected by ANALOGIX_DP_PLL_REG_1
BIT 0, not BIT 1.
Signed-off-by: Yakir Yang <ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Reviewed-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Reviewed-by: Tomasz Figa <tomasz.figa-F7+t8E8rja9Wk0Htik3J/w@public.gmane.org>
Tested-by: Javier Martinez Canillas <javier-JPH+aEBZ4P+UEJcrhfAQsw@public.gmane.org>
---
Changes in v4:
- Add reviewed flag from Sean
Changes in v3:
- Add reviewed flag from Tomasz.
[https://chromium-review.googlesource.com/#/c/346315/15]
- Add tested flag from Javier
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 337912b..88d56ad 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -163,8 +163,8 @@
#define HSYNC_POLARITY_CFG (0x1 << 0)
/* ANALOGIX_DP_PLL_REG_1 */
-#define REF_CLK_24M (0x1 << 1)
-#define REF_CLK_27M (0x0 << 1)
+#define REF_CLK_24M (0x1 << 0)
+#define REF_CLK_27M (0x0 << 0)
/* ANALOGIX_DP_LANE_MAP */
#define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6)
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v4 03/11] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting
2016-06-29 9:14 ` Yakir Yang
@ 2016-06-29 9:15 ` Yakir Yang
-1 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
As vendor document indicate, when REF_CLK bit set 0, then DP
phy's REF_CLK should switch to 24M source clock.
But due to IC PHY layout mistaken, some chips need to flip this
bit(like RK3288), and unfortunately they didn't indicate in the
DP version register. That's why we have to make this little hack.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
Changes in v4:
- Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
- Add reviewed flag from Tomasz.
Changes in v3:
- Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
[https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
- Add tested flag from Javier
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 12 ++++++++----
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 1 +
include/drm/bridge/analogix_dp.h | 5 +++++
3 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 49205ef..48030f0 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -74,8 +74,12 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
reg = SEL_24M | TX_DVDD_BIT_1_0625V;
writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
- if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
- writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
+ if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
+ reg = REF_CLK_24M;
+ if (dp->plat_data->dev_type == RK3288_DP)
+ reg ^= REF_CLK_MASK;
+
+ writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
@@ -244,7 +248,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
u32 reg;
u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
- if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+ if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
phy_pd_addr = ANALOGIX_DP_PD;
switch (block) {
@@ -448,7 +452,7 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
analogix_dp_reset_aux(dp);
/* Disable AUX transaction H/W retry */
- if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+ if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
AUX_HW_RETRY_COUNT_SEL(3) |
AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 88d56ad..cdcc6c5 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -165,6 +165,7 @@
/* ANALOGIX_DP_PLL_REG_1 */
#define REF_CLK_24M (0x1 << 0)
#define REF_CLK_27M (0x0 << 0)
+#define REF_CLK_MASK (0x1 << 0)
/* ANALOGIX_DP_LANE_MAP */
#define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6)
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 25afb31..790ab5d 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -18,6 +18,11 @@ enum analogix_dp_devtype {
RK3288_DP,
};
+static inline bool is_rockchip(enum analogix_dp_devtype type)
+{
+ return type == RK3288_DP;
+}
+
struct analogix_dp_plat_data {
enum analogix_dp_devtype dev_type;
struct drm_panel *panel;
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 03/11] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting
@ 2016-06-29 9:15 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc, linux-kernel,
linux-rockchip, daniel.vetter, emil.l.velikov, dianders,
dri-devel, Tomasz Figa, Javier Martinez Canillas,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
As vendor document indicate, when REF_CLK bit set 0, then DP
phy's REF_CLK should switch to 24M source clock.
But due to IC PHY layout mistaken, some chips need to flip this
bit(like RK3288), and unfortunately they didn't indicate in the
DP version register. That's why we have to make this little hack.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
Changes in v4:
- Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
- Add reviewed flag from Tomasz.
Changes in v3:
- Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
[https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
- Add tested flag from Javier
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 12 ++++++++----
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 1 +
include/drm/bridge/analogix_dp.h | 5 +++++
3 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
index 49205ef..48030f0 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
@@ -74,8 +74,12 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
reg = SEL_24M | TX_DVDD_BIT_1_0625V;
writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
- if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
- writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
+ if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
+ reg = REF_CLK_24M;
+ if (dp->plat_data->dev_type == RK3288_DP)
+ reg ^= REF_CLK_MASK;
+
+ writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
@@ -244,7 +248,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
u32 reg;
u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
- if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+ if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
phy_pd_addr = ANALOGIX_DP_PD;
switch (block) {
@@ -448,7 +452,7 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
analogix_dp_reset_aux(dp);
/* Disable AUX transaction H/W retry */
- if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+ if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
AUX_HW_RETRY_COUNT_SEL(3) |
AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
index 88d56ad..cdcc6c5 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
@@ -165,6 +165,7 @@
/* ANALOGIX_DP_PLL_REG_1 */
#define REF_CLK_24M (0x1 << 0)
#define REF_CLK_27M (0x0 << 0)
+#define REF_CLK_MASK (0x1 << 0)
/* ANALOGIX_DP_LANE_MAP */
#define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6)
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 25afb31..790ab5d 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -18,6 +18,11 @@ enum analogix_dp_devtype {
RK3288_DP,
};
+static inline bool is_rockchip(enum analogix_dp_devtype type)
+{
+ return type == RK3288_DP;
+}
+
struct analogix_dp_plat_data {
enum analogix_dp_devtype dev_type;
struct drm_panel *panel;
--
1.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v4 03/11] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting
2016-06-29 9:15 ` Yakir Yang
@ 2016-06-29 13:46 ` Sean Paul
-1 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:46 UTC (permalink / raw)
To: Yakir Yang
Cc: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner,
Javier Martinez Canillas, Stéphane Marchesin, Tomasz Figa,
David Airlie, Daniel Vetter, Thierry Reding, Douglas Anderson,
Krzysztof Kozlowski, Emil Velikov, Dan Carpenter,
Linux Kernel Mailing List, dri-devel, linux-samsung-soc,
linux-rockchip
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> As vendor document indicate, when REF_CLK bit set 0, then DP
> phy's REF_CLK should switch to 24M source clock.
>
> But due to IC PHY layout mistaken, some chips need to flip this
> bit(like RK3288), and unfortunately they didn't indicate in the
> DP version register. That's why we have to make this little hack.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
> ---
> Changes in v4:
> - Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
> - Add reviewed flag from Tomasz.
>
> Changes in v3:
> - Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
> reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
> [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
> - Add tested flag from Javier
>
> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 12 ++++++++----
> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 1 +
> include/drm/bridge/analogix_dp.h | 5 +++++
> 3 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 49205ef..48030f0 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -74,8 +74,12 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
> reg = SEL_24M | TX_DVDD_BIT_1_0625V;
> writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
>
> - if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
> - writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
> + if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
> + reg = REF_CLK_24M;
> + if (dp->plat_data->dev_type == RK3288_DP)
> + reg ^= REF_CLK_MASK;
> +
> + writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
> writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
> writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
> writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
> @@ -244,7 +248,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
> u32 reg;
> u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
>
> - if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
> + if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
> phy_pd_addr = ANALOGIX_DP_PD;
>
> switch (block) {
> @@ -448,7 +452,7 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
> analogix_dp_reset_aux(dp);
>
> /* Disable AUX transaction H/W retry */
> - if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
> + if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
> reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
> AUX_HW_RETRY_COUNT_SEL(3) |
> AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> index 88d56ad..cdcc6c5 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> @@ -165,6 +165,7 @@
> /* ANALOGIX_DP_PLL_REG_1 */
> #define REF_CLK_24M (0x1 << 0)
> #define REF_CLK_27M (0x0 << 0)
> +#define REF_CLK_MASK (0x1 << 0)
>
> /* ANALOGIX_DP_LANE_MAP */
> #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6)
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index 25afb31..790ab5d 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -18,6 +18,11 @@ enum analogix_dp_devtype {
> RK3288_DP,
> };
>
> +static inline bool is_rockchip(enum analogix_dp_devtype type)
> +{
> + return type == RK3288_DP;
> +}
> +
> struct analogix_dp_plat_data {
> enum analogix_dp_devtype dev_type;
> struct drm_panel *panel;
> --
> 1.9.1
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread* Re: [PATCH v4 03/11] drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit setting
@ 2016-06-29 13:46 ` Sean Paul
0 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:46 UTC (permalink / raw)
To: Yakir Yang
Cc: Krzysztof Kozlowski, linux-samsung-soc,
Linux Kernel Mailing List, linux-rockchip, Mark Yao, Jingoo Han,
Emil Velikov, Douglas Anderson, dri-devel, Tomasz Figa,
Javier Martinez Canillas, Daniel Vetter, Stéphane Marchesin,
Thierry Reding, Dan Carpenter
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> As vendor document indicate, when REF_CLK bit set 0, then DP
> phy's REF_CLK should switch to 24M source clock.
>
> But due to IC PHY layout mistaken, some chips need to flip this
> bit(like RK3288), and unfortunately they didn't indicate in the
> DP version register. That's why we have to make this little hack.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
> ---
> Changes in v4:
> - Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
> - Add reviewed flag from Tomasz.
>
> Changes in v3:
> - Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
> reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
> [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
> - Add tested flag from Javier
>
> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 12 ++++++++----
> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 1 +
> include/drm/bridge/analogix_dp.h | 5 +++++
> 3 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> index 49205ef..48030f0 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
> @@ -74,8 +74,12 @@ void analogix_dp_init_analog_param(struct analogix_dp_device *dp)
> reg = SEL_24M | TX_DVDD_BIT_1_0625V;
> writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
>
> - if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
> - writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
> + if (dp->plat_data && is_rockchip(dp->plat_data->dev_type)) {
> + reg = REF_CLK_24M;
> + if (dp->plat_data->dev_type == RK3288_DP)
> + reg ^= REF_CLK_MASK;
> +
> + writel(reg, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
> writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
> writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
> writel(0x58, dp->reg_base + ANALOGIX_DP_PLL_REG_4);
> @@ -244,7 +248,7 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
> u32 reg;
> u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
>
> - if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
> + if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
> phy_pd_addr = ANALOGIX_DP_PD;
>
> switch (block) {
> @@ -448,7 +452,7 @@ void analogix_dp_init_aux(struct analogix_dp_device *dp)
> analogix_dp_reset_aux(dp);
>
> /* Disable AUX transaction H/W retry */
> - if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
> + if (dp->plat_data && is_rockchip(dp->plat_data->dev_type))
> reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
> AUX_HW_RETRY_COUNT_SEL(3) |
> AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> index 88d56ad..cdcc6c5 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h
> @@ -165,6 +165,7 @@
> /* ANALOGIX_DP_PLL_REG_1 */
> #define REF_CLK_24M (0x1 << 0)
> #define REF_CLK_27M (0x0 << 0)
> +#define REF_CLK_MASK (0x1 << 0)
>
> /* ANALOGIX_DP_LANE_MAP */
> #define LANE3_MAP_LOGIC_LANE_0 (0x0 << 6)
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index 25afb31..790ab5d 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -18,6 +18,11 @@ enum analogix_dp_devtype {
> RK3288_DP,
> };
>
> +static inline bool is_rockchip(enum analogix_dp_devtype type)
> +{
> + return type == RK3288_DP;
> +}
> +
> struct analogix_dp_plat_data {
> enum analogix_dp_devtype dev_type;
> struct drm_panel *panel;
> --
> 1.9.1
>
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v4 04/11] drm/rockchip: analogix_dp: add rk3399 eDP support
@ 2016-06-29 9:15 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Improved the overly complicated .atomic_check function. (Sean)
- Add reviewed flag from Tomasz
Changes in v3:
- Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
- Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
- Add the acked flag from Mark.
.../bindings/display/bridge/analogix_dp.txt | 1 +
.../display/rockchip/analogix_dp-rockchip.txt | 3 ++-
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 23 ++++++++++++++++++++++
include/drm/bridge/analogix_dp.h | 3 ++-
4 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
index 4f2ba8c..4a0f4f7 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
+++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
@@ -5,6 +5,7 @@ Required properties for dp-controller:
platform specific such as:
* "samsung,exynos5-dp"
* "rockchip,rk3288-dp"
+ * "rockchip,rk3399-edp"
-reg:
physical base address of the controller and length
of memory mapped region.
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index e832ff9..726c945 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -2,7 +2,8 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
================================
Required properties:
-- compatible: "rockchip,rk3288-edp";
+- compatible: "rockchip,rk3288-edp",
+ "rockchip,rk3399-edp";
- reg: physical base address of the controller and length
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0a30931..8557a08 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -36,6 +36,8 @@
#define RK3288_GRF_SOC_CON6 0x25c
#define RK3288_EDP_LCDC_SEL BIT(5)
+#define RK3399_GRF_SOC_CON20 0x6250
+#define RK3399_EDP_LCDC_SEL BIT(5)
#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
@@ -159,6 +161,8 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
struct drm_connector_state *conn_state)
{
struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+ struct rockchip_dp_device *dp = to_dp(encoder);
+ int ret;
/*
* FIXME(Yakir): driver should configure the CRTC output video
@@ -173,8 +177,19 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
* But if I configure CTRC to RGBaaa, and eDP driver still keep
* RGB666 input video mode, then screen would works prefect.
*/
+
s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
s->output_type = DRM_MODE_CONNECTOR_eDP;
+ if (dp->data->chip_type == RK3399_EDP) {
+ /*
+ * For RK3399, VOP Lit must code the out mode to RGB888,
+ * VOP Big must code the out mode to RGB10.
+ */
+ ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node,
+ encoder);
+ if (ret > 0)
+ s->output_mode = ROCKCHIP_OUT_MODE_P888;
+ }
return 0;
}
@@ -378,6 +393,13 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
#endif
};
+static const struct rockchip_dp_chip_data rk3399_edp = {
+ .lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
+ .lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
+ .lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
+ .chip_type = RK3399_EDP,
+};
+
static const struct rockchip_dp_chip_data rk3288_dp = {
.lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
.lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
@@ -387,6 +409,7 @@ static const struct rockchip_dp_chip_data rk3288_dp = {
static const struct of_device_id rockchip_dp_dt_ids[] = {
{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
+ {.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
{}
};
MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 790ab5d..fc4aea3 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -16,11 +16,12 @@
enum analogix_dp_devtype {
EXYNOS_DP,
RK3288_DP,
+ RK3399_EDP,
};
static inline bool is_rockchip(enum analogix_dp_devtype type)
{
- return type == RK3288_DP;
+ return type == RK3288_DP || type == RK3399_EDP;
}
struct analogix_dp_plat_data {
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 04/11] drm/rockchip: analogix_dp: add rk3399 eDP support
@ 2016-06-29 9:15 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, David Airlie,
daniel.vetter-/w4YWyX8dFk, emil.l.velikov-Re5JQEeQqe8AvxtiuMwx3w,
dianders-F7+t8E8rja9g9hUCZPvPmw,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, Tomasz Figa,
Javier Martinez Canillas, Sean Paul, Yakir Yang,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
RK3399 and RK3288 shared the same eDP IP controller, only some light
difference with VOP configure and GRF configure.
Signed-off-by: Yakir Yang <ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Acked-by: Mark Yao <mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Reviewed-by: Tomasz Figa <tomasz.figa-F7+t8E8rja9Wk0Htik3J/w@public.gmane.org>
---
Changes in v4:
- Improved the overly complicated .atomic_check function. (Sean)
- Add reviewed flag from Tomasz
Changes in v3:
- Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
- Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
- Add the acked flag from Mark.
.../bindings/display/bridge/analogix_dp.txt | 1 +
.../display/rockchip/analogix_dp-rockchip.txt | 3 ++-
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 23 ++++++++++++++++++++++
include/drm/bridge/analogix_dp.h | 3 ++-
4 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
index 4f2ba8c..4a0f4f7 100644
--- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
+++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
@@ -5,6 +5,7 @@ Required properties for dp-controller:
platform specific such as:
* "samsung,exynos5-dp"
* "rockchip,rk3288-dp"
+ * "rockchip,rk3399-edp"
-reg:
physical base address of the controller and length
of memory mapped region.
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index e832ff9..726c945 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -2,7 +2,8 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
================================
Required properties:
-- compatible: "rockchip,rk3288-edp";
+- compatible: "rockchip,rk3288-edp",
+ "rockchip,rk3399-edp";
- reg: physical base address of the controller and length
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0a30931..8557a08 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -36,6 +36,8 @@
#define RK3288_GRF_SOC_CON6 0x25c
#define RK3288_EDP_LCDC_SEL BIT(5)
+#define RK3399_GRF_SOC_CON20 0x6250
+#define RK3399_EDP_LCDC_SEL BIT(5)
#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
@@ -159,6 +161,8 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
struct drm_connector_state *conn_state)
{
struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+ struct rockchip_dp_device *dp = to_dp(encoder);
+ int ret;
/*
* FIXME(Yakir): driver should configure the CRTC output video
@@ -173,8 +177,19 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
* But if I configure CTRC to RGBaaa, and eDP driver still keep
* RGB666 input video mode, then screen would works prefect.
*/
+
s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
s->output_type = DRM_MODE_CONNECTOR_eDP;
+ if (dp->data->chip_type == RK3399_EDP) {
+ /*
+ * For RK3399, VOP Lit must code the out mode to RGB888,
+ * VOP Big must code the out mode to RGB10.
+ */
+ ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node,
+ encoder);
+ if (ret > 0)
+ s->output_mode = ROCKCHIP_OUT_MODE_P888;
+ }
return 0;
}
@@ -378,6 +393,13 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
#endif
};
+static const struct rockchip_dp_chip_data rk3399_edp = {
+ .lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
+ .lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
+ .lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
+ .chip_type = RK3399_EDP,
+};
+
static const struct rockchip_dp_chip_data rk3288_dp = {
.lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
.lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
@@ -387,6 +409,7 @@ static const struct rockchip_dp_chip_data rk3288_dp = {
static const struct of_device_id rockchip_dp_dt_ids[] = {
{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
+ {.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
{}
};
MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index 790ab5d..fc4aea3 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -16,11 +16,12 @@
enum analogix_dp_devtype {
EXYNOS_DP,
RK3288_DP,
+ RK3399_EDP,
};
static inline bool is_rockchip(enum analogix_dp_devtype type)
{
- return type == RK3288_DP;
+ return type == RK3288_DP || type == RK3399_EDP;
}
struct analogix_dp_plat_data {
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v4 04/11] drm/rockchip: analogix_dp: add rk3399 eDP support
2016-06-29 9:15 ` Yakir Yang
@ 2016-06-29 13:52 ` Sean Paul
-1 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:52 UTC (permalink / raw)
To: Yakir Yang
Cc: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner,
Javier Martinez Canillas, Stéphane Marchesin, Tomasz Figa,
David Airlie, Daniel Vetter, Thierry Reding, Douglas Anderson,
Krzysztof Kozlowski, Emil Velikov, Dan Carpenter,
Linux Kernel Mailing List, dri-devel, linux-samsung-soc,
linux-rockchip
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> RK3399 and RK3288 shared the same eDP IP controller, only some light
> difference with VOP configure and GRF configure.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Acked-by: Mark Yao <mark.yao@rock-chips.com>
> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
> ---
> Changes in v4:
> - Improved the overly complicated .atomic_check function. (Sean)
> - Add reviewed flag from Tomasz
>
> Changes in v3:
> - Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
> - Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
> - Add the acked flag from Mark.
>
> .../bindings/display/bridge/analogix_dp.txt | 1 +
> .../display/rockchip/analogix_dp-rockchip.txt | 3 ++-
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 23 ++++++++++++++++++++++
> include/drm/bridge/analogix_dp.h | 3 ++-
> 4 files changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
> index 4f2ba8c..4a0f4f7 100644
> --- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
> @@ -5,6 +5,7 @@ Required properties for dp-controller:
> platform specific such as:
> * "samsung,exynos5-dp"
> * "rockchip,rk3288-dp"
> + * "rockchip,rk3399-edp"
> -reg:
> physical base address of the controller and length
> of memory mapped region.
> diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
> index e832ff9..726c945 100644
> --- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
> +++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
> @@ -2,7 +2,8 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
> ================================
>
> Required properties:
> -- compatible: "rockchip,rk3288-edp";
> +- compatible: "rockchip,rk3288-edp",
> + "rockchip,rk3399-edp";
>
> - reg: physical base address of the controller and length
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 0a30931..8557a08 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -36,6 +36,8 @@
>
> #define RK3288_GRF_SOC_CON6 0x25c
> #define RK3288_EDP_LCDC_SEL BIT(5)
> +#define RK3399_GRF_SOC_CON20 0x6250
> +#define RK3399_EDP_LCDC_SEL BIT(5)
>
> #define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
>
> @@ -159,6 +161,8 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
> struct drm_connector_state *conn_state)
> {
> struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
> + struct rockchip_dp_device *dp = to_dp(encoder);
> + int ret;
>
> /*
> * FIXME(Yakir): driver should configure the CRTC output video
> @@ -173,8 +177,19 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
> * But if I configure CTRC to RGBaaa, and eDP driver still keep
> * RGB666 input video mode, then screen would works prefect.
> */
> +
> s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
> s->output_type = DRM_MODE_CONNECTOR_eDP;
> + if (dp->data->chip_type == RK3399_EDP) {
> + /*
> + * For RK3399, VOP Lit must code the out mode to RGB888,
> + * VOP Big must code the out mode to RGB10.
> + */
> + ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node,
> + encoder);
> + if (ret > 0)
> + s->output_mode = ROCKCHIP_OUT_MODE_P888;
> + }
>
> return 0;
> }
> @@ -378,6 +393,13 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
> #endif
> };
>
> +static const struct rockchip_dp_chip_data rk3399_edp = {
> + .lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
> + .lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
> + .lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
> + .chip_type = RK3399_EDP,
> +};
> +
> static const struct rockchip_dp_chip_data rk3288_dp = {
> .lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
> .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
> @@ -387,6 +409,7 @@ static const struct rockchip_dp_chip_data rk3288_dp = {
>
> static const struct of_device_id rockchip_dp_dt_ids[] = {
> {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
> + {.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
> {}
> };
> MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index 790ab5d..fc4aea3 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -16,11 +16,12 @@
> enum analogix_dp_devtype {
> EXYNOS_DP,
> RK3288_DP,
> + RK3399_EDP,
> };
>
> static inline bool is_rockchip(enum analogix_dp_devtype type)
> {
> - return type == RK3288_DP;
> + return type == RK3288_DP || type == RK3399_EDP;
> }
>
> struct analogix_dp_plat_data {
> --
> 1.9.1
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread* Re: [PATCH v4 04/11] drm/rockchip: analogix_dp: add rk3399 eDP support
@ 2016-06-29 13:52 ` Sean Paul
0 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:52 UTC (permalink / raw)
To: Yakir Yang
Cc: Krzysztof Kozlowski, linux-samsung-soc,
Linux Kernel Mailing List, linux-rockchip, Mark Yao, Jingoo Han,
Emil Velikov, Douglas Anderson, dri-devel, Tomasz Figa,
Javier Martinez Canillas, Daniel Vetter, Stéphane Marchesin,
Thierry Reding, Dan Carpenter
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> RK3399 and RK3288 shared the same eDP IP controller, only some light
> difference with VOP configure and GRF configure.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Acked-by: Mark Yao <mark.yao@rock-chips.com>
> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
> ---
> Changes in v4:
> - Improved the overly complicated .atomic_check function. (Sean)
> - Add reviewed flag from Tomasz
>
> Changes in v3:
> - Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
> - Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
> - Add the acked flag from Mark.
>
> .../bindings/display/bridge/analogix_dp.txt | 1 +
> .../display/rockchip/analogix_dp-rockchip.txt | 3 ++-
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 23 ++++++++++++++++++++++
> include/drm/bridge/analogix_dp.h | 3 ++-
> 4 files changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
> index 4f2ba8c..4a0f4f7 100644
> --- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
> +++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
> @@ -5,6 +5,7 @@ Required properties for dp-controller:
> platform specific such as:
> * "samsung,exynos5-dp"
> * "rockchip,rk3288-dp"
> + * "rockchip,rk3399-edp"
> -reg:
> physical base address of the controller and length
> of memory mapped region.
> diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
> index e832ff9..726c945 100644
> --- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
> +++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
> @@ -2,7 +2,8 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
> ================================
>
> Required properties:
> -- compatible: "rockchip,rk3288-edp";
> +- compatible: "rockchip,rk3288-edp",
> + "rockchip,rk3399-edp";
>
> - reg: physical base address of the controller and length
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 0a30931..8557a08 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -36,6 +36,8 @@
>
> #define RK3288_GRF_SOC_CON6 0x25c
> #define RK3288_EDP_LCDC_SEL BIT(5)
> +#define RK3399_GRF_SOC_CON20 0x6250
> +#define RK3399_EDP_LCDC_SEL BIT(5)
>
> #define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
>
> @@ -159,6 +161,8 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
> struct drm_connector_state *conn_state)
> {
> struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
> + struct rockchip_dp_device *dp = to_dp(encoder);
> + int ret;
>
> /*
> * FIXME(Yakir): driver should configure the CRTC output video
> @@ -173,8 +177,19 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
> * But if I configure CTRC to RGBaaa, and eDP driver still keep
> * RGB666 input video mode, then screen would works prefect.
> */
> +
> s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
> s->output_type = DRM_MODE_CONNECTOR_eDP;
> + if (dp->data->chip_type == RK3399_EDP) {
> + /*
> + * For RK3399, VOP Lit must code the out mode to RGB888,
> + * VOP Big must code the out mode to RGB10.
> + */
> + ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node,
> + encoder);
> + if (ret > 0)
> + s->output_mode = ROCKCHIP_OUT_MODE_P888;
> + }
>
> return 0;
> }
> @@ -378,6 +393,13 @@ static const struct dev_pm_ops rockchip_dp_pm_ops = {
> #endif
> };
>
> +static const struct rockchip_dp_chip_data rk3399_edp = {
> + .lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
> + .lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
> + .lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
> + .chip_type = RK3399_EDP,
> +};
> +
> static const struct rockchip_dp_chip_data rk3288_dp = {
> .lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
> .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
> @@ -387,6 +409,7 @@ static const struct rockchip_dp_chip_data rk3288_dp = {
>
> static const struct of_device_id rockchip_dp_dt_ids[] = {
> {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
> + {.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
> {}
> };
> MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
> diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
> index 790ab5d..fc4aea3 100644
> --- a/include/drm/bridge/analogix_dp.h
> +++ b/include/drm/bridge/analogix_dp.h
> @@ -16,11 +16,12 @@
> enum analogix_dp_devtype {
> EXYNOS_DP,
> RK3288_DP,
> + RK3399_EDP,
> };
>
> static inline bool is_rockchip(enum analogix_dp_devtype type)
> {
> - return type == RK3288_DP;
> + return type == RK3288_DP || type == RK3399_EDP;
> }
>
> struct analogix_dp_plat_data {
> --
> 1.9.1
>
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v4 05/11] drm/rockchip: analogix_dp: make panel detect to an optional action
2016-06-29 9:14 ` Yakir Yang
` (4 preceding siblings ...)
(?)
@ 2016-06-29 9:15 ` Yakir Yang
2016-06-29 13:55 ` Sean Paul
-1 siblings, 1 reply; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
Some boards don't need to declare a panel device node, like the
display interface is DP monitors, so it's necessary to make the
panel detect to an optional action.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
- Add reviewed flag from Tomasz
Changes in v3:
- Add the acked flag from Mark.
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 47 +++++++++++--------------
1 file changed, 21 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 8557a08..0755573 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -329,38 +329,33 @@ static int rockchip_dp_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *panel_node, *port, *endpoint;
+ struct drm_panel *panel = NULL;
struct rockchip_dp_device *dp;
- struct drm_panel *panel;
port = of_graph_get_port_by_id(dev->of_node, 1);
- if (!port) {
- dev_err(dev, "can't find output port\n");
- return -EINVAL;
- }
-
- endpoint = of_get_child_by_name(port, "endpoint");
- of_node_put(port);
- if (!endpoint) {
- dev_err(dev, "no output endpoint found\n");
- return -EINVAL;
- }
-
- panel_node = of_graph_get_remote_port_parent(endpoint);
- of_node_put(endpoint);
- if (!panel_node) {
- dev_err(dev, "no output node found\n");
- return -EINVAL;
- }
-
- panel = of_drm_find_panel(panel_node);
- if (!panel) {
- DRM_ERROR("failed to find panel\n");
+ if (port) {
+ endpoint = of_get_child_by_name(port, "endpoint");
+ of_node_put(port);
+ if (!endpoint) {
+ dev_err(dev, "no output endpoint found\n");
+ return -EINVAL;
+ }
+
+ panel_node = of_graph_get_remote_port_parent(endpoint);
+ of_node_put(endpoint);
+ if (!panel_node) {
+ dev_err(dev, "no output node found\n");
+ return -EINVAL;
+ }
+
+ panel = of_drm_find_panel(panel_node);
of_node_put(panel_node);
- return -EPROBE_DEFER;
+ if (!panel) {
+ DRM_ERROR("failed to find panel\n");
+ return -EPROBE_DEFER;
+ }
}
- of_node_put(panel_node);
-
dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
if (!dp)
return -ENOMEM;
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v4 05/11] drm/rockchip: analogix_dp: make panel detect to an optional action
2016-06-29 9:15 ` [PATCH v4 05/11] drm/rockchip: analogix_dp: make panel detect to an optional action Yakir Yang
@ 2016-06-29 13:55 ` Sean Paul
0 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:55 UTC (permalink / raw)
To: Yakir Yang
Cc: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner,
Javier Martinez Canillas, Stéphane Marchesin, Tomasz Figa,
David Airlie, Daniel Vetter, Thierry Reding, Douglas Anderson,
Krzysztof Kozlowski, Emil Velikov, Dan Carpenter,
Linux Kernel Mailing List, dri-devel, linux-samsung-soc,
linux-rockchip
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> Some boards don't need to declare a panel device node, like the
> display interface is DP monitors, so it's necessary to make the
> panel detect to an optional action.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Acked-by: Mark Yao <mark.yao@rock-chips.com>
> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
> ---
> Changes in v4:
> - Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
> - Add reviewed flag from Tomasz
>
> Changes in v3:
> - Add the acked flag from Mark.
>
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 47 +++++++++++--------------
> 1 file changed, 21 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 8557a08..0755573 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -329,38 +329,33 @@ static int rockchip_dp_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> struct device_node *panel_node, *port, *endpoint;
> + struct drm_panel *panel = NULL;
> struct rockchip_dp_device *dp;
> - struct drm_panel *panel;
>
> port = of_graph_get_port_by_id(dev->of_node, 1);
> - if (!port) {
> - dev_err(dev, "can't find output port\n");
> - return -EINVAL;
> - }
> -
> - endpoint = of_get_child_by_name(port, "endpoint");
> - of_node_put(port);
> - if (!endpoint) {
> - dev_err(dev, "no output endpoint found\n");
> - return -EINVAL;
> - }
> -
> - panel_node = of_graph_get_remote_port_parent(endpoint);
> - of_node_put(endpoint);
> - if (!panel_node) {
> - dev_err(dev, "no output node found\n");
> - return -EINVAL;
> - }
> -
> - panel = of_drm_find_panel(panel_node);
> - if (!panel) {
> - DRM_ERROR("failed to find panel\n");
> + if (port) {
> + endpoint = of_get_child_by_name(port, "endpoint");
> + of_node_put(port);
> + if (!endpoint) {
> + dev_err(dev, "no output endpoint found\n");
> + return -EINVAL;
> + }
> +
> + panel_node = of_graph_get_remote_port_parent(endpoint);
> + of_node_put(endpoint);
> + if (!panel_node) {
> + dev_err(dev, "no output node found\n");
> + return -EINVAL;
> + }
> +
> + panel = of_drm_find_panel(panel_node);
> of_node_put(panel_node);
> - return -EPROBE_DEFER;
> + if (!panel) {
> + DRM_ERROR("failed to find panel\n");
> + return -EPROBE_DEFER;
> + }
> }
>
> - of_node_put(panel_node);
> -
> dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
> if (!dp)
> return -ENOMEM;
> --
> 1.9.1
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread* Re: [PATCH v4 05/11] drm/rockchip: analogix_dp: make panel detect to an optional action
@ 2016-06-29 13:55 ` Sean Paul
0 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:55 UTC (permalink / raw)
To: Yakir Yang
Cc: Krzysztof Kozlowski, linux-samsung-soc,
Linux Kernel Mailing List, linux-rockchip, Mark Yao, Jingoo Han,
Emil Velikov, Douglas Anderson, dri-devel, Tomasz Figa,
Javier Martinez Canillas, Daniel Vetter, Stéphane Marchesin,
Thierry Reding, Dan Carpenter
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> Some boards don't need to declare a panel device node, like the
> display interface is DP monitors, so it's necessary to make the
> panel detect to an optional action.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Acked-by: Mark Yao <mark.yao@rock-chips.com>
> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
> ---
> Changes in v4:
> - Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
> - Add reviewed flag from Tomasz
>
> Changes in v3:
> - Add the acked flag from Mark.
>
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 47 +++++++++++--------------
> 1 file changed, 21 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 8557a08..0755573 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -329,38 +329,33 @@ static int rockchip_dp_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> struct device_node *panel_node, *port, *endpoint;
> + struct drm_panel *panel = NULL;
> struct rockchip_dp_device *dp;
> - struct drm_panel *panel;
>
> port = of_graph_get_port_by_id(dev->of_node, 1);
> - if (!port) {
> - dev_err(dev, "can't find output port\n");
> - return -EINVAL;
> - }
> -
> - endpoint = of_get_child_by_name(port, "endpoint");
> - of_node_put(port);
> - if (!endpoint) {
> - dev_err(dev, "no output endpoint found\n");
> - return -EINVAL;
> - }
> -
> - panel_node = of_graph_get_remote_port_parent(endpoint);
> - of_node_put(endpoint);
> - if (!panel_node) {
> - dev_err(dev, "no output node found\n");
> - return -EINVAL;
> - }
> -
> - panel = of_drm_find_panel(panel_node);
> - if (!panel) {
> - DRM_ERROR("failed to find panel\n");
> + if (port) {
> + endpoint = of_get_child_by_name(port, "endpoint");
> + of_node_put(port);
> + if (!endpoint) {
> + dev_err(dev, "no output endpoint found\n");
> + return -EINVAL;
> + }
> +
> + panel_node = of_graph_get_remote_port_parent(endpoint);
> + of_node_put(endpoint);
> + if (!panel_node) {
> + dev_err(dev, "no output node found\n");
> + return -EINVAL;
> + }
> +
> + panel = of_drm_find_panel(panel_node);
> of_node_put(panel_node);
> - return -EPROBE_DEFER;
> + if (!panel) {
> + DRM_ERROR("failed to find panel\n");
> + return -EPROBE_DEFER;
> + }
> }
>
> - of_node_put(panel_node);
> -
> dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
> if (!dp)
> return -ENOMEM;
> --
> 1.9.1
>
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v4 06/11] drm/bridge: analogix_dp: passing the connector as an argument in .get_modes()
2016-06-29 9:14 ` Yakir Yang
@ 2016-06-29 9:15 ` Yakir Yang
-1 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
It's better to pass the connector to platform driver in .get_modes()
callback, just like what the .get_modes() helper function designed.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Add reviewed flag from Sean.
- Add reviewed flag from Tomasz.
Changes in v3:
- Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346318/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@113]
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 +-
drivers/gpu/drm/exynos/exynos_dp.c | 4 ++--
include/drm/bridge/analogix_dp.h | 3 ++-
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 7699597..a5e5ae4 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -938,7 +938,7 @@ int analogix_dp_get_modes(struct drm_connector *connector)
num_modes += drm_panel_get_modes(dp->plat_data->panel);
if (dp->plat_data->get_modes)
- num_modes += dp->plat_data->get_modes(dp->plat_data);
+ num_modes += dp->plat_data->get_modes(dp->plat_data, connector);
return num_modes;
}
diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
index 468498e..8a555ed 100644
--- a/drivers/gpu/drm/exynos/exynos_dp.c
+++ b/drivers/gpu/drm/exynos/exynos_dp.c
@@ -67,10 +67,10 @@ static int exynos_dp_poweroff(struct analogix_dp_plat_data *plat_data)
return exynos_dp_crtc_clock_enable(plat_data, false);
}
-static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data)
+static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data,
+ struct drm_connector *connector)
{
struct exynos_dp_device *dp = to_dp(plat_data);
- struct drm_connector *connector = &dp->connector;
struct drm_display_mode *mode;
int num_modes = 0;
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index fc4aea3..261b86d 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -34,7 +34,8 @@ struct analogix_dp_plat_data {
int (*power_off)(struct analogix_dp_plat_data *);
int (*attach)(struct analogix_dp_plat_data *, struct drm_bridge *,
struct drm_connector *);
- int (*get_modes)(struct analogix_dp_plat_data *);
+ int (*get_modes)(struct analogix_dp_plat_data *,
+ struct drm_connector *);
};
int analogix_dp_resume(struct device *dev);
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 06/11] drm/bridge: analogix_dp: passing the connector as an argument in .get_modes()
@ 2016-06-29 9:15 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc, linux-kernel,
linux-rockchip, daniel.vetter, emil.l.velikov, dianders,
dri-devel, Tomasz Figa, Javier Martinez Canillas,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
It's better to pass the connector to platform driver in .get_modes()
callback, just like what the .get_modes() helper function designed.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Add reviewed flag from Sean.
- Add reviewed flag from Tomasz.
Changes in v3:
- Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346318/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@113]
drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 +-
drivers/gpu/drm/exynos/exynos_dp.c | 4 ++--
include/drm/bridge/analogix_dp.h | 3 ++-
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index 7699597..a5e5ae4 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
@@ -938,7 +938,7 @@ int analogix_dp_get_modes(struct drm_connector *connector)
num_modes += drm_panel_get_modes(dp->plat_data->panel);
if (dp->plat_data->get_modes)
- num_modes += dp->plat_data->get_modes(dp->plat_data);
+ num_modes += dp->plat_data->get_modes(dp->plat_data, connector);
return num_modes;
}
diff --git a/drivers/gpu/drm/exynos/exynos_dp.c b/drivers/gpu/drm/exynos/exynos_dp.c
index 468498e..8a555ed 100644
--- a/drivers/gpu/drm/exynos/exynos_dp.c
+++ b/drivers/gpu/drm/exynos/exynos_dp.c
@@ -67,10 +67,10 @@ static int exynos_dp_poweroff(struct analogix_dp_plat_data *plat_data)
return exynos_dp_crtc_clock_enable(plat_data, false);
}
-static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data)
+static int exynos_dp_get_modes(struct analogix_dp_plat_data *plat_data,
+ struct drm_connector *connector)
{
struct exynos_dp_device *dp = to_dp(plat_data);
- struct drm_connector *connector = &dp->connector;
struct drm_display_mode *mode;
int num_modes = 0;
diff --git a/include/drm/bridge/analogix_dp.h b/include/drm/bridge/analogix_dp.h
index fc4aea3..261b86d 100644
--- a/include/drm/bridge/analogix_dp.h
+++ b/include/drm/bridge/analogix_dp.h
@@ -34,7 +34,8 @@ struct analogix_dp_plat_data {
int (*power_off)(struct analogix_dp_plat_data *);
int (*attach)(struct analogix_dp_plat_data *, struct drm_bridge *,
struct drm_connector *);
- int (*get_modes)(struct analogix_dp_plat_data *);
+ int (*get_modes)(struct analogix_dp_plat_data *,
+ struct drm_connector *);
};
int analogix_dp_resume(struct device *dev);
--
1.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v4 07/11] drm/rockchip: analogix_dp: correct the connector display color format and bpc
2016-06-29 9:14 ` Yakir Yang
@ 2016-06-29 9:15 ` Yakir Yang
-1 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
Rockchip VOP couldn't output YUV video format for eDP controller, so
when driver detect connector support YUV video format, we need to hack
it down to RGB888.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Using mask variable to collect the YUV video format. (Sean)
- Add reviewed flag from Tomasz.
Changes in v3:
- Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346317/15]
- Add the acked flag from Mark.
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0755573..0a0fb3a 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -110,6 +110,23 @@ static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
return 0;
}
+static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data,
+ struct drm_connector *connector)
+{
+ struct drm_display_info *di = &connector->display_info;
+ /* VOP couldn't output YUV video format for eDP rightly */
+ u32 mask = DRM_COLOR_FORMAT_YCRCB444 | DRM_COLOR_FORMAT_YCRCB422;
+
+ if ((di->color_formats & mask)) {
+ DRM_DEBUG_KMS("Swapping display color format from YUV to RGB\n");
+ di->color_formats &= ~mask;
+ di->color_formats |= DRM_COLOR_FORMAT_RGB444;
+ di->bpc = 8;
+ }
+
+ return 0;
+}
+
static bool
rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
@@ -310,6 +327,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
dp->plat_data.dev_type = dp->data->chip_type;
dp->plat_data.power_on = rockchip_dp_poweron;
dp->plat_data.power_off = rockchip_dp_powerdown;
+ dp->plat_data.get_modes = rockchip_dp_get_modes;
return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
}
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 07/11] drm/rockchip: analogix_dp: correct the connector display color format and bpc
@ 2016-06-29 9:15 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc, linux-kernel,
linux-rockchip, daniel.vetter, emil.l.velikov, dianders,
dri-devel, Tomasz Figa, Javier Martinez Canillas,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
Rockchip VOP couldn't output YUV video format for eDP controller, so
when driver detect connector support YUV video format, we need to hack
it down to RGB888.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Using mask variable to collect the YUV video format. (Sean)
- Add reviewed flag from Tomasz.
Changes in v3:
- Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/346317/15]
- Add the acked flag from Mark.
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0755573..0a0fb3a 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -110,6 +110,23 @@ static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
return 0;
}
+static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data,
+ struct drm_connector *connector)
+{
+ struct drm_display_info *di = &connector->display_info;
+ /* VOP couldn't output YUV video format for eDP rightly */
+ u32 mask = DRM_COLOR_FORMAT_YCRCB444 | DRM_COLOR_FORMAT_YCRCB422;
+
+ if ((di->color_formats & mask)) {
+ DRM_DEBUG_KMS("Swapping display color format from YUV to RGB\n");
+ di->color_formats &= ~mask;
+ di->color_formats |= DRM_COLOR_FORMAT_RGB444;
+ di->bpc = 8;
+ }
+
+ return 0;
+}
+
static bool
rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
const struct drm_display_mode *mode,
@@ -310,6 +327,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
dp->plat_data.dev_type = dp->data->chip_type;
dp->plat_data.power_on = rockchip_dp_poweron;
dp->plat_data.power_off = rockchip_dp_powerdown;
+ dp->plat_data.get_modes = rockchip_dp_get_modes;
return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
}
--
1.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v4 07/11] drm/rockchip: analogix_dp: correct the connector display color format and bpc
@ 2016-06-29 13:57 ` Sean Paul
0 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:57 UTC (permalink / raw)
To: Yakir Yang
Cc: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner,
Javier Martinez Canillas, Stéphane Marchesin, Tomasz Figa,
David Airlie, Daniel Vetter, Thierry Reding, Douglas Anderson,
Krzysztof Kozlowski, Emil Velikov, Dan Carpenter,
Linux Kernel Mailing List, dri-devel, linux-samsung-soc,
linux-rockchip
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> Rockchip VOP couldn't output YUV video format for eDP controller, so
> when driver detect connector support YUV video format, we need to hack
> it down to RGB888.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Acked-by: Mark Yao <mark.yao@rock-chips.com>
> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
> ---
> Changes in v4:
> - Using mask variable to collect the YUV video format. (Sean)
> - Add reviewed flag from Tomasz.
>
> Changes in v3:
> - Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346317/15]
> - Add the acked flag from Mark.
>
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 0755573..0a0fb3a 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -110,6 +110,23 @@ static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
> return 0;
> }
>
> +static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data,
> + struct drm_connector *connector)
> +{
> + struct drm_display_info *di = &connector->display_info;
> + /* VOP couldn't output YUV video format for eDP rightly */
> + u32 mask = DRM_COLOR_FORMAT_YCRCB444 | DRM_COLOR_FORMAT_YCRCB422;
> +
> + if ((di->color_formats & mask)) {
> + DRM_DEBUG_KMS("Swapping display color format from YUV to RGB\n");
> + di->color_formats &= ~mask;
> + di->color_formats |= DRM_COLOR_FORMAT_RGB444;
> + di->bpc = 8;
> + }
> +
> + return 0;
> +}
> +
> static bool
> rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
> const struct drm_display_mode *mode,
> @@ -310,6 +327,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
> dp->plat_data.dev_type = dp->data->chip_type;
> dp->plat_data.power_on = rockchip_dp_poweron;
> dp->plat_data.power_off = rockchip_dp_powerdown;
> + dp->plat_data.get_modes = rockchip_dp_get_modes;
>
> return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
> }
> --
> 1.9.1
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread* Re: [PATCH v4 07/11] drm/rockchip: analogix_dp: correct the connector display color format and bpc
@ 2016-06-29 13:57 ` Sean Paul
0 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:57 UTC (permalink / raw)
To: Yakir Yang
Cc: Krzysztof Kozlowski, linux-samsung-soc,
Linux Kernel Mailing List, Heiko Stuebner,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Mark Yao,
Jingoo Han, David Airlie, Emil Velikov, Douglas Anderson,
dri-devel, Tomasz Figa, Inki Dae, Javier Martinez Canillas,
Daniel Vetter, Stéphane Marchesin, Thierry Reding,
Dan Carpenter
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org> wrote:
> Rockchip VOP couldn't output YUV video format for eDP controller, so
> when driver detect connector support YUV video format, we need to hack
> it down to RGB888.
>
> Signed-off-by: Yakir Yang <ykk-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Acked-by: Mark Yao <mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Reviewed-by: Tomasz Figa <tomasz.figa-F7+t8E8rja9Wk0Htik3J/w@public.gmane.org>
Reviewed-by: Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> ---
> Changes in v4:
> - Using mask variable to collect the YUV video format. (Sean)
> - Add reviewed flag from Tomasz.
>
> Changes in v3:
> - Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346317/15]
> - Add the acked flag from Mark.
>
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 0755573..0a0fb3a 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -110,6 +110,23 @@ static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
> return 0;
> }
>
> +static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data,
> + struct drm_connector *connector)
> +{
> + struct drm_display_info *di = &connector->display_info;
> + /* VOP couldn't output YUV video format for eDP rightly */
> + u32 mask = DRM_COLOR_FORMAT_YCRCB444 | DRM_COLOR_FORMAT_YCRCB422;
> +
> + if ((di->color_formats & mask)) {
> + DRM_DEBUG_KMS("Swapping display color format from YUV to RGB\n");
> + di->color_formats &= ~mask;
> + di->color_formats |= DRM_COLOR_FORMAT_RGB444;
> + di->bpc = 8;
> + }
> +
> + return 0;
> +}
> +
> static bool
> rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
> const struct drm_display_mode *mode,
> @@ -310,6 +327,7 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
> dp->plat_data.dev_type = dp->data->chip_type;
> dp->plat_data.power_on = rockchip_dp_poweron;
> dp->plat_data.power_off = rockchip_dp_powerdown;
> + dp->plat_data.get_modes = rockchip_dp_get_modes;
>
> return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
> }
> --
> 1.9.1
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode
2016-06-29 9:14 ` Yakir Yang
@ 2016-06-29 9:15 ` Yakir Yang
-1 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
The hardware IC designed that VOP must output the RGB10 video format to
eDP contoller, and if eDP panel only support RGB8, then eDP contoller
should cut down the video data, not via VOP contoller, that's why we need
to hardcode the VOP output mode to RGA10 here.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Correct the misspell of 'contoller'. (Sean)
Changes in v3:
- Add the reviewed flag from Tomasz.
[https://chromium-review.googlesource.com/#/c/346853/12]
- Add the acked flag from Mark.
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 16 +++++-----------
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0a0fb3a..850edc4 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -182,17 +182,11 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
int ret;
/*
- * FIXME(Yakir): driver should configure the CRTC output video
- * mode with the display information which indicated the monitor
- * support colorimetry.
- *
- * But don't know why the CRTC driver seems could only output the
- * RGBaaa rightly. For example, if connect the "innolux,n116bge"
- * eDP screen, EDID would indicated that screen only accepted the
- * 6bpc mode. But if I configure CRTC to RGB666 output, then eDP
- * screen would show a blue picture (RGB888 show a green picture).
- * But if I configure CTRC to RGBaaa, and eDP driver still keep
- * RGB666 input video mode, then screen would works prefect.
+ * The hardware IC designed that VOP must output the RGB10 video
+ * format to eDP controller, and if eDP panel only support RGB8,
+ * then eDP controller should cut down the video data, not via VOP
+ * controller, that's why we need to hardcode the VOP output mode
+ * to RGA10 here.
*/
s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode
@ 2016-06-29 9:15 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc, linux-kernel,
linux-rockchip, daniel.vetter, emil.l.velikov, dianders,
dri-devel, Tomasz Figa, Javier Martinez Canillas,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
The hardware IC designed that VOP must output the RGB10 video format to
eDP contoller, and if eDP panel only support RGB8, then eDP contoller
should cut down the video data, not via VOP contoller, that's why we need
to hardcode the VOP output mode to RGA10 here.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Correct the misspell of 'contoller'. (Sean)
Changes in v3:
- Add the reviewed flag from Tomasz.
[https://chromium-review.googlesource.com/#/c/346853/12]
- Add the acked flag from Mark.
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 16 +++++-----------
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 0a0fb3a..850edc4 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -182,17 +182,11 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
int ret;
/*
- * FIXME(Yakir): driver should configure the CRTC output video
- * mode with the display information which indicated the monitor
- * support colorimetry.
- *
- * But don't know why the CRTC driver seems could only output the
- * RGBaaa rightly. For example, if connect the "innolux,n116bge"
- * eDP screen, EDID would indicated that screen only accepted the
- * 6bpc mode. But if I configure CRTC to RGB666 output, then eDP
- * screen would show a blue picture (RGB888 show a green picture).
- * But if I configure CTRC to RGBaaa, and eDP driver still keep
- * RGB666 input video mode, then screen would works prefect.
+ * The hardware IC designed that VOP must output the RGB10 video
+ * format to eDP controller, and if eDP panel only support RGB8,
+ * then eDP controller should cut down the video data, not via VOP
+ * controller, that's why we need to hardcode the VOP output mode
+ * to RGA10 here.
*/
s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
--
1.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 35+ messages in thread* Re: [PATCH v4 08/11] drm/rockchip: analogix_dp: update the comments about why need to hardcode VOP output mode
2016-06-29 9:15 ` Yakir Yang
(?)
@ 2016-06-29 13:58 ` Sean Paul
-1 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 13:58 UTC (permalink / raw)
To: Yakir Yang
Cc: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner,
Javier Martinez Canillas, Stéphane Marchesin, Tomasz Figa,
David Airlie, Daniel Vetter, Thierry Reding, Douglas Anderson,
Krzysztof Kozlowski, Emil Velikov, Dan Carpenter,
Linux Kernel Mailing List, dri-devel, linux-samsung-soc,
linux-rockchip
On Wed, Jun 29, 2016 at 5:15 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> The hardware IC designed that VOP must output the RGB10 video format to
> eDP contoller, and if eDP panel only support RGB8, then eDP contoller
> should cut down the video data, not via VOP contoller, that's why we need
> to hardcode the VOP output mode to RGA10 here.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Acked-by: Mark Yao <mark.yao@rock-chips.com>
> Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
> ---
> Changes in v4:
> - Correct the misspell of 'contoller'. (Sean)
>
> Changes in v3:
> - Add the reviewed flag from Tomasz.
> [https://chromium-review.googlesource.com/#/c/346853/12]
> - Add the acked flag from Mark.
>
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 16 +++++-----------
> 1 file changed, 5 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> index 0a0fb3a..850edc4 100644
> --- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
> @@ -182,17 +182,11 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
> int ret;
>
> /*
> - * FIXME(Yakir): driver should configure the CRTC output video
> - * mode with the display information which indicated the monitor
> - * support colorimetry.
> - *
> - * But don't know why the CRTC driver seems could only output the
> - * RGBaaa rightly. For example, if connect the "innolux,n116bge"
> - * eDP screen, EDID would indicated that screen only accepted the
> - * 6bpc mode. But if I configure CRTC to RGB666 output, then eDP
> - * screen would show a blue picture (RGB888 show a green picture).
> - * But if I configure CTRC to RGBaaa, and eDP driver still keep
> - * RGB666 input video mode, then screen would works prefect.
> + * The hardware IC designed that VOP must output the RGB10 video
> + * format to eDP controller, and if eDP panel only support RGB8,
> + * then eDP controller should cut down the video data, not via VOP
> + * controller, that's why we need to hardcode the VOP output mode
> + * to RGA10 here.
> */
>
> s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
> --
> 1.9.1
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread
* [PATCH v4 09/11] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
2016-06-29 9:14 ` Yakir Yang
` (8 preceding siblings ...)
(?)
@ 2016-06-29 9:15 ` Yakir Yang
-1 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:15 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
The enum value of DP_IRQ_TYPE_HP_CABLE_IN is zero, but driver only
send drm hp event when the irq_type and the enum value is true.
if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN || ...)
drm_helper_hpd_irq_event(dp->drm_dev);
So there would no drm hpd event when cable plug in, to fix that
just need to assign all hotplug enum with no-zero values.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
Changes in v4:
- Add reviewed flag from Sean.
- Add reviewed flag from Tomasz.
Changes in v3:
- Add reviewed flag from Stéphane.
[https://chromium-review.googlesource.com/#/c/346319/15]
- Add tested flag from Javier
drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index f09275d..b456380 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -127,10 +127,10 @@ enum analog_power_block {
};
enum dp_irq_type {
- DP_IRQ_TYPE_HP_CABLE_IN,
- DP_IRQ_TYPE_HP_CABLE_OUT,
- DP_IRQ_TYPE_HP_CHANGE,
- DP_IRQ_TYPE_UNKNOWN,
+ DP_IRQ_TYPE_HP_CABLE_IN = BIT(0),
+ DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1),
+ DP_IRQ_TYPE_HP_CHANGE = BIT(2),
+ DP_IRQ_TYPE_UNKNOWN = BIT(3),
};
struct video_info {
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 10/11] drm/rockchip: analogix_dp: introduce the pclk for grf
2016-06-29 9:14 ` Yakir Yang
@ 2016-06-29 9:16 ` Yakir Yang
-1 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:16 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.
- Fix compiled error, sorry.
"dp->cgfclk" --> 'dp->grfclk'
- Check the the error code properly, 'EPROBE_DEFER' should be returned,
'ENOENT' should assign a NULL point to grfclk, other errors should be
regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
- Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/351821/]
Changes in v3:
- Add this patch in v3
.../display/rockchip/analogix_dp-rockchip.txt | 6 ++++++
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 23 +++++++++++++++++++---
2 files changed, 26 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 726c945..0b39256 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -28,6 +28,12 @@ Required properties:
Port 0: contained 2 endpoints, connecting to the output of vop.
Port 1: contained 1 endpoint, connecting to the input of panel.
+Optional property for different chips:
+- clocks: from common clock binding: handle to grf_vio clock.
+
+- clock-names: from common clock binding:
+ Required elements: "grf"
+
For the below properties, please refer to Analogix DP binding document:
* Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
- phys (required)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 850edc4..e81e19a 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -64,6 +64,7 @@ struct rockchip_dp_device {
struct drm_display_mode mode;
struct clk *pclk;
+ struct clk *grfclk;
struct regmap *grf;
struct reset_control *rst;
@@ -160,11 +161,17 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
- ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
- if (ret != 0) {
- dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+ ret = clk_prepare_enable(dp->grfclk);
+ if (ret < 0) {
+ dev_err(dp->dev, "failed to enable grfclk %d\n", ret);
return;
}
+
+ ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
+ if (ret != 0)
+ dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+
+ clk_disable_unprepare(dp->grfclk);
}
static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
@@ -234,6 +241,16 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp)
return PTR_ERR(dp->grf);
}
+ dp->grfclk = devm_clk_get(dev, "grf");
+ if (PTR_ERR(dp->grfclk) == -ENOENT) {
+ dp->grfclk = NULL;
+ } else if (PTR_ERR(dp->grfclk) == -EPROBE_DEFER) {
+ return -EPROBE_DEFER;
+ } else if (IS_ERR(dp->grfclk)) {
+ dev_err(dev, "failed to get grf clock\n");
+ return PTR_ERR(dp->grfclk);
+ }
+
dp->pclk = devm_clk_get(dev, "pclk");
if (IS_ERR(dp->pclk)) {
dev_err(dev, "failed to get pclk property\n");
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 10/11] drm/rockchip: analogix_dp: introduce the pclk for grf
@ 2016-06-29 9:16 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:16 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc, linux-kernel,
linux-rockchip, daniel.vetter, emil.l.velikov, dianders,
dri-devel, Tomasz Figa, Javier Martinez Canillas,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.
- Fix compiled error, sorry.
"dp->cgfclk" --> 'dp->grfclk'
- Check the the error code properly, 'EPROBE_DEFER' should be returned,
'ENOENT' should assign a NULL point to grfclk, other errors should be
regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
- Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
[https://chromium-review.googlesource.com/#/c/351821/]
Changes in v3:
- Add this patch in v3
.../display/rockchip/analogix_dp-rockchip.txt | 6 ++++++
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 23 +++++++++++++++++++---
2 files changed, 26 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 726c945..0b39256 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -28,6 +28,12 @@ Required properties:
Port 0: contained 2 endpoints, connecting to the output of vop.
Port 1: contained 1 endpoint, connecting to the input of panel.
+Optional property for different chips:
+- clocks: from common clock binding: handle to grf_vio clock.
+
+- clock-names: from common clock binding:
+ Required elements: "grf"
+
For the below properties, please refer to Analogix DP binding document:
* Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
- phys (required)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 850edc4..e81e19a 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -64,6 +64,7 @@ struct rockchip_dp_device {
struct drm_display_mode mode;
struct clk *pclk;
+ struct clk *grfclk;
struct regmap *grf;
struct reset_control *rst;
@@ -160,11 +161,17 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
- ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
- if (ret != 0) {
- dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+ ret = clk_prepare_enable(dp->grfclk);
+ if (ret < 0) {
+ dev_err(dp->dev, "failed to enable grfclk %d\n", ret);
return;
}
+
+ ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
+ if (ret != 0)
+ dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+
+ clk_disable_unprepare(dp->grfclk);
}
static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
@@ -234,6 +241,16 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp)
return PTR_ERR(dp->grf);
}
+ dp->grfclk = devm_clk_get(dev, "grf");
+ if (PTR_ERR(dp->grfclk) == -ENOENT) {
+ dp->grfclk = NULL;
+ } else if (PTR_ERR(dp->grfclk) == -EPROBE_DEFER) {
+ return -EPROBE_DEFER;
+ } else if (IS_ERR(dp->grfclk)) {
+ dev_err(dev, "failed to get grf clock\n");
+ return PTR_ERR(dp->grfclk);
+ }
+
dp->pclk = devm_clk_get(dev, "pclk");
if (IS_ERR(dp->pclk)) {
dev_err(dev, "failed to get pclk property\n");
--
1.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 35+ messages in thread
* [PATCH v4 11/11] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
2016-06-29 9:14 ` Yakir Yang
@ 2016-06-29 9:16 ` Yakir Yang
-1 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:16 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Javier Martinez Canillas, Stéphane Marchesin, Sean Paul,
Tomasz Figa, David Airlie, daniel.vetter, Thierry Reding,
dianders, Krzysztof Kozlowski, emil.l.velikov, Dan Carpenter,
Yakir Yang, linux-kernel, dri-devel, linux-samsung-soc,
linux-rockchip
The document about rockchip platform make a mistaken in available
compatible name of "rk3288-edp", we should correct it to "rk3288-dp"
which correspond to the compatible name in driver.
This mistaken was introduced in commit be91c36247089 ("dt-bindings:
add document for rockchip variant of analogix_dp").
Reported-by: Tomasz Figa <tfiga@chromium.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.
Changes in v3:
- Add this patch in v3
.../devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 0b39256..01cced1 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -2,7 +2,7 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
================================
Required properties:
-- compatible: "rockchip,rk3288-edp",
+- compatible: "rockchip,rk3288-dp",
"rockchip,rk3399-edp";
- reg: physical base address of the controller and length
--
1.9.1
^ permalink raw reply related [flat|nested] 35+ messages in thread* [PATCH v4 11/11] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
@ 2016-06-29 9:16 ` Yakir Yang
0 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-29 9:16 UTC (permalink / raw)
To: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner
Cc: Krzysztof Kozlowski, linux-samsung-soc, linux-kernel,
linux-rockchip, daniel.vetter, emil.l.velikov, dianders,
dri-devel, Tomasz Figa, Javier Martinez Canillas,
Stéphane Marchesin, Thierry Reding, Dan Carpenter
The document about rockchip platform make a mistaken in available
compatible name of "rk3288-edp", we should correct it to "rk3288-dp"
which correspond to the compatible name in driver.
This mistaken was introduced in commit be91c36247089 ("dt-bindings:
add document for rockchip variant of analogix_dp").
Reported-by: Tomasz Figa <tfiga@chromium.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
---
Changes in v4:
- Add reviewed flag from Doug.
- Add reviewed flag from Tomasz.
Changes in v3:
- Add this patch in v3
.../devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 0b39256..01cced1 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -2,7 +2,7 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
================================
Required properties:
-- compatible: "rockchip,rk3288-edp",
+- compatible: "rockchip,rk3288-dp",
"rockchip,rk3399-edp";
- reg: physical base address of the controller and length
--
1.9.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 35+ messages in thread
* Re: [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver
2016-06-29 9:14 ` Yakir Yang
@ 2016-06-29 14:01 ` Sean Paul
-1 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 14:01 UTC (permalink / raw)
To: Yakir Yang
Cc: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner,
Javier Martinez Canillas, Stéphane Marchesin, Tomasz Figa,
David Airlie, Daniel Vetter, Thierry Reding, Douglas Anderson,
Krzysztof Kozlowski, Emil Velikov, Dan Carpenter,
Linux Kernel Mailing List, dri-devel, linux-samsung-soc,
linux-rockchip
On Wed, Jun 29, 2016 at 5:14 AM, Yakir Yang <ykk@rock-chips.com> wrote:
>
> RK3399 and RK3288 shared the same eDP IP controller, only some light
> difference with VOP configure and GRF configure.
>
The whole set looks good to me. All patches should have my R-b now,
thanks for the update.
Sean
> Also same misc fix to analogix_dp driver:
> - Hotplug invalid which report by Dan Carpenter
> - Make panel detect to an optional action
> - correct the register bit define error in ANALOGIX_DP_PLL_REG_1
>
> Changes in v4:
> - Assigned the GRF setting magic numbers to a #define that corresponds to
> a TRM name. (Sean & Heiko)
> - Pass the chip type to device type directly. (Sean)
> - Add reviewed flag from Tomasz.
> - Add reviewed flag from Sean
> - Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
> - Add reviewed flag from Tomasz.
> - Improved the overly complicated .atomic_check function. (Sean)
> - Add reviewed flag from Tomasz
> - Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
> - Add reviewed flag from Tomasz
> - Add reviewed flag from Sean.
> - Add reviewed flag from Tomasz.
> - Using mask variable to collect the YUV video format. (Sean)
> - Add reviewed flag from Tomasz.
> - Correct the misspell of 'contoller'. (Sean)
> - Add reviewed flag from Sean.
> - Add reviewed flag from Tomasz.
> - Add reviewed flag from Doug.
> - Add reviewed flag from Tomasz.
> - Fix compiled error, sorry.
> "dp->cgfclk" --> 'dp->grfclk'
> - Check the the error code properly, 'EPROBE_DEFER' should be returned,
> 'ENOENT' should assign a NULL point to grfclk, other errors should be
> regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
> - Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/351821/]
> - Add reviewed flag from Doug.
> - Add reviewed flag from Tomasz.
>
> Changes in v3:
> - Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
> - Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
> - Add acked flag from Mark.
> - Add reviewed flag from Tomasz.
> [https://chromium-review.googlesource.com/#/c/346315/15]
> - Add tested flag from Javier
> - Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
> reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
> [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
> - Add tested flag from Javier
> - Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
> - Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
> - Add the acked flag from Mark.
> - Add the acked flag from Mark.
> - Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346318/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@113]
> - Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346317/15]
> - Add the acked flag from Mark.
> - Add the reviewed flag from Tomasz.
> [https://chromium-review.googlesource.com/#/c/346853/12]
> - Add the acked flag from Mark.
> - Add reviewed flag from Stéphane.
> [https://chromium-review.googlesource.com/#/c/346319/15]
> - Add tested flag from Javier
> - Add this patch in v3
> - Add this patch in v3
>
> Yakir Yang (11):
> drm/rockchip: analogix_dp: split the lcdc select setting into device
> data
> drm/bridge: analogix_dp: correct the register bit define error in
> ANALOGIX_DP_PLL_REG_1
> drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit
> setting
> drm/rockchip: analogix_dp: add rk3399 eDP support
> drm/rockchip: analogix_dp: make panel detect to an optional action
> drm/bridge: analogix_dp: passing the connector as an argument in
> .get_modes()
> drm/rockchip: analogix_dp: correct the connector display color format
> and bpc
> drm/rockchip: analogix_dp: update the comments about why need to
> hardcode VOP output mode
> drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
> drm/rockchip: analogix_dp: introduce the pclk for grf
> dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
>
> .../bindings/display/bridge/analogix_dp.txt | 1 +
> .../display/rockchip/analogix_dp-rockchip.txt | 9 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 8 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 12 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 5 +-
> drivers/gpu/drm/exynos/exynos_dp.c | 4 +-
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 174 +++++++++++++++------
> include/drm/bridge/analogix_dp.h | 9 +-
> 9 files changed, 160 insertions(+), 64 deletions(-)
>
> --
> 1.9.1
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver
@ 2016-06-29 14:01 ` Sean Paul
0 siblings, 0 replies; 35+ messages in thread
From: Sean Paul @ 2016-06-29 14:01 UTC (permalink / raw)
To: Yakir Yang
Cc: Krzysztof Kozlowski, linux-samsung-soc,
Linux Kernel Mailing List, linux-rockchip, Mark Yao, Jingoo Han,
Emil Velikov, Douglas Anderson, dri-devel, Tomasz Figa,
Javier Martinez Canillas, Daniel Vetter, Stéphane Marchesin,
Thierry Reding, Dan Carpenter
On Wed, Jun 29, 2016 at 5:14 AM, Yakir Yang <ykk@rock-chips.com> wrote:
>
> RK3399 and RK3288 shared the same eDP IP controller, only some light
> difference with VOP configure and GRF configure.
>
The whole set looks good to me. All patches should have my R-b now,
thanks for the update.
Sean
> Also same misc fix to analogix_dp driver:
> - Hotplug invalid which report by Dan Carpenter
> - Make panel detect to an optional action
> - correct the register bit define error in ANALOGIX_DP_PLL_REG_1
>
> Changes in v4:
> - Assigned the GRF setting magic numbers to a #define that corresponds to
> a TRM name. (Sean & Heiko)
> - Pass the chip type to device type directly. (Sean)
> - Add reviewed flag from Tomasz.
> - Add reviewed flag from Sean
> - Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
> - Add reviewed flag from Tomasz.
> - Improved the overly complicated .atomic_check function. (Sean)
> - Add reviewed flag from Tomasz
> - Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
> - Add reviewed flag from Tomasz
> - Add reviewed flag from Sean.
> - Add reviewed flag from Tomasz.
> - Using mask variable to collect the YUV video format. (Sean)
> - Add reviewed flag from Tomasz.
> - Correct the misspell of 'contoller'. (Sean)
> - Add reviewed flag from Sean.
> - Add reviewed flag from Tomasz.
> - Add reviewed flag from Doug.
> - Add reviewed flag from Tomasz.
> - Fix compiled error, sorry.
> "dp->cgfclk" --> 'dp->grfclk'
> - Check the the error code properly, 'EPROBE_DEFER' should be returned,
> 'ENOENT' should assign a NULL point to grfclk, other errors should be
> regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
> - Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/351821/]
> - Add reviewed flag from Doug.
> - Add reviewed flag from Tomasz.
>
> Changes in v3:
> - Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
> - Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
> - Add acked flag from Mark.
> - Add reviewed flag from Tomasz.
> [https://chromium-review.googlesource.com/#/c/346315/15]
> - Add tested flag from Javier
> - Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
> reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
> [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
> - Add tested flag from Javier
> - Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
> - Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
> - Add the acked flag from Mark.
> - Add the acked flag from Mark.
> - Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346318/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@113]
> - Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
> [https://chromium-review.googlesource.com/#/c/346317/15]
> - Add the acked flag from Mark.
> - Add the reviewed flag from Tomasz.
> [https://chromium-review.googlesource.com/#/c/346853/12]
> - Add the acked flag from Mark.
> - Add reviewed flag from Stéphane.
> [https://chromium-review.googlesource.com/#/c/346319/15]
> - Add tested flag from Javier
> - Add this patch in v3
> - Add this patch in v3
>
> Yakir Yang (11):
> drm/rockchip: analogix_dp: split the lcdc select setting into device
> data
> drm/bridge: analogix_dp: correct the register bit define error in
> ANALOGIX_DP_PLL_REG_1
> drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit
> setting
> drm/rockchip: analogix_dp: add rk3399 eDP support
> drm/rockchip: analogix_dp: make panel detect to an optional action
> drm/bridge: analogix_dp: passing the connector as an argument in
> .get_modes()
> drm/rockchip: analogix_dp: correct the connector display color format
> and bpc
> drm/rockchip: analogix_dp: update the comments about why need to
> hardcode VOP output mode
> drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
> drm/rockchip: analogix_dp: introduce the pclk for grf
> dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
>
> .../bindings/display/bridge/analogix_dp.txt | 1 +
> .../display/rockchip/analogix_dp-rockchip.txt | 9 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 8 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 12 +-
> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 5 +-
> drivers/gpu/drm/exynos/exynos_dp.c | 4 +-
> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 174 +++++++++++++++------
> include/drm/bridge/analogix_dp.h | 9 +-
> 9 files changed, 160 insertions(+), 64 deletions(-)
>
> --
> 1.9.1
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 35+ messages in thread
* Re: [PATCH v4 0/11] Misc fixup and add RK3399 eDP support to Analogix DP driver[Involving remittance information, please pay attention to the safety of property]
2016-06-29 14:01 ` Sean Paul
(?)
@ 2016-06-30 6:31 ` Yakir Yang
-1 siblings, 0 replies; 35+ messages in thread
From: Yakir Yang @ 2016-06-30 6:31 UTC (permalink / raw)
To: Sean Paul
Cc: Mark Yao, Inki Dae, Jingoo Han, Heiko Stuebner,
Javier Martinez Canillas, Stéphane Marchesin, Tomasz Figa,
David Airlie, Daniel Vetter, Thierry Reding, Douglas Anderson,
Krzysztof Kozlowski, Emil Velikov, Dan Carpenter,
Linux Kernel Mailing List, dri-devel, linux-samsung-soc,
linux-rockchip
Sean,
On 06/29/2016 10:01 PM, Sean Paul wrote:
> On Wed, Jun 29, 2016 at 5:14 AM, Yakir Yang <ykk@rock-chips.com> wrote:
>> RK3399 and RK3288 shared the same eDP IP controller, only some light
>> difference with VOP configure and GRF configure.
>>
> The whole set looks good to me. All patches should have my R-b now,
> thanks for the update.
Thanks :-D
- Yakir
> Sean
>
>
>
>> Also same misc fix to analogix_dp driver:
>> - Hotplug invalid which report by Dan Carpenter
>> - Make panel detect to an optional action
>> - correct the register bit define error in ANALOGIX_DP_PLL_REG_1
>>
>> Changes in v4:
>> - Assigned the GRF setting magic numbers to a #define that corresponds to
>> a TRM name. (Sean & Heiko)
>> - Pass the chip type to device type directly. (Sean)
>> - Add reviewed flag from Tomasz.
>> - Add reviewed flag from Sean
>> - Remove subdev_type number, and add 'is_rockchip(type)' helper function (Sean)
>> - Add reviewed flag from Tomasz.
>> - Improved the overly complicated .atomic_check function. (Sean)
>> - Add reviewed flag from Tomasz
>> - Move of_node_put(panel_node) directly below of_drm_find_panel (Sean)
>> - Add reviewed flag from Tomasz
>> - Add reviewed flag from Sean.
>> - Add reviewed flag from Tomasz.
>> - Using mask variable to collect the YUV video format. (Sean)
>> - Add reviewed flag from Tomasz.
>> - Correct the misspell of 'contoller'. (Sean)
>> - Add reviewed flag from Sean.
>> - Add reviewed flag from Tomasz.
>> - Add reviewed flag from Doug.
>> - Add reviewed flag from Tomasz.
>> - Fix compiled error, sorry.
>> "dp->cgfclk" --> 'dp->grfclk'
>> - Check the the error code properly, 'EPROBE_DEFER' should be returned,
>> 'ENOENT' should assign a NULL point to grfclk, other errors should be
>> regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
>> [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
>> - Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
>> [https://chromium-review.googlesource.com/#/c/351821/]
>> - Add reviewed flag from Doug.
>> - Add reviewed flag from Tomasz.
>>
>> Changes in v3:
>> - Write a kerneldoc-style comment explaining the chips data fields (Tomasz, reviewed at Google Gerrit)
>> [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@39]
>> - Drop the '.lcdcsel_mask' number in chips data field (Tomasz, reviewed at Google Gerrit)
>> [https://chromium-review.googlesource.com/#/c/346313/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@382]
>> - Add acked flag from Mark.
>> - Add reviewed flag from Tomasz.
>> [https://chromium-review.googlesource.com/#/c/346315/15]
>> - Add tested flag from Javier
>> - Make this hack code more clear (Tomasz, reviewed at Google Gerrit)
>> reg = ~reg & REF_CLK_MASK; ---> reg ^= REF_CLK_MASK;
>> [https://chromium-review.googlesource.com/#/c/346852/7/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c@80]
>> - Add tested flag from Javier
>> - Give the "rk3399-edp" a separate line for clarity in document (Tomasz, reviewed at Google Gerrit)
>> [https://chromium-review.googlesource.com/#/c/346314/10/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt@5]
>> - Move 'output_type' setting before the return statement (Tomasz, reviewed at Google Gerrit)
>> [https://chromium-review.googlesource.com/#/c/346314/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@154]
>> - Add the acked flag from Mark.
>> - Add the acked flag from Mark.
>> - Avoid to change any internal driver state in .mode_valid interface. (Tomasz, reviewed at Google Gerrit)
>> [https://chromium-review.googlesource.com/#/c/346318/10/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@113]
>> - Hook the connector's color_formats in .get_modes directly. (Tomasz, reviewed at Google Gerrit)
>> [https://chromium-review.googlesource.com/#/c/346317/15]
>> - Add the acked flag from Mark.
>> - Add the reviewed flag from Tomasz.
>> [https://chromium-review.googlesource.com/#/c/346853/12]
>> - Add the acked flag from Mark.
>> - Add reviewed flag from Stéphane.
>> [https://chromium-review.googlesource.com/#/c/346319/15]
>> - Add tested flag from Javier
>> - Add this patch in v3
>> - Add this patch in v3
>>
>> Yakir Yang (11):
>> drm/rockchip: analogix_dp: split the lcdc select setting into device
>> data
>> drm/bridge: analogix_dp: correct the register bit define error in
>> ANALOGIX_DP_PLL_REG_1
>> drm/bridge: analogix_dp: some rockchip chips need to flip REF_CLK bit
>> setting
>> drm/rockchip: analogix_dp: add rk3399 eDP support
>> drm/rockchip: analogix_dp: make panel detect to an optional action
>> drm/bridge: analogix_dp: passing the connector as an argument in
>> .get_modes()
>> drm/rockchip: analogix_dp: correct the connector display color format
>> and bpc
>> drm/rockchip: analogix_dp: update the comments about why need to
>> hardcode VOP output mode
>> drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
>> drm/rockchip: analogix_dp: introduce the pclk for grf
>> dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
>>
>> .../bindings/display/bridge/analogix_dp.txt | 1 +
>> .../display/rockchip/analogix_dp-rockchip.txt | 9 +-
>> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 2 +-
>> drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 8 +-
>> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 12 +-
>> drivers/gpu/drm/bridge/analogix/analogix_dp_reg.h | 5 +-
>> drivers/gpu/drm/exynos/exynos_dp.c | 4 +-
>> drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 174 +++++++++++++++------
>> include/drm/bridge/analogix_dp.h | 9 +-
>> 9 files changed, 160 insertions(+), 64 deletions(-)
>>
>> --
>> 1.9.1
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
>
^ permalink raw reply [flat|nested] 35+ messages in thread